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CN-116700416-B - High-voltage-to-low-voltage linear voltage stabilizing circuit and electronic equipment

CN116700416BCN 116700416 BCN116700416 BCN 116700416BCN-116700416-B

Abstract

The application discloses a high-voltage to low-voltage linear voltage stabilizing circuit and electronic equipment, wherein the voltage stabilizing circuit comprises a power tube, a voltage dividing resistor string module, an error amplifier module, a buffer module, a first pre-voltage stabilizer module and a second pre-voltage stabilizer module, wherein the power tube is used for outputting output voltage of the linear voltage stabilizing circuit, the voltage dividing resistor string module divides the output voltage of the linear voltage stabilizing circuit through a resistor string to obtain divided voltage, the error amplifier module amplifies a difference between the divided voltage and a reference voltage to obtain a difference amplified voltage, the buffer module drives a third MOS tube by the difference amplified voltage so as to transmit the difference amplified voltage to a grid electrode of the power tube, the buffer module and the power tube obtain power supply voltage according to input voltage, and the first pre-voltage stabilizer module generates first bias voltage, and the second MOS tube obtains a first low-voltage power supply rail under the driving of the first bias voltage to supply power for the error amplifier module. The error amplifier module can be realized by the MOS tubes with low voltage of 5V, so that the number of the high-voltage MOS tubes can be reduced, the power consumption and the area of the voltage stabilizing circuit can be reduced, and the cost is effectively reduced.

Inventors

  • LUO DI
  • LIN TAO

Assignees

  • 苏州纳芯微电子股份有限公司

Dates

Publication Date
20260512
Application Date
20230616

Claims (8)

  1. 1. A high-to-low voltage linear voltage regulator circuit (100), comprising: a power tube M0 for outputting an output voltage VOUT of the linear voltage stabilizing circuit (100); The voltage dividing resistor string module (50) is used for dividing the output voltage VOUT through a resistor string to obtain divided voltage VFB; An error amplifier module (40) for amplifying the difference between the divided voltage VFB and the reference voltage VBG to obtain a difference amplified voltage VEA; the buffer module (30) comprises a third MOS tube M3, and the buffer module (30) is used for driving the third MOS tube M3 by utilizing the difference amplification voltage VEA so as to amplify the difference amplification voltage VEA A gate electrode transferred to the power tube M0; the first pre-voltage stabilizer module (10) comprises a first bias unit and a second MOS tube M2, wherein the first bias unit is used for generating a first bias voltage, the second MOS tube M2 is driven by the first bias voltage to obtain a first low-voltage power rail VINT5, and the first low-voltage power rail VINT5 is used for supplying power to the error amplifier module (40); The second pre-voltage stabilizer module (20) comprises a second bias unit, a fourth MOS tube M4 and a clamping circuit, wherein the second bias unit is used for generating a second bias voltage VB based on an input voltage VIN, the fourth MOS tube M4 is driven by the second bias voltage VB to obtain a second low-voltage power supply rail VINT6, the second low-voltage power supply rail VINT6 is used for supplying power to the buffer module (30) and the power tube M0, and the clamping circuit is used for clamping the second low-voltage power supply rail VINT6 at a preset potential when the second low-voltage power supply rail VINT6 is higher than the second bias voltage VB.
  2. 2. The high-to-low voltage linear voltage regulator circuit (100) of claim 1, wherein the first biasing unit comprises a first zener diode D1 and a fifth resistor R5; One end of the fifth resistor R5 is connected with the input voltage VIN, and the other end of the fifth resistor R5 is connected with the cathode of the first Zener diode D1; The anode of the first zener diode D1 is connected to the ground GND, and the cathode of the first zener diode D1 is connected to the gate of the second MOS transistor M2; the drain electrode of the second MOS transistor M2 is connected to the input voltage VIN, and the source electrode of the second MOS transistor M2 outputs the first voltage supply rail VINT5.
  3. 3. The high-voltage to low-voltage linear voltage stabilizing circuit (100) according to claim 2, wherein the second bias unit comprises a sixth resistor R6, a second zener diode D2, an eighth MOS transistor M8 and a ninth MOS transistor M9; One end of the sixth resistor R6 is connected with the input voltage VIN, and the other end of the sixth resistor R6 is connected with the cathode of the second zener diode D2; the anode of the second zener diode D2 is connected to the drain of the eighth MOS transistor M8; the grid electrode of the eighth MOS tube M8 is connected with the drain electrode of the eighth MOS tube M8; the source electrode of the eighth MOS tube M8 is connected with the drain electrode of the ninth MOS tube M9; the drain electrode of the ninth MOS tube M9 is connected with the grid electrode of the ninth MOS tube M9; the source electrode of the ninth MOS transistor M9 is connected with the ground GND; The cathode of the second zener diode D2 outputs the second bias voltage VB.
  4. 4. The high-to-low voltage linear voltage regulator circuit (100) of claim 3, wherein the second pre-regulator module (20) further comprises a fifth MOS transistor M5; the source electrode of the fifth MOS tube M5 is connected with the source electrode of the fourth MOS tube M4; the drain electrode of the fifth MOS tube M5 is connected with the grid electrode of the eighth MOS tube M8; And the grid electrode of the fifth MOS tube M5 is connected with the grid electrode of the power tube M0.
  5. 5. The high-to-low voltage linear voltage regulator circuit (100) of claim 4, wherein the second pre-regulator module (20) further comprises a tenth MOS transistor M10 and a power-on reset module (60); the drain electrode of the tenth MOS transistor M10 is connected with the drain electrode of the eighth MOS transistor M8, and the source electrode of the tenth MOS transistor M10 is connected with the ground GND; the power-on reset module (60) comprises a Schmidt trigger, a seventh resistor R7 and an eleventh MOS tube M11, wherein the grid electrode of the eleventh MOS tube M11 is connected to a voltage division tap VDIV of the voltage division resistor string module (50); The source electrode of the eleventh MOS transistor M11 is connected with the ground GND; The drain electrode of the eleventh MOS transistor M11 is pulled up to the first low voltage power supply rail VINT5 through a seventh resistor R7, the drain electrode of the eleventh MOS transistor M11 is connected to the input end of the schmitt trigger, and the output end of the schmitt trigger is connected to the gate electrode of the tenth MOS transistor M10.
  6. 6. The high-voltage to low-voltage linear voltage stabilizing circuit (100) according to claim 2, wherein the buffer module (30) further comprises a first MOS transistor M1 and a twelfth MOS transistor M12; The source electrode of the first MOS tube M1 is connected with the second low-voltage power supply rail VINT6; the drain electrode of the first MOS tube M1 is connected with the drain electrode of the twelfth MOS tube M12; the drain electrode of the first MOS tube M1 is connected with the grid electrode of the first MOS tube M1; the grid electrode of the first MOS tube M1 is connected with the grid electrode of the power tube M0; The grid electrode of the first MOS tube M1 is connected with the second low-voltage power supply rail VINT6; the grid electrode of the twelfth MOS transistor M12 is connected with the first low-voltage power supply rail VINT5; The source electrode of the twelfth MOS tube M12 is connected with the drain electrode of the third MOS tube M3; The source electrode of the third MOS tube M3 is connected to the ground GND; And the grid electrode of the third MOS tube M3 is connected with the difference amplification voltage VEA.
  7. 7. The high-to-low voltage linear voltage regulator circuit (100) according to claim 6, wherein the gate of the first MOS transistor M1 is connected to the second low voltage power supply rail VINT6 through a fourth resistor.
  8. 8. An electronic device (200) comprising a high voltage to low voltage linear voltage regulator circuit (100) as claimed in any one of claims 1 to 7.

Description

High-voltage-to-low-voltage linear voltage stabilizing circuit and electronic equipment Technical Field The application belongs to the technical field of linear voltage stabilizing circuits and the technical field of switching power supplies, and particularly relates to a linear voltage stabilizing circuit capable of converting high voltage into low voltage and electronic equipment. Background The linear voltage stabilizer from high voltage to low voltage has wide application in industry and automobile electronics, and is mainly characterized by directly outputting 3.3V or 5V voltage in a wide input range (for example 8V-55V) for supplying power to other circuit modules, such as a digital isolator, an analog-to-digital converter and the like. The linear voltage regulator needs to employ some high-voltage devices (such as LDMOS) inside, and in view of cost, it is necessary to reduce the number of high-voltage devices as much as possible. In the prior art, as disclosed in the chinese patent publication CN113568466a, a high voltage-resistant low dropout linear regulator LDO and its power-on circuit, if the regulator is used under high voltage, at least two high voltage PMOS and three high voltage NMOS are used, the power consumption and area of the circuit will be increased, and the regulator structure does not have a buffer, if VOUT needs a large capacitance outside the tab, it may have stability problem. If a buffer is added on the basis of the structure, a high-pressure pipe needs to be additionally added. Disclosure of Invention Aiming at the problems that the power consumption and the area of a driving chip are increased and stability is possibly caused when a large number of high-voltage devices are needed in the conventional voltage stabilizer circuit, the application provides a linear voltage stabilizing circuit for converting high voltage into low voltage and a switching power supply. In order to achieve the technical purpose, the application adopts the following technical scheme. In one aspect, the present application provides a high-voltage to low-voltage linear voltage stabilizing circuit, comprising: The power tube M0 is used for outputting the output voltage VOUT of the linear voltage stabilizing circuit; The voltage dividing resistor string module is used for dividing the output voltage VOUT through a resistor string to obtain divided voltage VFB; the error amplifier module is used for amplifying the difference between the divided voltage VFB and the reference voltage VBG to obtain a difference amplified voltage VEA; the buffer module comprises a third MOS transistor M3, and is configured to drive the third MOS transistor M3 with the difference amplified voltage VEA, so as to transmit the difference amplified voltage VEA to a gate of the power transistor M0, where the buffer module and the power transistor M0 obtain a supply voltage according to an input voltage VIN; the first pre-voltage stabilizer module comprises a first bias unit and a second MOS tube M2, wherein the first bias unit is used for generating a first bias voltage, the second MOS tube M2 is driven by the first bias voltage to obtain a first low-voltage power supply rail VINT5, and the first low-voltage power supply rail VINT5 is used for supplying power to the error amplifier module. In another aspect, the application provides an electronic device comprising a high voltage to low voltage linear voltage regulator circuit as described above. Compared with the prior art, the technical scheme of the application has at least the following advantages: the application provides a high-voltage to low-voltage linear voltage stabilizing circuit which comprises a power tube MO, a voltage dividing resistor string module, an error amplifier module, a buffer module and a first pre-voltage stabilizer module, wherein the first pre-voltage stabilizer module is used for generating a first low-voltage power rail VINT5 with internal low voltage of 5V to supply power to the error amplifier module, so that the error amplifier module can be completely realized by MOS (metal oxide semiconductor) tubes with low voltage of 5V, the number of the high-voltage MOS tubes can be reduced, the power consumption and the area of the voltage stabilizing circuit can be reduced, and the cost can be effectively reduced. In addition, a second pre-voltage stabilizer module is added for generating a second low-voltage power rail VINT6 of 6V-8V to supply power to the buffer module and the power tube MO, so that the power tube M0 and the PMOS tube first MOs tube M1 in the buffer module can be implemented by using only 5V low-voltage tubes. For example, if the output voltage VOUT is normally 5V, no overvoltage exists between the ports of the power tube M0 Further, a clamping circuit is added to clamp the second low voltage power supply rail VINT6 to a preset potential without overvoltage when the second low voltage power supply rail VINT6 is higher than the second bias volta