CN-116702676-B - Chip junction temperature estimation method, device, equipment and medium of power module

CN116702676BCN 116702676 BCN116702676 BCN 116702676BCN-116702676-B

Abstract

The invention provides a chip junction temperature estimation method, device, equipment and medium of a power module, which comprises the steps of obtaining physical parameters, reference point temperature and loss power of each chip in the power module, establishing a simulation model based on the physical parameters, applying the loss power to the simulation power module in the simulation model to obtain simulation junction temperature data, obtaining a thermal impedance matrix based on the simulation junction temperature data, the loss power and the reference point temperature, establishing a thermal network model for estimating the junction temperature of the chip, comparing an output result of the thermal network model with an actual junction temperature result of a test to correct the thermal impedance matrix, predicting the service life of the power module to obtain an aging relation between the service life and the thermal impedance matrix, estimating the junction temperature of the chips of the power module with different life cycles according to the aging relation, improving the reliability and the stability of the estimation of the junction temperature of the chip, ensuring the accuracy of the estimation of the junction temperature of the chip, and enabling an automobile to run safely and reliably.

Inventors

LIU LI
Miao Cunhan
CHEN JIAN
CHEN YANG

Assignees

深蓝汽车科技有限公司

Dates

Publication Date: 20260508
Application Date: 20230531

Claims (9)

1. The method for estimating the chip junction temperature of the power module is characterized by comprising the following steps of: Acquiring physical parameters of a power module, reference point temperature and loss power of each chip in the power module; virtual simulation is carried out on the power module based on the physical parameters, a simulation model is established, the loss power is applied to the simulation power module in the simulation model, and simulation junction temperature data of the simulation power module are obtained; Calculating thermal impedance of the chip based on the simulated junction temperature data, the loss power and the reference point temperature to obtain a thermal impedance matrix, and establishing a thermal network model for estimating the junction temperature of the chip based on the thermal impedance matrix, wherein the thermal impedance comprises self-heating impedance and mutual thermal impedance; The method comprises the steps of comparing an output result of a thermal network model with an actual junction temperature result of a test, correcting the thermal impedance matrix according to the comparison result, carrying out life prediction on the power module to obtain a burn-in relation between the life and the thermal impedance matrix, carrying out junction temperature estimation on chips of the power module in different life cycles according to the burn-in relation, wherein the comparison of the output result of the thermal network model with the actual junction temperature result of the test, correcting the thermal impedance matrix according to the comparison result comprises the step of testing the power module to obtain the actual junction temperature result, wherein the actual junction temperature result comprises the actual junction temperature of each chip, calculating the difference between the estimated junction temperature and the actual junction temperature of the chip to serve as the junction temperature difference of the chips to obtain the junction temperature difference of each chip, dividing the junction temperature difference of the chips into a first junction temperature difference and a second junction temperature difference of the chips according to a preset proportion, carrying out thermal impedance calibration on the chips by the first junction temperature difference of the chips, carrying out thermal impedance calibration on the adjacent chips by the thermal impedance calibration on the chips, and carrying out thermal impedance calibration on the adjacent chips by the thermal impedance calibration on the adjacent chips, and carrying out thermal impedance calibration on the adjacent chips.
2. The method for estimating the junction temperature of chips in a power module according to claim 1, wherein before obtaining the physical parameters of the power module, the reference point temperature, and the power loss of each chip in the power module, the method for estimating the junction temperature of chips in the power module comprises: Establishing a power loss model for calculating a loss power based on the switching frequency, the voltage data, and the current data; Collecting working condition data of the power module, wherein the working condition data comprise switching frequency, voltage data, current data and the reference point temperature; and inputting the switching frequency, the voltage data and the current data in the working condition data into the power loss model so as to take the output result of the power loss model as the loss power of each chip.
3. The method for estimating a chip junction temperature of a power module according to claim 2, wherein applying the loss power to a simulated power module in the simulation model to obtain simulated junction temperature data of the simulated power module comprises: Applying loss power of a corresponding chip to one simulation chip in the simulation power module so as to heat the simulation chip and radiate heat to other simulation chips, wherein the simulation chips in the simulation power module correspond to the chips in the power module one by one; measuring to obtain the simulated junction temperature of each simulated chip, and configuring corresponding marks for the simulated junction temperature, wherein the marks represent the corresponding relation between the heated simulated chips and the heated simulated chips; and collecting the measured multiple simulated junction temperatures as the simulated junction temperature data until all the simulated chips finish heating.
4. The method of claim 3, wherein calculating thermal impedance of the chip based on the simulated junction temperature data, the loss power, and the reference point temperature to obtain a thermal impedance matrix, and building a thermal network model for estimating a junction temperature of the chip based on the thermal impedance matrix, comprises: Calculating the temperature difference between the simulated junction temperature and the reference point temperature, and matching a first chip and a second chip corresponding to the simulated junction temperature according to the identification of the simulated junction temperature and the corresponding relation between the simulated chips and the chips; Determining the ratio between the temperature difference and the loss power of the first chip as the thermal impedance of the first chip to the second chip, wherein the thermal impedance is the self-heating impedance if the first chip is the same as the second chip, and the thermal impedance is the mutual thermal impedance if the first chip is different from the second chip; And after the self-heating impedance and the mutual thermal impedance of each chip are obtained, the self-heating impedance and the mutual thermal impedance of each chip are collected to form the thermal impedance matrix, and the thermal network model is built based on the thermal impedance matrix, the reference point temperature and the loss power.
5. The method for estimating a chip junction temperature of a power module according to claim 1, wherein predicting a lifetime of the power module to obtain an aging relationship between lifetime and a thermal impedance matrix comprises: Performing an aging experiment on the power module based on preset cycle times until the power module fails; When an aging experiment of one life cycle is completed, comparing an output result of a thermal network model corresponding to the current life cycle with an actual junction temperature result of a test corresponding to the current life cycle, performing iterative correction on a thermal impedance matrix of the previous life cycle according to the comparison result to obtain a thermal impedance matrix of the current life cycle, and predicting the life of the power module to obtain the life of the current life cycle, wherein each preset cycle number corresponds to one life cycle, and the thermal impedance matrix of the previous life cycle is the corrected thermal impedance matrix; And after the power module fails, performing curve fitting based on the service life of each life cycle and the thermal impedance matrix of each life cycle to obtain an aging curve, wherein the aging curve represents the aging relation between the service life and the thermal impedance matrix.
6. The method for estimating a chip junction temperature of a power module according to any one of claims 2 to 4, wherein after obtaining an aging relationship between lifetime and thermal impedance matrix, the method for estimating a chip junction temperature of a power module comprises: acquiring current working condition data and current service life of a target power module, wherein the target power module comprises a plurality of target chips; calculating the current loss power of each target chip based on the power loss model and the switching frequency, the voltage data and the current data in the current working condition data; And matching the current thermal impedance matrix corresponding to the current service life according to the aging relation, and inputting the reference point temperature, the thermal impedance matrix and the current loss power in the current working condition data into the thermal network model so that the thermal network model outputs the current estimated junction temperature of each target chip.
7. The chip junction temperature estimation device of the power module is characterized by comprising: the acquisition module is used for acquiring physical parameters of the power module, the reference point temperature and the loss power of each chip in the power module; The simulation module is used for carrying out virtual simulation on the power module based on the physical parameters, establishing a simulation model, and applying the loss power to the simulation power module in the simulation model to obtain simulation junction temperature data of the simulation power module; The thermal network module is used for calculating the thermal impedance of the chip based on the simulated junction temperature data, the loss power and the reference point temperature to obtain a thermal impedance matrix, and establishing a thermal network model for estimating the junction temperature of the chip based on the thermal impedance matrix, wherein the thermal impedance comprises self-heating impedance and mutual thermal impedance; The thermal impedance calibration device comprises a thermal impedance matrix, a correction module, a calibration module and a calibration module, wherein the thermal impedance matrix is used for comparing an output result of the thermal network model with an actual junction temperature result of a test, correcting the thermal impedance matrix according to the comparison result, calculating a difference value between the estimated junction temperature and the actual junction temperature of each chip as a junction temperature difference of the chips, obtaining a junction temperature difference of each chip, dividing the junction temperature difference of the thermal network model into a first junction temperature difference and a second junction temperature difference of the chips according to a preset proportion, comparing the output result of the thermal network model with the actual junction temperature result of the test, correcting the thermal impedance matrix according to the comparison result, testing the power module, obtaining the actual junction temperature result, wherein the actual junction temperature result comprises the actual junction temperature of each chip, calculating the difference between the estimated junction temperature and the actual junction temperature of the chips, and obtaining the junction temperature difference of each chip as the junction temperature difference of the chips, dividing the junction temperature difference of the chips into the first junction temperature difference of the chips and the second junction temperature difference of the chips according to the preset proportion, calibrating the junction temperature difference of the chips, correcting the thermal impedance of the adjacent chips based on the thermal impedance of the first junction temperature difference of the chips and the adjacent thermal impedance calibration chip, and the thermal impedance matrix after the thermal impedance calibration matrix is obtained after the thermal impedance calibration of the adjacent chips.
8. An electronic device, the electronic device comprising: One or more processors; storage means for storing one or more programs that, when executed by the one or more processors, cause the electronic device to implement the method of chip junction temperature estimation for a power module of any of claims 1-6.
9. A computer readable storage medium, having stored thereon a computer program which, when executed by a processor of a computer, causes the computer to perform the method of estimating the chip junction temperature of a power module according to any of claims 1-6.

Description

Chip junction temperature estimation method, device, equipment and medium of power module Technical Field The application relates to the technical field of vehicle power modules, in particular to a method, a device, equipment and a medium for estimating the junction temperature of a chip of a power module. Background In recent years, with the development of new energy automobiles, the body volume of a new energy generator set is larger and the requirements are stricter, the capacity of a power converter is also improved, and the requirements on the safety and the reliability of the new energy automobiles are more and more important. Therefore, in order to enable a new energy vehicle to run safely and reliably, reliability of the motor controller is indispensable, and an IGBT (Insulated Gate Bipolar Transistor ), also called a power module, is one of the most important power modules in the whole motor controller, and is the most central part in the whole motor controller. Because the IGBT is packaged in the power module, direct measurement of the junction temperature of the IGBT is difficult, and junction temperature estimation of the IGBT is needed. In an electric automobile, due to the requirement of large current, three IGBTs are generally adopted in a power module in parallel to improve current density, and each IGBT further comprises a plurality of chips. However, the factors such as uneven flow and thermal coupling between the parallel chips exist in the multiple chips, and difficulty is brought to accurate estimation of the junction temperature of the IGBT chips. Chinese patent CN107219016B discloses a method and a system for calculating a transient junction temperature of an IGBT module, which are based on thermal coupling between chips inside a power module to build a thermal resistance network model of the IGBT module to calculate the junction temperature. Disclosure of Invention In view of the above drawbacks of the prior art, the present application provides a method, an apparatus, a device, and a medium for estimating a chip junction temperature of a power module, so as to solve the above technical problems of insufficient reliability of junction temperature calculation and reduced accuracy of junction temperature calculation caused by the influence of the lifetime attenuation of an IGBT module on a thermal impedance matrix. The application provides a chip junction temperature estimation method based on a power module, which comprises the steps of obtaining physical parameters of the power module, reference point temperature and loss power of each chip in the power module, virtually simulating the power module based on the physical parameters, establishing a simulation model, applying the loss power to the simulation power module in the simulation model to obtain simulation junction temperature data of the simulation power module, calculating thermal impedance of the chip based on the simulation junction temperature data, the loss power and the reference point temperature to obtain a thermal impedance matrix, establishing a thermal network model for estimating the chip junction temperature based on the thermal impedance matrix, wherein the thermal impedance comprises self-heating impedance and mutual thermal impedance, comparing an output result of the thermal network model with a tested actual junction temperature result, correcting the thermal impedance matrix according to a comparison result, predicting service life of the power module to obtain an aging relation between the service life and the thermal impedance matrix, and estimating the junction temperature of the chip with different life cycles according to the aging relation. In an embodiment of the application, before acquiring physical parameters, reference point temperature and loss power of each chip in the power module, the method for estimating the chip junction temperature of the power module comprises the steps of establishing a power loss model for calculating loss power based on switching frequency, voltage data and current data, acquiring working condition data of the power module, wherein the working condition data comprise switching frequency, voltage data and current data and the reference point temperature, and inputting the switching frequency, the voltage data and the current data in the working condition data into the power loss model to take an output result of the power loss model as the loss power of each chip. In an embodiment of the application, the loss power is applied to the simulation power module in the simulation model to obtain the simulation junction temperature data of the simulation power module, wherein the loss power of a corresponding chip is applied to one simulation chip in the simulation power module to enable the simulation chip to generate heat and radiate heat to other simulation chips, the simulation chip in the simulation power module corresponds to the chip in the power module one by one, the