CN-116800291-B - Transmitting-receiving circuit

Abstract

Embodiments of the present invention relate to a transceiver circuit. A transceiver circuit having a simple circuit structure is provided. The transceiver circuit has a 1 st circuit, a 2 nd circuit, and an insulating element. The 1 st circuit generates the 2 nd clock signal by increasing the frequency of the 1 st clock signal. The insulating element transmits the 2 nd clock signal as the 3 rd clock signal to the 2 nd circuit. The 2 nd circuit transmits the 1 st data signal according to the 3 rd clock signal. The insulating element transmits the 1 st data signal as the 2 nd data signal. The 1 st circuit receives the 2 nd data signal.

Inventors

• WANG KAILI
• ISHIHARA TAKAAKI

Assignees

• 株式会社东芝
• 东芝电子元件及存储装置株式会社

Dates

Publication Date

20260512

Application Date

20220831

Priority Date

20220318

Claims (17)

1. 1. A transceiver circuit, comprising: A1 st circuit capable of transmitting and receiving signals; a2 nd circuit capable of receiving and transmitting signals, and An insulating element that electrically insulates the 1 st circuit and the 2 nd circuit and is capable of transmitting a signal transmitted from one of the 1 st circuit and the 2 nd circuit to the other, The 1 st circuit has a1 st terminal to which a1 st clock signal of 1 st level and a 2 nd level is input from the outside repeatedly at a predetermined period, generates a 2 nd clock signal by increasing the frequency of the 1 st clock signal, transmits the 2 nd clock signal, The insulating element transmits the 2 nd clock signal from the 1 st circuit as the 3 rd clock signal to the 2 nd circuit, The 2 nd circuit transmits a1 st data signal according to the 3 rd clock signal from the insulating element, The insulating element transmits the 1 st data signal from the 2 nd circuit as a 2 nd data signal, The 1 st circuit receives the 2 nd data signal from the insulating element, The 1 st circuit has a1 st transmission mode and a1 st reception mode, The 1 st circuit switches to the 1 st transmission mode and transmits the 2 nd clock signal when the 1 st clock signal inputted from the outside becomes the 1 st level, and switches to the 1 st reception mode and receives the 2 nd data signal from the insulating element before the level of the 1 st clock signal is changed to the 2 nd level when the transmission of the 2 nd clock signal is completed.
2. 2. The transceiver circuit of claim 1 wherein, The 1 st circuit comprises a1 st transmitting circuit and a1 st receiving circuit, In the 1 st transmission mode, the 1 st transmission circuit is in an operation state in which operating power is supplied to a circuit portion that performs signal transmission included in the 1 st transmission circuit, and the 1 st reception circuit is in a stop state in which operating power is not supplied to a circuit portion that performs signal reception included in the 1 st reception circuit, In the 1 st reception mode, the 1 st transmission circuit is in a stopped state, and the 1 st reception circuit is in an operating state.
3. 3. The transceiver circuit of claim 2, wherein, The 1 st circuit switches to the 1 st reception mode after a predetermined switching time elapses from the completion of transmission of the 2 nd clock signal.
4. 4. The transceiving circuit as claimed in claim 2 or 3, wherein, The 1 st circuit switches to a1 st standby mode upon receiving the 2 nd data signal from the insulating element in the 1 st reception mode, In the 1 st standby mode, the 1 st transmission circuit and the 1 st reception circuit are both in a stopped state.
5. 5. The transceiver circuit of any one of claim 1 to 3, wherein, The 2 nd circuit has a 2 nd transmitting mode and a 2 nd receiving mode, The 2 nd circuit switches to the 2 nd transmission mode upon receiving the 3 rd clock signal from the insulating element in the 2 nd reception mode, The 2 nd circuit transmits the 1 st data signal in the 2 nd transmission mode, and switches to the 2 nd reception mode when the transmission of the 1 st data signal is completed.
6. 6. The transceiver circuit of claim 5 wherein, The 2 nd circuit comprises a 2 nd transmitting circuit and a 2 nd receiving circuit, In the 2 nd transmission mode, the 2 nd transmission circuit is in an operation state in which operating power is supplied to a circuit portion that performs signal transmission included in the 2 nd transmission circuit, and the 2 nd reception circuit is in a stop state in which operating power is not supplied to a circuit portion that performs signal reception included in the 2 nd reception circuit, In the 2 nd reception mode, the 2 nd transmission circuit is in a stopped state, and the 2 nd reception circuit is in an operating state.
7. 7. The transceiver circuit of claim 6 wherein, The 2 nd circuit switches to the 2 nd transmission mode after a predetermined standby time elapses from the completion of reception of the 3 rd clock signal.
8. 8. The transceiver circuit of claim 5 wherein, The 2 nd circuit switches to the 2 nd reception mode when the 2 nd transmission mode continues for a predetermined time.
9. 9. The transceiver circuit of claim 8 wherein, The 2 nd circuit further includes a timer circuit for counting time in response to switching to the 2 nd transmission mode, and switches to the 2 nd reception mode when the timer circuit detects that the predetermined time has elapsed.
10. 10. The transceiver circuit of any one of claim 1 to 3, wherein, The insulating element is a single insulating element, and the 2 nd clock signal and the 1 st data signal are transmitted through the single insulating element.
11. 11. The transceiver circuit of any one of claim 1 to 3, wherein, The insulating element comprises a1 st insulating element and a 2 nd insulating element, The 2 nd clock signal is transmitted through the 1 st insulating element, and the 1 st data signal is transmitted through the 2 nd insulating element.
12. 12. The transceiver circuit of any one of claim 1 to 3, wherein, The insulating element is formed by a transformer, a converter or a capacitor.
13. 13. The transceiver circuit of any one of claim 1 to 3, wherein, The 2 nd and 3 rd clock signals and the 1 st and 2 nd data signals are voltage pulses or current pulses.
14. 14. The transceiver circuit of any one of claim 1 to 3, wherein, The 1 st circuit detects a rising edge, a falling edge, or both a rising edge and a falling edge of the 1 st clock signal, thereby determining reception of the 1 st clock signal, The 2 nd circuit detects a rising edge, a falling edge, or both a rising edge and a falling edge of the 3 rd clock signal, thereby determining reception of the 3 rd clock signal.
15. 15. The transceiver circuit of any one of claim 1 to 3, wherein, And a signal processing circuit for supplying a data signal to the 2 nd circuit, The 2 nd circuit generates a4 th clock signal by reducing the 3 rd clock signal, inputs the 4 th clock signal to the signal processing circuit, The signal processing circuit supplies the data signal bit by bit every time the 4 th clock signal is inputted from the 2 nd circuit, The 2 nd circuit generates the 1 st data signal by increasing the frequency of the data signal supplied from the signal processing circuit.
16. 16. The transceiver circuit of claim 15 wherein, The signal processing circuit includes an a/D converter.
17. 17. The transceiver circuit of claim 16 wherein, The a/D converter is constituted by a delta-sigma modulator.

Description

Transmitting-receiving circuit Technical Field Embodiments of the present invention relate to a transceiver circuit. Background A transceiver circuit capable of transmitting signals bi-directionally between 2 circuits connected via an insulating element such as a transformer or a converter is known. In general, in such a transceiver circuit, 2 insulating elements, that is, an insulating element for transmission from one circuit to another circuit and an insulating element for transmission from another circuit to one circuit are used. There are also transceiver circuits capable of bi-directional transmission through a single insulating element. However, in order to realize bidirectional transmission by a single insulating element instead, an additional circuit such as a reception timing circuit is required. As a result, the entire transceiver circuit is not necessarily a simple circuit configuration. Disclosure of Invention The invention aims to provide a transceiver circuit with a simple circuit structure. Means for solving the technical problems The transmission/reception circuit of the embodiment includes a 1 st circuit capable of transmitting/receiving a signal, a 2 nd circuit capable of transmitting/receiving a signal, and an insulating element electrically insulating the 1 st circuit and the 2 nd circuit from each other, and capable of transmitting a signal transmitted from one of the 1 st circuit and the 2 nd circuit to the other, the 1 st circuit having a 1 st terminal to which a 1 st clock signal is input, generating a 2 nd clock signal by converting the 1 st clock signal to a high frequency, transmitting the 2 nd clock signal to the 2 nd circuit via the insulating element, receiving the 3 rd clock signal in which the 2 nd clock signal is delayed via the insulating element, transmitting the 1 st data signal to the 1 st circuit via the insulating element in accordance with the 3 rd clock signal, and receiving the 2 nd data signal in which the 1 st data signal is delayed via the insulating element. According to the transceiver circuit having the above-described configuration, bidirectional transmission can be realized by a simple circuit configuration. Drawings Fig. 1 is a diagram showing a configuration of a transmitting/receiving circuit according to embodiment 1. Fig. 2 is a timing chart for explaining the outline of the operation of the transceiver circuit according to embodiment 1. Fig. 3 is a timing chart illustrating details of the operation of the transceiver circuit according to embodiment 1. Fig. 4 is a timing chart for explaining the operation of the transceiver circuit according to embodiment 2. Fig. 5 is a timing chart for explaining the operation of the transceiver circuit according to embodiment 3. Fig. 6 is a diagram showing a configuration of a transmission/reception circuit according to modification 1. Fig. 7 is a diagram showing a configuration of a transmission/reception circuit according to modification 2. Description of the reference numerals 10. No. 1 circuit 10A 1 st terminal 11. 1 St transmission circuit 11A output 11B output 12. 1 St receiving circuit 12A input 12B input 20. 2 Nd circuit 21. 2 Nd transmitting circuit 21A output 21B output 22. 2 Nd receiving circuit 22A input 22B input 30. Insulating element 31. Primary side 32. Secondary side 40. Signal processing circuit 41. Clock terminal 42. Output terminal 43 A/D converter 44 P/S converter 100. Transmitting-receiving circuit 200. Transmitting-receiving circuit 230A 1 st insulating element 230B No. 2 insulating element 300. Transmitting-receiving circuit 330. Insulating element 331. Primary side 332. Secondary side CLK1 st clock signal CLK2 nd clock signal CLK3 rd clock signal CLK4 clock signal 4 DATA DATA signal DATA1 DATA signal 1 DATA2 DATA signal 2 R1 region 1 R2 region 2 Detailed Description The embodiments will be described below with reference to the drawings. In the drawings, the same or corresponding elements are denoted by the same reference numerals, and detailed description thereof is omitted as appropriate. (Embodiment 1) Fig. 1 is a diagram showing a configuration of a transceiver circuit 100 according to embodiment 1. The transmitting/receiving circuit 100 includes a1 st circuit 10 capable of transmitting/receiving a signal, a2 nd circuit 20 capable of transmitting/receiving a signal, an insulating element 30 composed of a single transformer or converter, and a signal processing circuit 40. The 1 st circuit 10 is disposed in the 1 st region R1, and the 2 nd circuit 20 is disposed in the 2 nd region R2. The 1 st circuit 10 and the 2 nd circuit 20 are connected via an insulating element 30. The 1 st circuit 10 and the 2 nd circuit 20 are electrically insulated but magnetically coupled, so that a signal sent from one circuit is transferred to the other circuit via the insulating element 30. The 1 st circuit 10 includes a1 st transmission circuit 11, a1 st reception circuit 12, and a1 st control circuit 13 that