CN-116817729-B - Method for improving consistency of linear cutting data of large silicon wafer

Abstract

The invention provides a method for improving the consistency of large silicon wafer linear cutting data, which solves the problem that the existing test method cannot provide the consistency test data for process debugging and research and development requirements by taking the linear cutting direction as an initial position. The method for changing the initial test position is provided, and the test path is adjusted to be consistent with the cutting direction, so that the problem of consistency of wire cutting data is solved, and the process is facilitated to adjust and optimize the processing parameters. The initial test angle beta is adjusted so that the angle alpha=beta is formed between the initial test angle beta and the Notch direction. Thickness steepness calculations were performed along the dicing direction test data to characterize the effect of dicing on wafer topography.

Inventors

• HU HAO
• Chao Mingming
• WANG XIMING
• CHEN MENG

Assignees

• 上海超硅半导体股份有限公司
• 重庆超硅半导体有限公司

Dates

Publication Date

20260505

Application Date

20230616

Claims (1)

1. 1. A test method for improving the consistency of linear cutting data of a large silicon wafer is characterized by taking the angle between a cutting trace and a Notch in the direction (Notch) of the positioning groove as alpha, taking the initial angle of the silicon wafer test as beta, adjusting beta to enable beta to be equal to alpha, then calculating the thickness gradient of the test data according to the cutting direction to represent the influence of cutting on the shape of the silicon wafer, taking the thickness profile test data of the cutting direction, and adopting the following calculation formula: In the formula, space represents the sampling length, namely, the gradient calculation of the thickness is carried out within the sampling length range, the value of Space is 5 mm-10 mm, and the thickness of the silicon wafer at the position x is Thk (x) .

Description

Method for improving consistency of linear cutting data of large silicon wafer Technical Field The invention relates to a test method for improving the consistency of linear cutting data of a large silicon wafer, which mainly comprises the steps of adjusting the initial position of the linear cutting after the linear cutting by taking a cutting angle as a reference angle, further obtaining test data consistency data taking a cutting direction as an initial angle, then calculating thickness steepness of the cutting direction, and representing the influence of the cutting on the morphology of the silicon wafer. Background With the improvement of the performance requirements of semiconductor components, the requirements on the flatness of silicon wafers are higher and higher as the manufacturing process is gradually improved. How to characterize the flatness of the silicon wafer in the production process and related parameters are of great significance to the production of the silicon wafer. The method for testing the silicon wafer in a non-contact way has the advantages of no damage to the surface of the silicon wafer, convenient use, high testing speed and the like, and is widely used. Among them, the electron capacitance method is a common technique for measuring thickness. The principle of this method is to assume a silicon wafer as an ideal uniform dielectric, i.e. the dielectric constants of the wafer under test and throughout the entire area of the wafer are the same or similar. Figure 1 is a schematic diagram of a capacitive measurement of thickness, As shown in FIG. 1, probe A and B are capacitance sensor probes, s is the Probe area, D is the distance between probes A and B and is a fixed value, a is the distance between Probe A and the surface of the silicon wafer, B is the distance between Probe B and the surface of the silicon wafer, and the equipment debugging process also ensures that a and B are as equal as possible so as to ensure the accuracy of the measurement result, and t is the thickness of the silicon wafer. During testing, the silicon wafer is placed at the position between the probe A and the probe B. Assuming that the silicon wafer has a dielectric constant of air, a capacitance of C 0 in the absence of silicon wafer, and a capacitance of C when the silicon wafer is placed between probe A and probe B When an AC high-frequency signal is input between the upper and lower capacitance probes, a high-frequency electric field is generated between the upper and lower capacitance probes, and a current flows through the capacitance to form a standard linear circuit in the equipment, so that the variation of the current can be measured. Assuming that the current value is I 0 when no silicon chip exists, the current is I, the alternating voltage is U and the frequency is f when the silicon chip is tested, and then: Derivation of cocoa the product can be obtained by the method, As can be seen from equation 5, the thickness of the silicon wafer is determined by the current passing through it when D is constant. By solving the equation, thickness information at this point can be obtained. By moving the silicon wafer, thickness information at other locations on the silicon wafer can be obtained. When the test mode is line scanning, the conventional post-cutting flatness test adopts a mode with Notch as an initial position, and the influence of the cutting direction on the process attention parameters cannot be reflected because the cutting direction and the Notch position have no correlation. And the cutting has serious influence on the flatness data of the silicon wafer, so that the reasonable and consistent testing and characterization of the flatness data of the cut silicon wafer are extremely important. Disclosure of Invention In order to improve the consistency test problem of the linear cutting data of the large silicon wafer, better solve the problem that the conventional flatness test cannot represent the deviation of the cutting direction in the production process, and optimize the process parameters, the invention is completed in the following way. The method for changing the initial test position is provided, and the test path is adjusted to be consistent with the cutting direction, so that the problem of consistency of wire cutting data is solved, and the process is facilitated to adjust and optimize the processing parameters. As shown in fig. 2, when the test path is shown in the drawing, since the cutting direction does not completely coincide with the Notch direction, see fig. 3, there will be a case where the test data is not associated with the cutting direction in the actual test result. When the included angle between the line mark direction and the Notch is alpha and the initial angle beta is tested by the silicon wafer, alpha=beta is achieved by adjusting beta. In the actual test result, the test patterns are consistent with the cutting direction, and the consistency of the test