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CN-116881196-B - SATA communication data file management system based on small-sized FPGA

CN116881196BCN 116881196 BCN116881196 BCN 116881196BCN-116881196-B

Abstract

The invention discloses a SATA communication data file management system based on a small-sized FPGA, which particularly comprises a data processing module, a SATA_IP_CORE module and a file management state machine, wherein the data processing module is used for reading, writing and destroying data, the data comprises an address and a content, the SATA_IP_CORE module is communicated with a solid state disk, and the file management state machine analyzes external signals, controls the switching and the operation of a file system and maintains the initialization of the file system. The invention realizes file management system design by using programmable logic language Verilog HDL aiming at SATA communication data of a small-sized FPGA, meets the requirements that an upper computer carries out data communication on the FPGA through a serial port, comprises writing data into the SATA through the FPGA, sending commands to the FPGA through the serial port for interpretation, and reading back the state of the SATA to the upper computer through the serial port, and realizes the management of SATA data files by the FPGA.

Inventors

  • YAN ZHIGANG

Assignees

  • 南京熊猫汉达科技有限公司

Dates

Publication Date
20260512
Application Date
20230707

Claims (5)

  1. 1. The SATA communication data file management system based on the small-sized FPGA is characterized by comprising a data processing module, a SATA_IP_CORE module and a file management state machine, wherein: the data processing module is used for reading, writing and destroying data, and the data comprises an address and content; The SATA_IP_CORE module is used for communicating with the solid state disk; the file management state machine is used for analyzing external signals, controlling the switching and operation of the file system and maintaining the initialization of the file system; the file management state machine is responsible for managing file system 1 and file system 2, including the following states: hr_wait_ready, waiting for initialization, and after the sata_ip_core module establishes communication with the solid state disk, switching to wait_fiie1_init state; initializing the FILE system 1, and switching to the WAIT_FILE2_INIT state after the initialization is completed; Initializing the FILE system 2, and switching to an HR_IDLE state after the initialization is completed; Hr_idle, IDLE state waiting for user operation, and switching to OPERT _ IMPLUS state after obtaining instruction; OPERT _ IMPLUS, operating IMPLUS the file system, including reading and writing operations, and switching to an HR_IDLE state after finishing the operations; OPERT _INFORM operating the INFORM file system, including read-write operation, and switching to HR_IDLE state after finishing; the upper computer interacts with the SATA disk through instructions, and the FPGA is an intermediate bridge; the external instruction comprises an SATA action instruction and a serial port operation instruction; The SATA action command includes the following: 5555aaaa, starting to write; aaaabbbb, ending the writing operation, sending in the executing process of the writing operation, and stopping the writing operation after the 32MB data of the current writing operation are written; CCCCAAAA, destroying data, after sending the instruction, resetting to start destroying, and stopping power off in the middle; 55557777 00000100 00000001, reading, namely reading the data of 1 sector from the address 0x100 by using the read starting address and the read size of the two rear data reading instructions respectively, wherein the read size is an integer multiple of 0.5KB, namely an integer multiple of 512B; 9595AAAA {8'd15, 8'd03, 8'd04, 8'd12} inputs a time reference representing 12 points at 15 years, 3 months, 4 days of the current time reference; the serial port operation instruction is as follows: FFFF6601 is switched to a file 1 operation module and defaults to 1; FFFF6601 is switched to a File 2 operation module; FFFF5555 a software reset, equivalent to soft_rst; FFFF7766 to open the serial data display; FFFF7777 closing the serial data display; FFFF9999 read SSD remaining space.
  2. 2. The SATA communication data file management system of claim 1 wherein the first block area of the SATA disk is divided into total files recorded as shown in table 1: TABLE 1 Sequence number Number of bytes Content description Remarks 1 4 Recording total list header identification 2 4 Record total list tail identification 3 4 Number of subfile lists The files need to be updated after the files are written, and the files need to be updated after the power-on inquiry is completed 4 4 Sub-file list start address The files need to be updated after the files are written, and the files need to be updated after the power-on inquiry is completed 5 4 Latest data start address Update after writing the file 6 4 Latest data termination address The files need to be updated after the files are written, and the files need to be updated after the power-on inquiry is finished 7~128 488 Reservation The total file list is updated after the power-on detection is completed, and is updated when a new file writing operation is performed.
  3. 3. The SATA communication data file management system based on a small FPGA as recited in claim 2 wherein the contents of the data area are as described in table 3: TABLE 3 Table 3 Sequence number Number of bytes Content description Remarks 1 4 Data head identification 0xDDDD_DDDD 2~8191 32760 Data content 8192 4 Data tail identification 0xAAAA_AAAA Each data frame is 8KB and one file record is 32MB.
  4. 4. The SATA communication data file management system of claim 3 wherein, for serial port commands, the FPGA requires a logical response and replies SATA state variables; The sata_file interface specification is shown in table 4: TABLE 4 Table 4 Port name Byte number (bit) I/O Description of the invention 32 Data head identification LIST_RECD_LBA 32 I Parameters, total table storage address SUBR_STRT_LBA 32 I Parameters, sub-table stores start addresses DATA_STRT_LBA 32 I Parameter, data storage start address DATA_END_LBA 32 I Parameter, data storage termination address sys_rst 1 I System reset soft_rst 1 I Software reset usr_clk 1 I Clock (clock) ext_clk 1 I External clock sata_core_rdy 1 I The Sata core is ready sata_rd_data 32 I Sata nuclear reading data sata_rd_val 1 I Sata Nuclear read data valid linkup_val 1 I The Sata core is connected with the hard disk file_cplt_val 1 I Sata core file processing ends inst_inf_val 1 I External instruction valid inst_inf_data 32 I Content of external instructions ext1_in_val 1 I The file system 1 is valid for inputting data ext1_in_data 32 I The file system 1 inputs data ext2_in_val 1 I The file system 2 is valid for inputting data ext2_in_data 32 I File system 2 input data stor_type_en 1 I Input data type valid stor_file_type 8 I Input data type chip1_flg 1 O Chipscope output of sys1_rcv_busy 1 O The file processing system 1 is busy and cannot input data when it is 1 sys2_rcv_busy 1 O The file processing system 2 is busy and cannot input data when it is 1 opert_lba_ovf 1 O Indication signal that read/write operation exceeds hard disk space sata_wr_data 32 O Write data connected to SATA core sata_wr_data_val 1 O Write data valid, connected to SATA core ssd_rd_data 32 O Reading data connected to SATA core ssd_rd_data_val 1 O Read data valid, connected to SATA core ins1_opert_done 1 O The file processing system 1 completes the processing, and the external side can process the next time after the processing is completed ins2_opert_done 1 O The file processing system 2 completes the processing, and the external side can process the next time after the processing is completed ssd_surplus_size 32 O Remaining hard disk space inst_inf_val 1 I The instruction input is effective, the operation of the module is controlled, and when the serial port is replaced by other modules, the input is changed into the input inst_inf_data 32 I The command inputs data, controls the operation of the module, and changes the serial port into input when the serial port is replaced by other modules external_mod_rdy 1 I The external module can receive data, and is connected with SATA core to make it input, when the serial port is replaced by other module, it is changed into input 。
  5. 5. The SATA communication data file management system of claim 4 wherein the serial port operation flow on the host computer is as follows: ① After the detection is finished, the external module can operate the module to read and write; ② Designating a file module, performing writing operation, sending 0x FFFF6601, returning, then sending 0x5555aaaa, and automatically and continuously writing analog data until receiving a command Aaaabbbb for stopping writing operation; ③ The read operation is similar, a file module is designated for performing the read operation, 0x FFFFFF6601 is sent, carriage return is carried out, 0x 55557777 0x 00000100 0x 00000001 is sent, 1 data of a sector with the 0x100 address is read, the data size is an integer multiple of 0.5KB, namely an integer multiple of 512B, if the data is required to be displayed in a serial port, a serial port data display switch is required to be opened before the read operation and then 0xFFFF7766 is sent, and otherwise, the display switch is closed and then 0xFFFF7777 is sent.

Description

SATA communication data file management system based on small-sized FPGA Technical Field The invention belongs to the technical field of programmable logic application, and particularly relates to a SATA communication data file management system based on a small-sized FPGA. Background SATA is an industry standard based serial hardware driver interface that transfers data in a serial manner, supporting hot plug, and is mainly used for data transfer between SATA hosts and mass storage devices. SATA employs a differential signaling system that effectively filters noise, so SATA does not require high voltage transmission to reject noise, but rather only requires low voltage operation. The bus uses an embedded clock frequency signal, has stronger error correction capability than the prior art, can check transmission instructions (not only data), automatically corrects errors if errors are found, and improves the reliability of data transmission. SATA1 has a transmission rate of only 150MB/s, SATA2 extends to 300MB/s, and SATA3 increases the port transmission rate to 6Gbit/s. Can meet the requirements of large capacity and quick storage. The interface is simple, hot plug is supported, the length of a supporting data line can reach 2 meters, and the communication is not limited by space, so that the device has wide application requirements. Most FPGAs currently have high-speed interfaces (GTP, GTX, GTH) to support SATA protocols, and 7-series FPGAs of xilinx integrate GTP, GTX, GTH and GTZ serial high-speed transceivers according to different device types, so that SATA-IP-CORE can be used, SATA bottom-layer protocols are supported, SATA interface protocols refer to TCP/IP models, and SATA interfaces are divided into four layers to be realized, wherein the four layers comprise a physical layer, a link layer, a transmission layer and an application layer. However, only large high-end FPGAs such as Xilinx Zynq 7045 (domestic FMQL T900) are provided with a kernel Processor System (PS), which can run open source Linux and domestic custom systems, and file management can be realized by application layer access of the operating system to sata_ip_core. For a large number of small and medium-sized FPGAs, only programmable logic resources PL are provided, a kernel Processor System (PS) is not provided, only an IP core of SATA can be realized, and file management of an operating system is not provided, so that management of data files cannot be realized. In order to meet the SATA data management function of small and medium-sized FPGAs, it is urgently required to implement file management using a hardware programmable logic language. Disclosure of Invention The invention aims to provide a SATA communication data file management system based on a small-sized FPGA, which aims at realizing file management of SATA communication data of the small-sized FPGA by using a programmable logic language Verilog HDL. The technical solution for realizing the purpose of the invention is as follows: 1. The SATA communication data file management system based on the small-sized FPGA is characterized by comprising a data processing module, a SATA_IP_CORE module and a file management state machine, wherein: the data processing module is used for reading, writing and destroying data, and the data comprises an address and content; The SATA_IP_CORE module is used for communicating with the solid state disk; the file management state machine is used for analyzing external signals, controlling the switching and operation of the file system and maintaining the initialization of the file system; the file management state machine is responsible for managing file system 1 and file system 2, including the following states: hr_wait_ready, waiting for initialization, and after the sata_ip_core module establishes communication with the solid state disk, switching to wait_fiie1_init state; initializing the FILE system 1, and switching to the WAIT_FILE2_INIT state after the initialization is completed; Initializing the FILE system 2, and switching to an HR_IDLE state after the initialization is completed; Hr_idle, IDLE state waiting for user operation, and switching to OPERT _ IMPLUS state after obtaining instruction; OPERT _ IMPLUS, operating IMPLUS the file system, including reading and writing operations, and switching to an HR_IDLE state after finishing the operations; OPERT _INFORM operating the INFORM file system, including read-write operation, and switching to HR_IDLE state after finishing; the upper computer interacts with the SATA disk through instructions, and the FPGA is an intermediate bridge; the external instruction comprises an SATA action instruction and a serial port operation instruction; The SATA action command includes the following: 5555aaaa, starting to write; aaaabbbb, ending the writing operation, sending in the executing process of the writing operation, and stopping the writing operation after the 32MB data of the current writing op