CN-117059028-B - Display panel, driving method and display device

Abstract

The embodiment of the application provides a display panel, a driving method and a display device, and relates to the technical field of display panels. The display panel comprises a display blank section between a first display frame and a second display frame, wherein the display blank section comprises a first target section, a first reference voltage signal does not initialize a first pole of a light emitting element in the first target section, and the voltage value of the first reference voltage signal is switched in the first target section. According to the embodiment of the application, the problem of uneven display brightness of the display panel can be effectively and fully improved, and the display effect of the display panel is effectively improved.

Inventors

• LIU XIGANG

Assignees

• 武汉天马微电子有限公司

Dates

Publication Date

20260512

Application Date

20230823

Claims (20)

1. 1. A display panel, comprising: The display panel comprises a display blank section between a first display frame and a second display frame, wherein the display blank section comprises a first target section, and a first reference voltage signal does not initialize a first pole of a light-emitting element in the first target section; switching a voltage value of a first reference voltage signal in the first target section; the display panel comprises a plurality of pixel circuits, wherein the pixel circuits comprise a first initialization module; The first initialization module is used for transmitting the first reference voltage signal provided by the first reference voltage signal end to a first pole of the light-emitting element under the control of the first scanning signal end; The first initialization module is kept off in the first target section, wherein the first target section comprises a first target moment; The voltage value of the first reference voltage signal provided by the first reference voltage signal end is a first voltage value from the starting time of the first target section to the first target time; The voltage value of the first reference voltage signal provided by the first reference voltage signal end is a second voltage value from the first target time to the end time of the first target section; the display blank section comprises a vertical front corridor section and a vertical rear corridor section, wherein the vertical front corridor section is in front of the vertical rear corridor section; In one display frame, the first pixel circuit is positioned in a plurality of pixel circuits of first line scanning, and the second pixel circuit is positioned in a plurality of pixel circuits of last line scanning; The first scanning signal end in the first pixel circuit is electrically connected with a first scanning signal line; the first scanning signal end in the second pixel circuit is electrically connected with a second scanning signal line; The second scanning signal line provides an on level during a first period in the vertical front lane section and/or provides an on level during a second period in the vertical rear lane section, wherein the first scanning signal line and the second scanning signal line both provide an off level within the first target section.
2. 2. The display panel according to claim 1, comprising: The first display frame is a data writing frame, and the second display frame is a holding frame; or the first display frame is a holding frame, and the second display frame is a data writing frame.
3. 3. The display panel of claim 1, wherein when the first display frame is a data write frame and the second display frame is a hold frame, the voltage value of the first reference voltage signal is switched from a first voltage value to a second voltage value, the first voltage value being lower than the second voltage value.
4. 4. The display panel of claim 1, wherein when the first display frame is a hold frame and the second display frame is a data write frame, the voltage value of the first reference voltage signal is switched from a first voltage value to a second voltage value, the first voltage value being higher than the second voltage value.
5. 5. The display panel according to claim 1, wherein if the second scan signal line provides a turn-on level in the first period, the first scan signal line provides a turn-on level in the second period; The start time of the first target segment is later than or synchronized with the end time of the first period, and the end time of the first target segment is earlier than or synchronized with the start time of the second period.
6. 6. The display panel of claim 1, wherein if the second scan signal line provides an on level at the first period of time and the first scan signal line continuously provides an off level at the vertical back porch section; The start time of the first target section is later than or synchronized with the end time of the first period, and the end time of the first target section is earlier than or synchronized with the end time of the vertical back porch section.
7. 7. The display panel according to claim 1, wherein if the second scanning signal line continuously provides a cut-off level under the vertical front porch section and the first scanning signal line provides a turn-on level under the second period; the start time of the first target section is later than or synchronized with the start time of the vertical front porch section, and the end time of the first target section is earlier than or synchronized with the end time of the second period.
8. 8. The display panel of claim 1, wherein when the first display frame is a data write frame and the second display frame is a hold frame, the second display frame further includes a second target segment therein; The first pixel circuit comprises a first initialization stage in the second display frame, wherein in the first initialization stage, the first scanning signal line provides a conduction level; The starting time of the second target section is later than or synchronous with the starting time of the second display frame, the ending time of the second target section is earlier than or synchronous with the starting time of the first initialization stage, and the second target section does not comprise the stage of providing the conduction level by the first scanning signal line; the first reference voltage signal terminal is used for providing a first reference voltage signal, and the second reference voltage signal terminal is used for providing a second reference voltage signal; And the voltage value of the first reference voltage signal provided by the first reference voltage signal end is a fourth voltage value from the second target time to the end time of the second target section, wherein the third voltage value is different from the fourth voltage value.
9. 9. The display panel of claim 1, wherein when the first display frame is a hold frame and the second display frame is a data write frame, a third target section is further included in the first display frame; the second pixel circuit comprises a first initialization stage in the first display frame, wherein in the first initialization stage, the second scanning signal line provides a conduction level; the starting time of the third target section is later than or synchronous with the ending time of the first initialization stage, and the ending time of the third target section is earlier than or synchronous with the ending time of the first display frame; the first reference voltage signal terminal is used for providing a first reference voltage signal, and the first reference voltage signal terminal is used for providing a first reference voltage signal; And the first reference voltage signal provided by the first reference voltage signal end is a sixth voltage value from the third target time to the end time of the third target section, wherein the fifth voltage value is different from the sixth voltage value.
10. 10. The display panel of claim 1, wherein the start time of the first target section is later than or synchronized with a first time that is 22 line scan times later than the start time of the vertical front porch section; The end time of the first target section is earlier than or synchronous with the second time, and the second time is the time when the end time of the vertical back porch section is shifted forward by 30 times of line scanning time.
11. 11. The display panel of claim 1, wherein the second pixel circuit comprises N first initialization stages within a first reference section, N being a positive integer, wherein the first reference section consists of a working section and the vertical front porch section corresponding to the first display frame; the first pixel circuit comprises N first initialization stages in a second reference section, wherein the second reference section consists of a working section corresponding to the vertical back porch section and the second display frame.
12. 12. The display panel of claim 11, wherein if N is 2, a first one of the first initialization phases of the second pixel circuit is located in a corresponding working section of the first display frame; a second one of the first initialization phases of the second pixel circuit is located within the vertical front porch section; the first initialization stage of the first pixel circuit is located in the vertical back porch section, and the second initialization stage of the first pixel circuit is located in the working section corresponding to the second display frame.
13. 13. The display panel according to claim 1, wherein the pixel circuit further comprises a driving module, a bias reset module, and a data writing module; the driving module is used for driving the light-emitting element to emit light; The bias reset module is used for transmitting a bias reset voltage signal provided by a bias reset voltage signal end to the source drain electrode of the driving module under the control of the bias reset signal end so as to reset the source drain electrode of the driving module; The control end of the data writing module is electrically connected with the second scanning signal end, the first end of the data writing module is electrically connected with the data signal end, and the second end of the data writing module is electrically connected with the first end of the driving module.
14. 14. The display panel of claim 13, wherein the display panel includes a first pixel circuit and a second pixel circuit, wherein in one display frame, the first pixel circuit is in a first row of scanned pixel circuits and the second pixel circuit is in a last row of scanned pixel circuits; the bias reset signal end in the first pixel circuit is electrically connected with the first scanning signal line, and the bias reset signal end in the second pixel circuit is electrically connected with the second scanning signal line.
15. 15. The display panel of claim 13, wherein the display panel includes a first pixel circuit and a second pixel circuit, wherein in one display frame, the first pixel circuit is in a first row of scanned pixel circuits and the second pixel circuit is in a last row of scanned pixel circuits; The end time of the data writing stage of the second pixel circuit is earlier than or synchronous with the start time of the vertical front corridor section, and the start time of the data writing stage of the first pixel circuit is later than or synchronous with the end time of the vertical rear corridor section.
16. 16. The display panel of claim 15, wherein the second pixel circuit comprises 2 first initialization phases within a first reference section, the first reference section consisting of a working section and the vertical front porch section corresponding to the first display frame; the first pixel circuit comprises 2 first initialization stages in a second reference section, wherein the second reference section consists of a working section corresponding to the vertical back porch section and the second display frame; A first one of the first initialization phases of the second pixel circuit is located before a data writing phase of the second pixel circuit; a second one of the first initialization phases of the second pixel circuit is located within the vertical front porch section; The first initialization stage of the first pixel circuit is located within the vertical back porch section, and the second first initialization stage of the first pixel circuit is located after the data writing stage of the first pixel circuit.
17. 17. The display panel of claim 13, wherein the pixel circuit further comprises a threshold compensation module, a second initialization module, a storage module, a first light emission control module, and a second light emission control module; the control end of the threshold compensation module is electrically connected with the third scanning signal end, the first end of the threshold compensation module is electrically connected with the control end of the driving module, and the second end of the threshold compensation module is electrically connected with the second end of the driving module; the control end of the second initialization module is electrically connected with the fourth scanning signal end, the first end of the second initialization module is electrically connected with the second reference voltage signal end, and the second end of the second initialization module is electrically connected with the control end of the driving module; The first end of the storage module is electrically connected with the first power supply voltage signal end, and the second end of the storage module is electrically connected with the control end of the driving module; The control end of the first light-emitting control module is electrically connected with the light-emitting control signal end, the first end of the first light-emitting control module is electrically connected with the first power supply voltage signal end, and the second end of the first light-emitting control module is electrically connected with the first end of the driving module; The control end of the second light-emitting control module is electrically connected with the light-emitting control signal end, the first end of the second light-emitting control module is electrically connected with the second end of the driving module, and the second end of the second light-emitting control module is electrically connected with the first electrode of the light-emitting element.
18. 18. A driving method applied to the display panel according to any one of claims 1 to 17, comprising: in the first target section, the voltage value of the first reference voltage signal is switched.
19. 19. The driving method according to claim 18, wherein the display panel includes a plurality of pixel circuits therein, the pixel circuits including a first initialization module; The first initialization module is used for transmitting a first reference voltage signal provided by a first reference voltage signal end to a first pole of the light-emitting element under the control of a first scanning signal end so as to reset the first pole of the light-emitting element; The driving method further includes: Controlling the voltage value of a first reference voltage signal provided by the first reference voltage signal end to be a first voltage value from the starting time of the first target section to the first target time; And controlling the voltage value of the first reference voltage signal provided by the first reference voltage signal end to be a second voltage value from the first target time to the end time of the first target section, wherein the first voltage value is different from the second voltage value.
20. 20. A display device comprising the display panel according to any one of claims 1 to 17.

Description

Display panel, driving method and display device Technical Field The application belongs to the technical field of display panels, and particularly relates to a display panel, a driving method and a display device. Background With rapid development of display technology, new display panels such as an Organic LIGHT EMITTING (OLED) display panel and a Micro LIGHT EMITTING (Micro LED) display panel are layered, and full-screen display has become a development trend of mobile display devices such as mobile phones. However, in the current use process of the display panel, the problem of uneven brightness of the display screen is easy to occur. Disclosure of Invention The embodiment of the application provides a display panel, a driving method and a display device, which can effectively and fully improve the problem of uneven display brightness of the display panel and effectively improve the display effect of the display panel. In a first aspect, an embodiment of the present application provides a display panel, including: The display panel comprises a display blank section between a first display frame and a second display frame, wherein the display blank section comprises a first target section; in the first target section, the voltage value of the first reference voltage signal is switched. Based on the same inventive concept, in a second aspect, an embodiment of the present application provides a driving method applied to the display panel of the foregoing first aspect embodiment, the driving method including: in the first target section, the voltage value of the first reference voltage signal is switched. Based on the same inventive concept, in a third aspect, embodiments of the present application provide a display device including a display panel as in the foregoing first aspect embodiment. According to the display panel, the driving method and the display device provided by the embodiment of the application, the voltage value of the first reference voltage signal is switched in the first target section to adjust the reset initialization degree of the light emitting element in the second display frame to be different from the reset initialization degree of the light emitting element in the first display frame, so that the brightness balance between adjacent display frames (for example, the first display frame is a holding frame and the second display frame is a data writing frame) is maintained. Meanwhile, the first reference voltage signal does not initialize the first pole of the light-emitting element in the first target section, so that the first target section switches the voltage value of the first reference voltage signal, and the voltage value of the first reference voltage signal is not jumped in the process of initializing the first pole of the light-emitting element, thereby causing the initialization of the light-emitting element to be adversely affected. According to the display panel, the driving method and the display device, the switching time sequence position of the voltage value of the first reference voltage signal is limited to be the first target section, so that the voltage value does not jump when the display blank section resets the light-emitting element, and the brightness uniformity of the display panel is maintained. Drawings In order to more clearly illustrate the technical solution of the embodiments of the present application, the drawings that are needed to be used in the embodiments of the present application will be briefly described, and it is possible for a person skilled in the art to obtain other drawings according to these drawings without inventive effort. Fig. 1 is a timing diagram of a display panel according to an embodiment of the application; FIG. 2 is a timing diagram of another display panel according to an embodiment of the present application; FIG. 3 is a timing diagram of a display panel according to another embodiment of the present application; Fig. 4 is a schematic structural diagram of a pixel circuit according to an embodiment of the present application; Fig. 5 is a schematic structural diagram of a display panel according to an embodiment of the present application; FIG. 6 is a timing diagram of a display panel according to another embodiment of the present application; FIG. 7 is a timing diagram of a display panel according to another embodiment of the present application; FIG. 8 is a timing diagram of a display panel according to another embodiment of the present application; FIG. 9 is a timing diagram of a display panel according to another embodiment of the present application; FIG. 10 is a timing diagram of a display panel according to another embodiment of the present application; FIG. 11 is a timing diagram of a display panel according to another embodiment of the present application; fig. 12 is a schematic structural diagram of another pixel circuit according to an embodiment of the present application; FIG. 13 is a timing diagram of a displ