CN-117134712-B - Operational amplifier circuit
Abstract
Embodiments of the present disclosure provide an operational amplifier circuit that includes a current source circuit, first and second input circuits, first and second voltage control circuits, a current mirror circuit, and an output circuit. The current source circuit distributes a constant current to the first and second input circuits and the second voltage control circuit. The first input circuit generates and provides a first current signal to the first voltage control circuit. The first voltage control circuit transmits a first current signal to the current mirror circuit and controls the voltage of the third node according to the voltage of the second node. The current mirror circuit generates and distributes a mirror signal of the first current signal to the second voltage control circuit and the output circuit. The second voltage control circuit controls the voltage of the second node according to the voltage of the fourth node so that the voltages of the third and fourth nodes are equal. The second input circuit generates and provides a second current signal to the output circuit. The output circuit generates an output signal based on the assigned image signal and the second current signal.
Inventors
- LIN XIXIAN
- YU XIANG
- XIAO FEI
Assignees
- 圣邦微电子(北京)股份有限公司
Dates
- Publication Date
- 20260512
- Application Date
- 20220518
Claims (10)
- 1. An operational amplifier circuit includes a current source circuit, a first input circuit, a second input circuit, a first voltage control circuit, a second voltage control circuit, a current mirror circuit, and an output circuit, Wherein the current source circuit is configured to distribute a constant current to the first input circuit, the second voltage control circuit, and the second input circuit; The first input circuit is configured to generate a first current signal from a first input terminal and to provide the first current signal to the first voltage control circuit via a first node; The first voltage control circuit is coupled to the second voltage control circuit via a second node and is configured to pass the first current signal to the current mirror circuit via a third node and to control the voltage of the third node in accordance with the voltage of the second node; The current mirror circuit is configured to generate an image signal of the first current signal and distribute the image signal to the second voltage control circuit and the output circuit via a fourth node; the second voltage control circuit is configured to control the voltage of the second node so that the voltage of the third node is equal to the voltage of the fourth node according to the voltage of the fourth node; The second input circuit is configured to generate a second current signal from a second input terminal and to provide the second current signal to the output circuit; The output circuit is configured to generate an output signal from the distributed image signal and the second current signal, and to output the output signal from a signal output terminal.
- 2. The operational amplifier circuit according to claim 1, wherein the ratio of the constant current that the current source circuit distributes to the first input circuit, the second voltage control circuit, and the second input circuit is (n+a): a: N, where a is less than or equal to N.
- 3. The operational amplifier circuit of claim 1, wherein the first voltage control circuit comprises a first transistor, The control electrode of the first transistor is coupled to the second node, the first electrode of the first transistor is coupled to the third node, and the second electrode of the first transistor is coupled to the first node.
- 4. The operational amplifier circuit of claim 1, wherein the current mirror circuit comprises a second transistor and a third transistor, Wherein a control electrode of the second transistor is coupled to the control electrode of the third transistor and the first node, a first electrode of the second transistor is coupled to the first electrode of the third transistor and the first voltage terminal, and a second electrode of the second transistor is coupled to the third node; a second pole of the third transistor is coupled to the fourth node.
- 5. The operational amplifier circuit of claim 1, wherein the second voltage control circuit comprises a fourth transistor and a fifth transistor, Wherein a control electrode of the fourth transistor is coupled to the second node and a second electrode of the fourth transistor, and a first electrode of the fourth transistor is coupled to the fourth node; the control electrode of the fifth transistor is coupled to the second input end, the first electrode of the fifth transistor is coupled to the output end of the current source circuit, and the second electrode of the fifth transistor is coupled to the second electrode of the fourth transistor.
- 6. The operational amplifier circuit of claim 5, wherein the second voltage control circuit further comprises a sixth transistor and a seventh transistor, Wherein a control electrode of the sixth transistor is coupled to the control electrode of the fourth transistor and a second electrode of the sixth transistor, a first electrode of the sixth transistor being coupled to the fourth node; The control electrode of the seventh transistor is coupled to the second input terminal, the first electrode of the seventh transistor is coupled to the output terminal of the current source circuit, and the second electrode of the seventh transistor is coupled to the second electrode of the sixth transistor.
- 7. The operational amplifier circuit of claim 1, wherein the output circuit comprises an eighth transistor, The control electrode of the eighth transistor is coupled to the bias voltage end, the first electrode of the eighth transistor is coupled to the fourth node, and the second electrode of the eighth transistor is coupled to the signal output end.
- 8. An operational amplifier circuit includes first to fifth transistors, eighth to tenth transistors, and a current source circuit, The control electrode of the first transistor is coupled with the control electrode of the fourth transistor and the second electrode of the fourth transistor, the first electrode of the first transistor is coupled with the second electrode of the second transistor, and the second electrode of the first transistor is coupled with the control electrode of the second transistor, the control electrode of the third transistor and the second electrode of the ninth transistor; A first pole of the second transistor is coupled to a first pole of the third transistor and a first voltage terminal; a second pole of the third transistor is coupled to the first pole of the fourth transistor and the first pole of the eighth transistor; The second pole of the fourth transistor is coupled to the second pole of the fifth transistor; The control electrode of the fifth transistor is coupled with the second input end, and the first electrode of the fifth transistor is coupled with the output end of the current source circuit; the control electrode of the eighth transistor is coupled with the bias voltage end, and the second electrode of the eighth transistor is coupled with the signal output end; a control electrode of the ninth transistor is coupled to a first input end, and a first electrode of the ninth transistor is coupled to the output end of the current source circuit; The control electrode of the tenth transistor is coupled to the second input end, the first electrode of the tenth transistor is coupled to the output end of the current source circuit, and the second electrode of the tenth transistor is coupled to the signal output end; The current source circuit is configured to distribute a constant current to the ninth transistor, the fifth transistor, and the tenth transistor.
- 9. The operational amplifier circuit of claim 8, wherein the ninth transistor has a width to length ratio of the fifth transistor equal to (n+a): a: N and the first transistor has a width to length ratio of the fourth transistor equal to (n+a): a: N, where a is less than or equal to N.
- 10. The operational amplifier circuit of claim 8, further comprising a sixth transistor and a seventh transistor, Wherein a control electrode of the sixth transistor is coupled to a second electrode of the fourth transistor and a second electrode of the sixth transistor, a first electrode of the sixth transistor is coupled to the first electrode of the fourth transistor; A control electrode of the seventh transistor is coupled to the second input terminal, a first electrode of the seventh transistor is coupled to the output terminal of the current source circuit, and a second electrode of the seventh transistor is coupled to the second electrode of the sixth transistor; The current source circuit is further configured to distribute a constant current to the seventh transistor; The width-to-length ratio of the ninth transistor to the fifth transistor is equal to (N+a) a b (N-b), the width-to-length ratio of the first transistor to the fourth transistor to the eighth transistor is equal to (N+a) a b (N-b), and a is less than or equal to N and b is less than N.
Description
Operational amplifier circuit Technical Field Embodiments of the present disclosure relate to the field of integrated circuit technology, and in particular, to an operational amplifier circuit. Background Cascode amplifiers (cascode amplifiers) are widely used in integrated circuits. The cascode amplifier circuit may include two structures—a common source structure and a common gate structure. The common source structure may be formed by two transistors with their sources connected, and the common gate structure may be formed by two transistors with their gates connected. The common source structure and the common gate structure are cascaded together to form a cascode circuit. The cascode amplifier circuit has the characteristics of high bandwidth, high gain and high output impedance, and can be used for improving the performance of an integrated circuit. Disclosure of Invention Embodiments described herein provide an operational amplifier circuit. According to a first aspect of the present disclosure, an operational amplifier circuit is provided. The operational amplifier circuit includes a current source circuit, a first input circuit, a second input circuit, a first voltage control circuit, a second voltage control circuit, a current mirror circuit, and an output circuit. Wherein the current source circuit is configured to distribute a constant current to the first input circuit, the second voltage control circuit, and the second input circuit. The first input circuit is configured to generate a first current signal from a first input signal from the first input terminal and to provide the first current signal to the first voltage control circuit via the first node. The first voltage control circuit is coupled to the second voltage control circuit via the second node and is configured to pass the first current signal to the current mirror circuit via the third node and to control the voltage of the third node in accordance with the voltage of the second node. The current mirror circuit is configured to generate an image signal of the first current signal and distribute the image signal to the second voltage control circuit and the output circuit via the fourth node. The second voltage control circuit is configured to control the voltage of the second node so that the voltage of the third node is equal to the voltage of the fourth node according to the voltage of the fourth node. The second input circuit is configured to generate a second current signal from a second input signal from the second input terminal and to provide the second current signal to the output circuit. The output circuit is configured to generate an output signal from the distributed image signal and the second current signal, and to output the output signal from the signal output terminal. In some embodiments of the present disclosure, the ratio of the constant current that the current source circuit distributes to the first input circuit, the second voltage control circuit, and the second input circuit is (n+a): a: N. Wherein a is less than or equal to N. In some embodiments of the present disclosure, a is equal to 1 and n is greater than 1. In some embodiments of the present disclosure, the first voltage control circuit includes a first transistor. The control electrode of the first transistor is coupled to the second node. The first electrode of the first transistor is coupled to the third node. The second pole of the first transistor is coupled to the first node. In some embodiments of the present disclosure, a current mirror circuit includes a second transistor and a third transistor. The control electrode of the second transistor is coupled with the control electrode of the third transistor and the first node. The first electrode of the second transistor is coupled to the first electrode of the third transistor and the first voltage terminal. The second electrode of the second transistor is coupled to the third node. The second pole of the third transistor is coupled to the fourth node. In some embodiments of the present disclosure, the second voltage control circuit includes a fourth transistor and a fifth transistor. The control electrode of the fourth transistor is coupled to the second node and the second electrode of the fourth transistor. The first pole of the fourth transistor is coupled to the fourth node. The control electrode of the fifth transistor is coupled to the second input terminal. The first pole of the fifth transistor is coupled to the output terminal of the current source circuit. The second pole of the fifth transistor is coupled to the second pole of the fourth transistor. In some embodiments of the present disclosure, the second voltage control circuit further includes a sixth transistor and a seventh transistor. The control electrode of the sixth transistor is coupled to the control electrode of the fourth transistor and the second electrode of the sixth transistor. The first pole of the sixth transisto