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CN-117293109-B - Semiconductor packaging structure and wire bonding method

CN117293109BCN 117293109 BCN117293109 BCN 117293109BCN-117293109-B

Abstract

The embodiment of the invention provides a semiconductor packaging structure and a wire bonding method, wherein the semiconductor packaging structure comprises a first wire bonding area, a second welding pad, a wire bonding, a first bonding wire, a first wire segment and a second wire segment, wherein the first wire bonding area is provided with a first welding pad, the second wire bonding area is provided with a second welding pad, the second wire bonding area comprises a first bonding wire which is connected between the first welding pad and the second welding pad, the first bonding wire is provided with a pressing part and a first wire segment which is connected between the pressing part and the first welding pad, the distance between the pressing part and a plane of the second wire bonding area is a first height, the first height is smaller than 400 mu m, the length of orthographic projection of the first bonding wire on a plane of the second wire bonding area is a first length, and the length of orthographic projection of the first wire segment on the plane of the second wire bonding area is a second length, and the second length is 20% -80% of the first length. The embodiment of the invention can avoid the occurrence of the line collision problem so as to improve the product quality and the yield.

Inventors

  • GUO XIAOPENG
  • YU JIANMING
  • WANG ZIYUAN
  • LUO JUNRUI
  • LIU LIJIAO

Assignees

  • 泉州市三安集成电路有限公司

Dates

Publication Date
20260508
Application Date
20231009

Claims (15)

  1. 1. The wire bonding method is characterized by being applied to a structure to be bonded, wherein the structure to be bonded comprises a first wire bonding area and a second wire bonding area, a first bonding pad is arranged on the first wire bonding area, a second bonding pad is arranged on the second wire bonding area, a third bonding pad adjacent to the first bonding pad is further arranged on the first wire bonding area, a fourth bonding pad opposite to the third bonding pad is further arranged on the second wire bonding area, and the projection length of a connecting line between the first bonding pad and the second bonding pad on a plane where the second wire bonding area is located is a first length; The wire bonding method comprises the following steps: step 1, forming a first bonding wire between the first bonding pad and the second bonding pad through a bonding wire tool; step 2, after the first bonding wire is formed, forming a second bonding wire between the third bonding pad and the fourth bonding pad through a bonding wire tool; in the step 1, a pressing part is formed on the first bonding wire, so as to provide an avoidance space for the bonding wire tool in the step 2, so as to avoid collision of the bonding wire tool on the first bonding wire; The distance between the pressing part and the plane where the second wire bonding connection area is located is a first height, the first height is smaller than 400 microns and is larger than or equal to one time of the wire diameter of a bonding wire, the bonding wire comprises a first bonding wire and a second bonding wire, the length of orthographic projection of a connecting line between the pressing part and the first bonding pad on the plane where the second wire bonding connection area is located is a second length, and the second length is 20% -80% of the first length.
  2. 2. The wire bonding method of claim 1, wherein the wire bonding method specifically comprises: And when the wire bonding tool moves to a preset position, the wire bonding tool is pressed down towards the direction close to the second wire bonding connection area to form the pressing part on the first wire bonding, and the first height is smaller than the tip height of the wire bonding tool.
  3. 3. The wire bonding method of claim 1 wherein the fourth bond pad is located on a side of the second bond pad adjacent to the first bond pad.
  4. 4. The bonding method of claim 3, wherein the structure to be bonded further comprises a fifth bonding pad, a sixth bonding pad and a third bonding wire connected between the fifth bonding pad and the sixth bonding pad, wherein the fifth bonding pad is disposed on the first wire bonding area and is located on a side of the first bonding pad away from the third bonding pad, the fifth bonding pad is adjacent to the first bonding pad, the sixth bonding pad is disposed on the second wire bonding area and is located on a side of the second bonding pad away from the fourth bonding pad, and the sixth bonding pad is adjacent to the second bonding pad.
  5. 5. The wire bonding method of claim 1 wherein the orthographic projection of the first wire bond on the plane of the second wire bond region intersects the orthographic projection of the wire bond between the third and fourth bond pads on the plane of the second wire bond region at an intersection point.
  6. 6. A semiconductor package structure, comprising: a first wire bonding area, wherein a first welding pad and a third welding pad adjacent to the first welding pad are arranged on the first wire bonding area; The second wire bonding connection area is provided with a second welding pad and a fourth welding pad opposite to the third welding pad, and the fourth welding pad is positioned at one side of the second welding pad close to the first welding pad; the bonding wire obtained by the bonding wire method according to claim 1, wherein the bonding wire comprises a first bonding wire connected between the first bonding pad and the second bonding pad, the first bonding wire having a pressing portion and a first line segment connected between the pressing portion and the first bonding pad; The distance between the pressing part and the plane where the second wire bonding connection area is located is a first height, the first height is smaller than 400 microns and is larger than or equal to one time of the wire diameter of the bonding wire, the length of orthographic projection of the first bonding wire on the plane where the second wire bonding connection area is located is a first length, the length of orthographic projection of the first wire section on the plane where the second wire bonding connection area is located is a second length, the second length is 20% -80% of the first length, and the pressing part is located in a range of 200 microns in front and back of the alignment position of the first bonding wire and the fourth bonding pad.
  7. 7. The semiconductor package according to claim 6, wherein a first set of bonding pads formed by the first bonding pad and the second bonding pad is arranged in parallel with a second set of bonding pads formed by the third bonding pad and the fourth bonding pad, a length of orthographic projection of a wire of the fourth bonding pad and the third bonding pad on a plane where the second wire bonding area is located is a third length, and a difference between the second length and the third length is-200 μm to 200 μm.
  8. 8. The semiconductor package according to claim 6, wherein a first set of bonding pads formed by the first bonding pad and the second bonding pad and a second set of bonding pads formed by the third bonding pad and the fourth bonding pad are arranged in an inclined manner, a connecting line between the first bonding pad and the third bonding pad is a first reference line, a length of orthographic projection of a shortest connecting line between the fourth bonding pad and the first reference line on a plane where the second wire bonding connection area is located is a fourth length, and an orthographic projection length of a shortest connecting line between the pressing portion and the first reference line on a plane where the second wire bonding connection area is located is a fifth length, wherein a difference between the fifth length and the fourth length is-200 μm to 200 μm.
  9. 9. The semiconductor package structure of claim 6, wherein a first set of bonding pads formed by the first bonding pads and the second bonding pads and a second set of bonding pads formed by the third bonding pads and the fourth bonding pads are arranged in an inclined manner, orthographic projection of the first bonding wires on a plane where the second bonding connection area is located is a first projection line, a perpendicular line from the fourth bonding pads to the first projection line intersects with the first projection line at a first foot, orthographic projection length of a connecting line of the first foot and the first bonding pads on the plane where the second bonding connection area is located is a foot distance, and a difference between the second length and the foot distance is-100 μm.
  10. 10. The semiconductor package according to any one of claims 6 to 9, further comprising a carrier, wherein the first wire bonding area and the second wire bonding area are both located on a surface of the carrier and are located in different areas of the carrier.
  11. 11. The semiconductor package according to any one of claims 6 to 9, further comprising a first carrier and a second carrier, wherein the first wire bonding area is located on the first carrier, and the second wire bonding area is located on the second carrier.
  12. 12. A semiconductor package structure, comprising: a first wire bonding area, wherein a first welding pad and a third welding pad adjacent to the first welding pad are arranged on the first wire bonding area; a second wire bonding connection region, on which a second bonding pad and a fourth bonding pad opposite to the third bonding pad are arranged; The bonding wire obtained by the bonding wire method according to claim 1, wherein the bonding wire comprises a first bonding wire and a second bonding wire, the first bonding wire is connected between the first bonding pad and the second bonding pad, the second bonding wire is connected between the third bonding pad and the fourth bonding pad, the second bonding wire is positioned above the first bonding wire, the first bonding wire is provided with a pressing part, and a first line segment connected between the pressing part and the first bonding pad; The distance between the pressing part and the plane of the second wire bonding connection area is a first height, the first height is smaller than 400 microns and is larger than or equal to one time of the wire diameter of the bonding wire, the length of orthographic projection of the first bonding wire on the plane of the second wire bonding connection area is a first length, the length of orthographic projection of the first wire section on the plane of the second wire bonding connection area is a second length, the second length is 20% -80% of the first length, orthographic projection of the first bonding wire on the plane of the second wire bonding connection area and orthographic projection of the second bonding wire on the plane of the second wire bonding connection area intersect at an intersection point, and the pressing part is located in a range of 200 microns in front of and behind the alignment position of the first bonding wire and the intersection point.
  13. 13. The semiconductor package according to claim 12, wherein a minimum distance between the first bonding wire and the second bonding wire is greater than or equal to one time a wire diameter of the bonding wire.
  14. 14. The semiconductor package according to any one of claims 12 to 13, further comprising a carrier, wherein the first wire bonding area and the second wire bonding area are both located on a surface of the carrier and are located in different areas of the carrier.
  15. 15. The semiconductor package according to any one of claims 12 to 13, further comprising a first carrier and a second carrier, wherein the first wire bonding area is located on the first carrier, and the second wire bonding area is located on the second carrier.

Description

Semiconductor packaging structure and wire bonding method Technical Field The present disclosure relates to semiconductor bonding wires, and particularly to a semiconductor package structure and a bonding wire method. Background Bonding wires are an important step in semiconductor packaging processes in which the wire is soldered to a corresponding pad by controlling the advancement of a wire bonding tool, such as a chopper, to effect electrical connection between the different pads. With the rapid development of technology, semiconductor products are being miniaturized, and therefore, gaps between bonding wires on semiconductor package products are becoming smaller. For the existing welding wire structure, when the welding wire spacing is smaller, a welding wire tool or a welding wire formed later can cause collision, extrusion or bending to the welding wire welded earlier, and serious bending can cause the extruded welding wire to collide with other welding wires, so that short circuit is caused after the collision, and the product is scrapped more seriously. Therefore, it is desirable to provide a semiconductor package structure to solve the problem that the conventional bonding wire structure is easy to bump. Disclosure of Invention Therefore, in order to overcome at least part of the defects in the prior art, the embodiment of the invention provides a semiconductor packaging structure and a wire bonding method, which can avoid the occurrence of wire bonding and improve the product quality and yield. The embodiment of the invention provides a semiconductor packaging structure, which comprises a first wire bonding area, a second wire bonding area, a bonding wire, a first wire segment and a second wire segment, wherein a first bonding pad is arranged on the first wire bonding area, a second bonding pad is arranged on the second wire bonding area, the bonding wire comprises a first bonding wire which is connected between the first bonding pad and the second bonding pad, the first bonding wire is provided with a pressing part and a first line segment which is connected between the pressing part and the first bonding pad, the distance between the pressing part and a plane of the second wire bonding area is a first height which is smaller than 400 mu m, the length of orthographic projection of the first bonding wire on the plane of the second wire bonding area is a first length, and the length of orthographic projection of the first line segment on the plane of the second wire bonding area is a second length which is 20% -80% of the first length. The embodiment of the invention provides a wire bonding method which is applied to a structure to be bonded, the structure to be bonded comprises a first wire bonding area, a second wire bonding area and a bonding wire, wherein a first bonding pad is arranged on the first wire bonding area, a second bonding pad is arranged on the second wire bonding area, the projection length of a wire between the first bonding pad and the second bonding pad on the second wire bonding area is a first length, a first bonding wire is formed between the first bonding pad and the second bonding pad, a pressing part is formed on the first bonding wire, the distance between the pressing part and a plane of the second wire bonding area is a first height, the first height is smaller than 400 mu m, the length of the orthographic projection of the wire between the pressing part and the first bonding pad on the plane of the second wire bonding area is a second length, and the second length is 20% -80% of the first length. The semiconductor packaging structure and the bonding wire method have the advantages that the pressing part is formed on the first bonding wire, the pressing part is lower in position by controlling the height and the forming position of the pressing part, and the first bonding wire is not easy to be extruded or collide by other bonding wires in the subsequent process of welding other bonding wires to cause the occurrence of a wire collision problem, so that the risk of wire collision short circuit can be reduced, and the product yield is improved. Drawings The following detailed description of specific embodiments of the invention refers to the accompanying drawings. Fig. 1 is a schematic elevation structure of a semiconductor package according to an embodiment of the invention. Fig. 2 is a schematic elevational view of a semiconductor package according to another embodiment of the invention. Fig. 3 is a schematic top view of the semiconductor package shown in fig. 2. Fig. 4 is a schematic elevational view of a semiconductor package according to another embodiment of the invention. Fig. 5 is a schematic top view of the semiconductor package shown in fig. 4. Fig. 6 is a schematic top view of a semiconductor package in accordance with still another embodiment of the present invention. Fig. 7 is a schematic elevational view of the semiconductor package shown in fig. 6. Fig. 8