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CN-117331396-B - Control circuit for controlling threshold voltage change of target MOS tube

CN117331396BCN 117331396 BCN117331396 BCN 117331396BCN-117331396-B

Abstract

Embodiments of the present disclosure provide a control circuit for controlling threshold voltage variation of a target MOS transistor. The control circuit comprises a reference threshold voltage generating circuit, a temperature deviation detecting circuit and a back gate voltage adjusting circuit. The reference threshold voltage generating circuit comprises a reference MOS tube. The reference threshold voltage generating circuit generates a reference threshold voltage according to the threshold voltage of the reference MOS tube. The temperature deviation detection circuit comprises a comparison MOS tube. The size of the reference MOS tube is the same as that of the target MOS tube. The threshold voltage of the reference MOS tube and the threshold voltage of the target MOS tube have the same temperature characteristic. The temperature deviation detection circuit controls the comparison MOS tube to be in the same working state as the target MOS tube, and generates comparison threshold voltage according to the threshold voltage of the comparison MOS tube. The back gate voltage adjusting circuit generates back gate voltage according to a first voltage difference between the reference threshold voltage and the comparison threshold voltage, and provides the back gate voltage to the back gate of the target MOS tube and the back gate of the comparison MOS tube.

Inventors

  • ZHANG YIZHEN

Assignees

  • 圣邦微电子（北京）股份有限公司

Dates

Publication Date
20260512
Application Date
20231009

Claims (9)

  1. 1. A control circuit for controlling the threshold voltage variation of a target MOS tube comprises a reference threshold voltage generating circuit, a temperature deviation detecting circuit and a back gate voltage adjusting circuit, The reference threshold voltage generation circuit comprises a reference MOS tube, and is configured to generate a reference threshold voltage according to the threshold voltage of the reference MOS tube; The temperature deviation detection circuit comprises a comparison MOS tube, wherein the size of the comparison MOS tube is the same as that of the target MOS tube, the threshold voltage of the comparison MOS tube and the threshold voltage of the target MOS tube have the same temperature characteristic, and the temperature deviation detection circuit is configured to control the comparison MOS tube to be in the same working state as the target MOS tube and generate comparison threshold voltage according to the threshold voltage of the comparison MOS tube; the back gate voltage adjustment circuit is configured to generate a back gate voltage according to a first voltage difference between the reference threshold voltage and the control threshold voltage, and provide the back gate voltage to a back gate of the target MOS transistor and a back gate of the control MOS transistor; wherein the back gate voltage adjusting circuit comprises a first operational amplifier and a back gate driving circuit, Wherein a first input terminal of the first operational amplifier is provided with the reference threshold voltage, a second input terminal of the first operational amplifier is provided with the comparison threshold voltage, and an error voltage is output from an output terminal of the first operational amplifier; the back gate drive circuit is configured to generate the back gate voltage from the error voltage.
  2. 2. The control circuit of claim 1, wherein the control MOS transistor and the target MOS transistor are PMOS transistors, the temperature deviation detection circuit further comprising a first current source and a first voltage control circuit, Wherein the first current source is coupled to the second pole of the control MOS transistor, the first current source being configured to provide a first constant current to the control MOS transistor; the first voltage control circuit is configured to generate a first control voltage equal to the sum of the comparison threshold voltage and the source gate voltage of the target MOS tube; The control electrode of the control MOS tube is coupled with the second electrode of the control MOS tube, the first electrode of the control MOS tube is provided with the first control voltage, and the control threshold voltage is output from the second electrode of the control MOS tube.
  3. 3. The control circuit of claim 1, wherein the control MOS transistor and the target MOS transistor are NMOS transistors, the temperature deviation detection circuit further comprises a first current source and a second voltage control circuit, Wherein the first current source is coupled to the first pole of the control MOS transistor, the first current source being configured to provide a first constant current to the control MOS transistor; The second voltage control circuit is configured to generate a second control voltage equal to the sum of the comparison threshold voltage and the gate-source voltage of the target MOS tube; the control electrode of the control MOS tube is coupled with the second electrode of the control MOS tube, the second electrode of the control MOS tube is provided with the second control voltage, and the control threshold voltage is output from the first electrode of the control MOS tube.
  4. 4. The control circuit according to claim 1 to 3, wherein the reference MOS transistor is a PMOS transistor, the reference threshold voltage generating circuit further comprises a second current source, Wherein the second current source is coupled to a second pole of the reference MOS transistor, the second current source being configured to provide a second constant current to the reference MOS transistor; the control electrode of the reference MOS tube is coupled with the second electrode of the reference MOS tube, the first electrode of the reference MOS tube is coupled with the first voltage end, and the reference threshold voltage is output from the control electrode of the reference MOS tube.
  5. 5. The control circuit according to any one of claims 1 to 3, wherein the reference MOS transistor is an NMOS transistor, the reference threshold voltage generation circuit further comprises a second current source, Wherein the second current source is coupled to a second pole of the reference MOS transistor, the second current source being configured to provide a second constant current to the reference MOS transistor; The control electrode of the reference MOS tube is coupled with the second electrode of the reference MOS tube, the first electrode of the reference MOS tube is coupled with the second voltage end, and the reference threshold voltage is output from the control electrode of the reference MOS tube.
  6. 6. The control circuit according to claim 4 or 5, wherein the reference threshold voltage generation circuit further comprises a process deviation detection circuit and a trimming circuit, The process variation detection circuit is configured to generate a trimming voltage from a second voltage difference between a reference voltage and the reference threshold voltage; The trimming circuit is configured to generate a trimming current according to the trimming voltage and provide the trimming current to the reference MOS tube from a second pole of the reference MOS tube so as to adjust the reference threshold voltage; Wherein the trimming current is inversely related to the second voltage difference.
  7. 7. The control circuit according to claim 1 to 3, wherein the reference threshold voltage generating circuit further comprises a second current source, a process deviation detecting circuit and a trimming circuit, Wherein the second current source is coupled to a second pole of the reference MOS transistor, the second current source being configured to provide a second constant current to the reference MOS transistor; the control electrode of the reference MOS transistor is coupled with the second electrode of the reference MOS transistor, the first electrode of the reference MOS transistor is coupled with the first voltage end when the reference MOS transistor is a PMOS transistor, and the first electrode of the reference MOS transistor is coupled with the second voltage end when the reference MOS transistor is an NMOS transistor; The process variation detection circuit is configured to generate a trimming voltage from a second voltage difference between a reference voltage and the reference threshold voltage; The trimming circuit comprises a switch control circuit, a plurality of voltage-controlled switches, a first resistor and a plurality of second resistors which are mutually connected in series between the first voltage end and the second voltage end; the first end of the first resistor is coupled with the first voltage end, the second end of the first resistor is coupled with the control electrode of the reference MOS tube and the first end of one second resistor, the first end of each second resistor is coupled with the first end of one voltage-controlled switch, the second end of the last second resistor far away from the first resistor is coupled with the second voltage end, the second end of each voltage-controlled switch is coupled with the output end of the trimming circuit, and the reference threshold voltage is output from the output end; the switch control circuit is configured to control one of the plurality of voltage-controlled switches to close according to the trimming voltage such that an equivalent resistance value between the first voltage terminal and the output terminal is inversely related to the second voltage difference.
  8. 8. The control circuit of claim 1, wherein the back gate voltage adjustment circuit further comprises an overvoltage protection circuit, The overvoltage protection circuit is configured to provide an enable signal at an invalid level to the back gate driving circuit in the case that the back gate voltage is higher than a preset safety voltage; the back gate drive circuit is further configured to limit the back gate voltage to the preset safety voltage if the enable signal is at the inactive level.
  9. 9. A control circuit for controlling the threshold voltage variation of a target MOS tube comprises a reference MOS tube, a comparison MOS tube, a first current source, a first voltage control circuit, a second current source, a first operational amplifier, a second operational amplifier, a third operational amplifier, a first voltage-controlled switch, a second voltage-controlled switch, an inverter, a first driving circuit, a second driving circuit and a trimming circuit, Wherein the reference MOS tube, the comparison MOS tube and the target MOS tube are PMOS transistors, the dimension of the comparison MOS tube is the same as that of the target MOS tube, the back grid electrode of the comparison MOS tube is coupled with the back grid electrode of the comparison MOS tube, The first current source is coupled to the second pole of the control MOS transistor, and is configured to provide a first constant current to the control MOS transistor; The first voltage control circuit is configured to generate a first control voltage equal to a sum of a control threshold voltage and a source gate voltage of the target MOS transistor, the control threshold voltage being a voltage at a second pole of the control MOS transistor; the control electrode of the control MOS tube is coupled with the second electrode of the control MOS tube, and the first electrode of the control MOS tube is provided with the first control voltage; the second current source is coupled to a second pole of the reference MOS transistor, and is configured to provide a second constant current to the reference MOS transistor; the control electrode of the reference MOS tube is coupled with the second electrode of the reference MOS tube, the first electrode of the reference MOS tube is coupled with the first voltage end, and the reference threshold voltage is output from the control electrode of the reference MOS tube; A first input end of the first operational amplifier is provided with the reference threshold voltage, a second input end of the first operational amplifier is provided with the contrast threshold voltage, and an error voltage is output from an output end of the first operational amplifier; The first input end of the second operational amplifier is provided with a preset safety voltage, the second input end of the second operational amplifier is coupled with the back grid electrode of the target MOS tube, and an enabling signal is output from the output end of the second operational amplifier; The first driving circuit is configured to increase a driving force of the error voltage to generate a first driving voltage; The second driving circuit is configured to increase a driving force of the preset safety voltage to generate a second driving voltage; The controlled end of the first voltage-controlled switch is provided with the enabling signal, the first end of the first voltage-controlled switch is provided with the first driving voltage, and the second end of the first voltage-controlled switch is coupled with the back grid electrode of the target MOS tube; The input end of the inverter is provided with the enabling signal, and the output end of the inverter is coupled with the controlled end of the second voltage-controlled switch; The first end of the second voltage-controlled switch is provided with the second driving voltage, and the second end of the second voltage-controlled switch is coupled with the back grid electrode of the target MOS tube; the first input end of the third operational amplifier is provided with a reference voltage, the second input end of the third operational amplifier is provided with the reference threshold voltage, and a trimming voltage is output from the output end of the third operational amplifier; The trimming circuit is configured to generate a trimming current according to the trimming voltage and provide the trimming current to the reference MOS tube from a second pole of the reference MOS tube so as to adjust the reference threshold voltage; wherein the trimming current is inversely related to the trimming voltage.

Description

Control circuit for controlling threshold voltage change of target MOS tube Technical Field The embodiment of the disclosure relates to the technical field of integrated circuits, in particular to a control circuit for controlling threshold voltage change of a target MOS tube. Background In the design of complementary metal oxide semiconductor (Complementary Metal Oxide Semiconductor, CMOS) integrated circuits, MOS transistor parameters may deviate from Process (Process) to Process (Temperature), and in addition, circuit variations in circuit supply Voltage (Voltage) may also cause circuit variations, thereby directly affecting the overall performance of the circuit, so it is important to reduce the influence of Process-Voltage-Temperature (PVT) on the circuit. Process variations affect the intrinsic doping concentration and thus the threshold voltage of CMOS, and temperature variations also cause fermi level variations and thus threshold voltage variations with temperature. The slight deviation of the threshold voltage has obvious influence on the circuit performance of the analog circuit, and even the digital circuit cannot work normally when the deviation is serious. Disclosure of Invention Embodiments described herein provide a control circuit for controlling threshold voltage variation of a target MOS transistor. According to a first aspect of the present disclosure, a control circuit for controlling a threshold voltage variation of a target MOS transistor is provided. The control circuit comprises a reference threshold voltage generating circuit, a temperature deviation detecting circuit and a back gate voltage adjusting circuit. The reference threshold voltage generating circuit comprises a reference MOS tube. The reference threshold voltage generation circuit is configured to generate a reference threshold voltage according to a threshold voltage of the reference MOS transistor. The temperature deviation detection circuit comprises a comparison MOS tube. The size of the reference MOS tube is the same as that of the target MOS tube. The threshold voltage of the reference MOS tube and the threshold voltage of the target MOS tube have the same temperature characteristic. The temperature deviation detection circuit is configured to control the control MOS tube to be in the same working state as the target MOS tube and generate a control threshold voltage according to the threshold voltage of the control MOS tube. The back gate voltage adjustment circuit is configured to generate a back gate voltage from a first voltage difference between the reference threshold voltage and provide the back gate voltage to the back gate of the target MOS transistor and the back gate of the reference MOS transistor. In some embodiments of the present disclosure, the control MOS transistor and the target MOS transistor are PMOS transistors. The temperature deviation detection circuit further includes a first current source and a first voltage control circuit. The first current source is coupled to the second pole of the reference MOS tube. The first current source is configured to provide a first constant current to the control MOS transistor. The first voltage control circuit is configured to generate a first control voltage. The first control voltage is equal to the sum of the comparison threshold voltage and the source gate voltage of the target MOS transistor. The control electrode of the control MOS tube is coupled with the second electrode of the control MOS tube. The first pole of the reference MOS transistor is provided with a first control voltage. And outputting the reference threshold voltage from the second pole of the reference MOS transistor. In some embodiments of the present disclosure, the control MOS transistor and the target MOS transistor are NMOS transistors. The temperature deviation detection circuit further comprises a first current source and a second voltage control circuit. The first current source is coupled to the first pole of the reference MOS transistor. The first current source is configured to provide a first constant current to the control MOS transistor. The second voltage control circuit is configured to generate a second control voltage. The second control voltage is equal to the sum of the comparison threshold voltage and the gate-source voltage of the target MOS tube. The control electrode of the control MOS tube is coupled with the second electrode of the control MOS tube. The second pole of the reference MOS transistor is provided with a second control voltage. The control threshold voltage is output from the first pole of the control MOS transistor. In some embodiments of the present disclosure, the reference MOS transistor is a PMOS transistor. The reference threshold voltage generation circuit further includes a second current source. The second current source is coupled to the second pole of the reference MOS tube. The second current source is configured to provide a second con