CN-117369191-B - Display panel and display device

CN117369191BCN 117369191 BCN117369191 BCN 117369191BCN-117369191-B

Abstract

The embodiment of the invention provides a display panel and a display device, relates to the technical field of display, and aims to prevent punching in color resistance while electrically connecting a pixel electrode and a corresponding transistor. The display panel comprises an array substrate, color resistors, pixel electrodes and a first transistor, wherein the array substrate is positioned on the same side of a substrate, the first transistor comprises a first semiconductor layer, the color resistors are positioned between the first semiconductor layer and the pixel electrodes along the direction perpendicular to the plane of the substrate, the first semiconductor layer and the pixel electrodes are electrically connected through first connecting parts, the first connecting parts comprise first sub-connecting parts positioned in first connecting holes, the orthographic projection of the first sub-connecting parts on the plane of the substrate and the orthographic projection of the color resistors on the plane of the substrate are not overlapped, the first sub-connecting parts and the color resistors at least partially overlap along the direction parallel to the plane of the substrate, or the first semiconductor layer and the pixel electrodes are positioned on the same side of the color resistors along the direction perpendicular to the plane of the substrate.

Inventors

CHU DANDAN
YANG XIAODONG
YAN YE
WANG JIANDONG
LI XIONGPING

Assignees

上海天马微电子有限公司

Dates

Publication Date: 20260505
Application Date: 20230927

Claims (13)

1. A display panel, comprising an array substrate, wherein the array substrate comprises a substrate, the array substrate is provided with a display area, and the display area comprises a color resistor, a pixel electrode and a first transistor which are positioned on the same side of the substrate; The first transistor includes a first semiconductor layer, wherein, The color resistor is positioned between the first semiconductor and the pixel electrode along the direction perpendicular to the plane of the substrate, and the first semiconductor layer and the pixel electrode are electrically connected through a first connecting part, wherein the first connecting part comprises a first sub-connecting part positioned in a first connecting hole, the orthographic projection of the first sub-connecting part on the plane of the substrate and the orthographic projection of the color resistor on the plane of the substrate are not overlapped, and the first sub-connecting part and the color resistor are at least partially overlapped along the direction parallel to the plane of the substrate; The first connection part further comprises a first connection electrode; the array substrate further comprises a first light blocking part positioned in the display area, The first light blocking part comprises a first sub light blocking part extending along a first direction, the first sub light blocking part is positioned between two adjacent color resistors in a second direction, the first direction and the second direction are intersected, the first connecting electrode is not overlapped with the first sub light blocking part along a direction perpendicular to a plane of the substrate, The array substrate comprises a first film layer, wherein the first film layer comprises a first part and a second part which are mutually insulated, the first part comprises the first sub light-blocking part, and the second part comprises the first connecting electrode; The first light blocking part further comprises a second sub light blocking part extending along the second direction, wherein the second sub light blocking part is positioned between two adjacent color resistors in the first direction; The first connecting electrode and the second sub-light-blocking part at least partially overlap in a direction perpendicular to a plane of the substrate.
2. The display panel of claim 1, wherein the display panel comprises, The first connection part further comprises a second sub-connection part positioned in the second connection hole, the first connection electrode is positioned between the first connection hole and the second connection hole along the direction perpendicular to the plane of the substrate, the first sub-connection part is electrically connected with the first connection electrode and the pixel electrode, and the second sub-connection part is electrically connected with the first connection electrode and the first semiconductor layer.
3. The display panel of claim 1, wherein the display panel comprises, The second sub light blocking part is electrically connected with the source electrode or the drain electrode of the first transistor, and is used for providing data signals for the first transistor.
4. The display panel of claim 1, wherein the display panel comprises, The second sub light blocking part is positioned between the first connection electrode and the first semiconductor layer; the second sub-light blocking part comprises a first sub-hole, and the orthographic projection of the first connecting electrode on the plane of the substrate is at least partially overlapped with the first sub-hole.
5. The display panel of claim 1, wherein the display panel comprises, The array substrate further comprises a non-display area, wherein the non-display area comprises a second light blocking part, the second light blocking part comprises a third sub light blocking part, and the third sub light blocking part comprises a light absorbing material; The array substrate further comprises a public electrode and a public connecting wire positioned in the non-display area, wherein the public electrode and the public connecting wire are electrically connected through a second connecting part; The second connecting portion comprises a third sub-connecting portion located in a third connecting hole, orthographic projection of the third sub-connecting portion on the plane where the substrate is located and orthographic projection of the third sub-light-blocking portion on the plane where the substrate is located are not overlapped, and the third sub-connecting portion and the third sub-light-blocking portion are at least partially overlapped along the direction parallel to the plane where the substrate is located.
6. The display panel of claim 5, wherein the display panel comprises, The second connection part further comprises a second connection electrode electrically connecting the common connection line and the third sub-connection part, and the second connection electrode is positioned between the third connection hole and the common connection line.
7. The display panel of claim 6, wherein the display panel comprises, The second connection electrode is in the same layer as the first connection electrode.
8. The display panel of claim 6, wherein the display panel comprises, The second light blocking part further comprises a fourth sub light blocking part, and the fourth sub light blocking part comprises the second connecting electrode.
9. The display panel of claim 1, wherein the display panel comprises, The display area further comprises a sixth light blocking part, and at least part of the sixth light blocking part is positioned between two adjacent color resists; the array substrate further comprises a non-display area, wherein the non-display area comprises a seventh light blocking part; the sixth light blocking portion and the seventh light blocking portion include light absorbing materials, and the sixth light blocking portion and the seventh light blocking portion multiplex a planarization layer in the array substrate; The sixth light blocking portion includes a third opening, and at least a portion of the color blocking portion is located in the third opening.
10. The display panel of claim 1, wherein the display panel comprises, The first semiconductor layer includes a metal oxide.
11. The display panel of claim 1, further comprising a liquid crystal layer located on a side of the pixel electrode remote from the substrate.
12. The display panel of claim 1, wherein the display panel comprises, The display area further comprises a cover plate and a supporting part, and the supporting part is positioned between the cover plate and the array substrate; the orthographic projection of the supporting part on the plane of the substrate is overlapped with the orthographic projection of the first transistor on the plane of the substrate at least partially.
13. A display device comprising the display panel of any one of claims 1-12.

Description

Display panel and display device [ Field of technology ] The present invention relates to the field of display technologies, and in particular, to a display panel and a display device. [ Background Art ] With the continuous development of display technology, a thin film transistor liquid crystal display (Thin Film Transistor Liquid CRYSTAL DISPLAY, TFT-LCD for short) has taken the dominant role in the field of flat panel display due to the advantages of small size, low power consumption, no radiation, and the like. The thin film transistor liquid crystal display includes a pixel electrode and a transistor electrically connected. At present, through holes are required to be formed in the color resistors so as to electrically connect pixel electrodes and transistors positioned at two sides of the color resistors, and the manufacturing process of the through holes is difficult and is not beneficial to the small-size design of the sub-pixels. [ Invention ] In view of the above, the embodiments of the present invention provide a display panel and a display device for preventing holes from being punched in color resistors while electrically connecting pixel electrodes and corresponding transistors. In one aspect, an embodiment of the present invention provides a display panel, including an array substrate, where the array substrate includes a substrate, and the array substrate has a display area, and the display area includes a color resistor, a pixel electrode, and a first transistor that are located on the same side of the substrate; The first transistor includes a first semiconductor layer, wherein, The color resistor is positioned between the first semiconductor and the pixel electrode along the direction perpendicular to the plane of the substrate, and the first semiconductor layer and the pixel electrode are electrically connected through a first connecting part, wherein the first connecting part comprises a first sub-connecting part positioned in a first connecting hole, the orthographic projection of the first sub-connecting part on the plane of the substrate and the orthographic projection of the color resistor on the plane of the substrate are not overlapped, and the first sub-connecting part and the color resistor are at least partially overlapped along the direction parallel to the plane of the substrate; Or alternatively And the first semiconductor layer and the pixel electrode are positioned on the same side of the color resistor along the direction perpendicular to the plane of the substrate. On the other hand, the embodiment of the invention provides a display device which comprises the display panel. According to the display panel and the display device provided by the embodiment of the invention, the array substrate comprises the color resistor, and the color resistor and the first transistor can be sequentially formed on the same side of the substrate when the display panel is manufactured, namely, the color resistor and the first transistor can be integrated in the array substrate, and the color resistor and the first transistor are respectively formed on different substrates to form the color film substrate respectively comprising the color resistor and the driving substrate comprising the first transistor, and then the color film substrate and the driving substrate are aligned and attached to form the display panel. Moreover, the smaller the size of the sub-pixels, the higher the requirement for alignment accuracy. Therefore, by adopting the setting mode provided by the embodiment of the invention, the color resistance is arranged in the array substrate, so that the size of the sub-pixels can be designed to be smaller on the basis of ensuring the yield of the display panel, the number of the sub-pixels in a unit inch in the display panel can be improved, and the realization of the high-resolution display panel can be facilitated. For example, the display panel provided by the embodiment of the invention can be used for a display product for virtual reality. In addition, in the direction perpendicular to the plane of the substrate, the orthographic projection of the first sub-connection part on the plane of the substrate and the orthographic projection of the color resistor on the plane of the substrate are not overlapped, or in the direction perpendicular to the plane of the substrate, the first semiconductor layer and the pixel electrode are positioned on the same side of the color resistor, so that the first semiconductor layer and the pixel electrode are electrically connected, and meanwhile, the situation that a via hole is formed in the color resistor to connect the pixel electrode and the first semiconductor layer can be avoided. The greater the thickness of the color resist, the greater the difficulty in opening the via therein, and the greater the area of the via required. Therefore, by adopting the arrangement mode provided by the embodiment of the invention, the process difficulty