CN-117456949-B - Display device, apparatus, and driving method
Abstract
The application discloses a display device, equipment and a driving method, which comprises a time sequence controller, a source driver, a detection module and a switch module, wherein the time sequence controller comprises a differential signal sending module for sending at least a first differential signal pair and a second differential signal pair to the source driver, the source driver comprises a differential signal receiving module for receiving at least the first differential signal pair and the second differential signal pair, a clock data recovery circuit for outputting detection signals based on clock data recovery signals, the detection module outputs control signals based on the detection signals, and the switch module is closed or opened in response to the control signals so that the first differential signal pair and/or the second differential signal pair can be transmitted through a first data bus pair and/or a second data bus pair. The application can ensure the stable brightness of the display frame picture when the display frame picture is switched between high frequency and low frequency, and improve the flicker problem of the display frame picture.
Inventors
- ZHU YINPING
Assignees
- TCL华星光电技术有限公司
Dates
- Publication Date
- 20260512
- Application Date
- 20231013
Claims (10)
- 1. A display device including a timing controller and a source driver that outputs a data signal to a display panel, the timing controller comprising: A differential signal transmission module configured to transmit at least a first differential signal pair and a second differential signal pair to the source driver via respective point-to-point connections, wherein each of the respective point-to-point connections includes a first data bus pair and a second data bus pair connected between the timing controller and the source driver; The source driver includes: A differential signal receiving module configured to receive at least a first differential signal pair and a second differential signal pair from the first data bus pair and the second data bus pair; A clock data recovery circuit configured to receive a clock data recovery signal via a clock signal line connected to the timing controller and output a detection signal based on the clock data recovery signal; The display panel further comprises a detection module and a switch module, wherein the detection module receives the detection signal and outputs a control signal based on the detection signal, the switch module is connected to the first data bus pair and the second data bus pair, and the switch module is closed or opened in response to the control signal so that the first differential signal pair and/or the second differential signal pair are transmitted through the first data bus pair and/or the second data bus pair; the switch module comprises a first transistor, a second transistor, a third transistor and a fourth transistor, wherein the first transistor, the second transistor, the third transistor and the fourth transistor are respectively connected with the detection module, the differential signal sending module and the differential signal receiving module.
- 2. The display device of claim 1, wherein the first differential signal pair and/or the second differential signal pair are transmitted to the source driver through the first data bus pair and/or the second data bus pair, the source driver delivering the data signal to the display panel based on the first differential signal pair and/or the second differential signal pair.
- 3. The display device according to claim 2, wherein the detection module determines a frame rate at which the first differential signal pair and/or the second differential signal pair display frame pictures based on the detection signal, and outputs the control signal based on the frame rate.
- 4. The display device of claim 3, wherein the detection module compares a frame rate at a current time in the display frame with a threshold; In response to the frame rate at the current moment being greater than a threshold value, the detection module closes the switch module, and the first differential signal pair and the second differential signal pair are respectively transmitted to the source driver through the first data bus pair and/or the second data bus pair; The detection module turns off the switching module in response to the frame rate at the current time being less than a threshold, the first differential signal pair being supplied to the source driver through the first data bus pair or the second data bus pair, or In response to the frame rate at the current time being less than a threshold, the detection module turns off the switching module, and the second differential signal pair is delivered to the source driver through the first data bus pair or the second data bus pair.
- 5. The display device according to claim 1, wherein the first data bus pair includes a first line and a second line, one ends of the first line and the second line are connected to the differential signal transmitting module, and the other ends of the first line and the second line are connected to the differential signal receiving module.
- 6. The display device according to claim 5, wherein the second data bus pair includes a third line and a fourth line, one ends of the third line and the fourth line are connected to the differential signal transmitting module, and the other ends of the third line and the fourth line are connected to the differential signal receiving module.
- 7. The display device according to claim 5, wherein the switching module includes a first transistor and a second transistor, a first gate of the first transistor and a second gate of the second transistor are both connected to the detecting module, a first source of the first transistor and a second source of the second transistor are connected to the differential signal transmitting module through the first line and the second line, respectively, and a first drain of the first transistor and a second drain of the second transistor are connected to the differential signal receiving module through the first line and the second line, respectively.
- 8. The display device according to claim 6, wherein the switching module includes a third transistor and a fourth transistor, wherein a third gate of the third transistor and a fourth gate of the fourth transistor are both connected to the detecting module, wherein a third source of the third transistor and a fourth source of the fourth transistor are connected to the differential signal transmitting module through the third line and the fourth line, respectively, and wherein a third drain of the third transistor and a fourth drain of the fourth transistor are connected to the differential signal receiving module through the third line and the fourth line, respectively.
- 9. A display panel driving method, the method comprising: Receiving the first differential signal pair and/or the second differential signal pair output by the differential signal transmitting module through the differential signal receiving module; the clock data recovery circuit receives a clock data recovery signal and outputs a detection signal based on the clock data recovery signal; The detection module receives the detection signal and outputs a control signal based on the detection signal; the switch module is closed or opened in response to the control signal, so that the first differential signal pair and/or the second differential signal pair are transmitted through the first data bus pair and/or the second data bus pair and drive the control panel to display pictures; the switch module comprises a first transistor, a second transistor, a third transistor and a fourth transistor, wherein the first transistor, the second transistor, the third transistor and the fourth transistor are respectively connected with the detection module, the differential signal sending module and the differential signal receiving module.
- 10. A display apparatus comprising the display device according to any one of claims 1 to 8, or a display panel in the display apparatus is driven by a display panel driving method as claimed in claim 9.
Description
Display device, apparatus, and driving method Technical Field The present application relates to the field of liquid crystal display technologies, and in particular, to a display device, apparatus, and driving method. Background In order to prevent tearing of display screen, a Freesync (free synchronization) or G-sync (adaptive synchronization) function is required to reduce the frequency by notifying Vporch (width of vertical synchronization pulse) to make the refresh rate of display be in accordance with the frame rate output by display card, so as to prevent tearing of screen. However, the low frequency V-Blank (Blank area) time is long in Freesync mode, and the final voltage is low due to the leakage of the pixel electrode, so that the brightness of the display picture is low. The luminance of the display screen is unstable when the video signal is switched at high and low frequencies, and the display screen flickering is serious. Disclosure of Invention The application provides a display device, which solves the technical problem that a display picture flickers when a video signal is switched between high frequency and low frequency in the prior art. Another embodiment of the present application provides a display apparatus, and another embodiment of the present application provides a display panel driving method. In order to solve the technical problems, the embodiment of the application discloses the following technical scheme: In a first aspect, there is provided a display device including a timing controller and a source driver outputting a data signal to the display panel, the timing controller including: A differential signal transmission module configured to transmit at least a first differential signal pair and a second differential signal pair to the source driver via respective point-to-point connections, wherein each of the respective point-to-point connections includes a first data bus pair and a second data bus pair connected between the timing controller and the source driver; The source driver includes: A differential signal receiving module configured to receive at least a first differential signal pair and a second differential signal pair from the first data bus pair and the second data bus pair; A clock data recovery circuit configured to receive a clock data recovery signal via a clock signal line connected to the timing controller and output a detection signal based on the clock data recovery signal; The display panel further comprises a detection module and a switch module, wherein the detection module receives the detection signal and outputs a control signal based on the detection signal, the switch module is connected to the first data bus pair and the second data bus pair, and the switch module is closed or opened in response to the control signal so that the first differential signal pair and/or the second differential signal pair can be transmitted through the first data bus pair and/or the second data bus pair. With reference to the first aspect, the first differential signal pair and/or the second differential signal pair are transmitted to the source driver through the first data bus pair and/or the second data bus pair, and the source driver transmits the data signal to the display panel based on the first differential signal pair and/or the second differential signal pair. With reference to the first aspect, the detection module determines a frame rate of displaying a frame in the first differential signal pair and/or the second differential signal pair based on the detection signal, and outputs the control signal based on the frame rate. With reference to the first aspect, the detection module compares the frame frequency of the current moment in the display frame picture with a threshold value; In response to the frame rate at the current moment being greater than a threshold value, the detection module closes the switch module, and the first differential signal pair and the second differential signal pair are respectively transmitted to the source driver through the first data bus pair and/or the second data bus pair; The detection module turns off the switching module in response to the frame rate at the current time being less than a threshold, the first differential signal pair being supplied to the source driver through the first data bus pair or the second data bus pair, or In response to the frame rate at the current time being less than a threshold, the detection module turns off the switching module, and the second differential signal pair is delivered to the source driver through the first data bus pair or the second data bus pair. With reference to the first aspect, the first data bus pair includes a first line and a second line, one ends of the first line and the second line are connected to the differential signal transmitting module, and the other ends of the first line and the second line are connected to the differential signal receiving module. With r