CN-119472901-B - GaN amplitude-phase control multifunctional chip and phased array system

CN119472901BCN 119472901 BCN119472901 BCN 119472901BCN-119472901-B

Abstract

The application provides a GaN amplitude-phase control multifunctional chip and a phased array system, and belongs to the technical field of microelectronics. The GaN amplitude-phase control multifunctional chip comprises an input port, an output port, a distributed current multiplexing amplifier, a phase shifter, a first blocking capacitor and a second blocking capacitor, wherein the distributed current multiplexing amplifier comprises a first switch tube, a second switch tube, a first grid voltage providing circuit, a direct current self-bias circuit, a negative feedback circuit, a first choke filter circuit, a second grid voltage providing circuit, a second choke filter circuit and a voltage source. Based on the components and the connection relation among the components, the push-stage amplifier in the GaN amplitude-phase control multifunctional chip adopts a distributed current multiplexing structure, so that the power consumption of the push-stage amplifier can be reduced, the efficiency of the GaN amplitude-phase control multifunctional chip is improved, and the high efficiency of the GaN amplitude-phase control multifunctional chip is realized under the conditions of small size and high power.

Inventors

MA RUI
XU CHUNLIANG
LIU SHUAI
LI YUANPENG
LIU ZHIJUN
LI FUQIANG
ZHANG BIN
WANG DANYANG
LIU WEIQIAN

Assignees

中国电子科技集团公司第十三研究所

Dates

Publication Date: 20260508
Application Date: 20241014

Claims (9)

1. The GaN amplitude-phase control multifunctional chip is characterized by comprising an input port, an output port, a distributed current multiplexing amplifier, a phase shifter, a first blocking capacitor and a second blocking capacitor; The distributed current multiplexing amplifier comprises a first switch tube, a second switch tube, a first grid voltage providing circuit, a direct current self-bias circuit, a negative feedback circuit, a first choke filter circuit, a second grid voltage providing circuit, a second choke filter circuit and a voltage source, wherein the voltage source provides +15V voltage, and the negative electrode of the voltage source is grounded; The first end of the first grid voltage supply circuit is connected with the input port, the second end of the first grid voltage supply circuit is connected with the control end of the first switching tube and the first end of the negative feedback circuit, the first end of the first switching tube is connected with the second end of the negative feedback circuit, the second end of the first switching tube is connected with the first end of the direct current self-bias circuit, the third end of the negative feedback circuit is connected with the first end of the first blocking capacitor and the first end of the first choke filter circuit, the second end of the first blocking capacitor is connected with the first end of the phase shifter, the second end of the second blocking capacitor is connected with the first end of the second grid voltage supply circuit and the control end of the second switching tube, the first end of the second switching tube is connected with the first end of the second choke filter circuit, the second end of the second switching tube is connected with the second end of the second choke filter circuit, and the second end of the second choke filter circuit is connected with the second end of the second choke filter circuit; The first choke filter circuit comprises a second microstrip line, a third microstrip line, a fourth resistor and a fifth capacitor, wherein the first end of the third microstrip line is used as the first end of the first choke filter circuit, the second end of the third microstrip line is connected with the first end of the fourth resistor, the first end of the second microstrip line is used as the second end of the first choke filter circuit, the second end of the second microstrip line is connected with the second end of the fourth resistor and the first end of the fifth capacitor, and the second end of the fifth capacitor is grounded.
2. The GaN amplitude and phase control multifunctional chip of claim 1, wherein said first gate voltage providing circuit comprises a first inductance, a second inductance, and a first resistance; The first end of the first inductor is used as the first end of the first grid voltage providing circuit, the second end of the first inductor is connected with the first end of the second inductor, the second end of the first inductor is also used as the second end of the first grid voltage providing circuit, the second end of the second inductor is connected with the first end of the first resistor, and the second end of the first resistor is grounded.
3. The GaN amplitude and phase control multifunctional chip of claim 1, wherein said dc self-biasing circuit comprises a first microstrip line, a second capacitor and a third resistor; The first end of the first microstrip line is used as the first end of the direct current self-bias circuit, the second end of the first microstrip line is connected with the first end of the second capacitor and the first end of the third resistor, and the second end of the second capacitor and the second end of the third resistor are grounded.
4. The GaN amplitude and phase controlled multifunctional chip of claim 1, wherein said negative feedback circuit comprises a third inductance, a third capacitance, and a second resistance; The first end of the second resistor is used as the first end of the negative feedback circuit, the second end of the second resistor is connected with the first end of the third capacitor, the second end of the third capacitor is used as the third end of the negative feedback circuit, the first end of the third inductor is used as the second end of the negative feedback circuit, and the second end of the third inductor is connected with the second end of the third capacitor.
5. The GaN amplitude and phase control multifunctional chip of claim 1, wherein said second gate voltage providing circuit comprises a fifth resistor, a sixth resistor, and a seventh resistor; The first end of the fifth resistor is grounded, the second end of the fifth resistor is connected with the first end of the sixth resistor and the first end of the seventh resistor, the second end of the seventh resistor is used as the first end of the second grid voltage providing circuit, and the second end of the sixth resistor is used as the second end of the second grid voltage providing circuit.
6. The GaN amplitude and phase control multifunctional chip of claim 1, wherein said second choke filter circuit comprises a fifth inductance, a sixth inductance, and a seventh capacitance; The first end of the fifth inductor is used as the first end of the second choke filter circuit, the second end of the fifth inductor is used as the third end of the second choke filter circuit, the second end of the fifth inductor is further connected with the first end of the sixth inductor, the second end of the sixth inductor is used as the second end of the second choke filter circuit, the second end of the sixth inductor is further connected with the first end of the seventh capacitor, and the second end of the seventh capacitor is grounded.
7. The GaN amplitude-phase controlled multifunctional chip of any one of claims 1 to 6, wherein said distributed current multiplexing amplifier further comprises a first capacitor and a sixth capacitor; The first end of the first grid voltage providing circuit is connected with the input port through the first capacitor; The third end of the second choke filter circuit is connected with the output port through the sixth capacitor.
8. The GaN web phase control multifunctional chip of any one of claims 1 to 6 further comprising an attenuator and a power amplifier; And a third end of the second choke filter circuit is connected with the output port through the attenuator and the power amplifier in sequence.
9. A phased array system comprising a GaN amplitude phase control multi-function chip as claimed in any one of claims 1 to 8.

Description

GaN amplitude-phase control multifunctional chip and phased array system Technical Field The invention relates to the technical field of microelectronics, in particular to a GaN amplitude-phase control multifunctional chip and a phased array system. Background Along with the wider and wider application of phased array systems in communication, detection and other aspects, the amplitude and phase control multifunctional chip is used as a core device of the phased array system, and the miniaturization and high power requirements are also urgent. In recent years, due to the characteristics of high breakdown, high power and high efficiency of a GaN HEMT device, a similar chip based on a GaN HEMT amplitude is also attracting attention. However, since the leakage of the GaN chip is generally high voltage of +15v or higher, the power consumption of the GaN amplitude-phase controlled multifunctional chip on the low-power boost amplifier is large, and the overall efficiency is low. Disclosure of Invention The embodiment of the invention provides a GaN amplitude-phase control multifunctional chip and a phased array system, which are used for solving the problem of lower efficiency of the GaN amplitude-phase control multifunctional chip caused by larger power consumption of a push-stage amplifier in the prior art. In a first aspect, an embodiment of the present invention provides a GaN amplitude-phase control multifunctional chip, including an input port, an output port, a distributed current multiplexing amplifier, a phase shifter, a first blocking capacitor and a second blocking capacitor; the distributed current multiplexing amplifier comprises a first switching tube, a second switching tube, a first grid voltage providing circuit, a direct current self-bias circuit, a negative feedback circuit, a first choke filter circuit, a second grid voltage providing circuit, a second choke filter circuit and a voltage source; The first end of the first grid voltage supply circuit is connected with the input port, the second end of the first grid voltage supply circuit is connected with the control end of the first switching tube and the first end of the negative feedback circuit, the first end of the first switching tube is connected with the second end of the negative feedback circuit, the second end of the first switching tube is connected with the first end of the direct current self-bias circuit, the third end of the negative feedback circuit is connected with the first end of the first blocking capacitor and the first end of the first choke filter circuit, the second end of the first blocking capacitor is connected with the first end of the phase shifter, the second end of the phase shifter is connected with the first end of the second blocking capacitor, the second end of the second blocking capacitor is connected with the first end of the second grid voltage supply circuit and the control end of the second switching tube, the first end of the second switching tube is connected with the first end of the second choke filter circuit, the second end of the second switching tube is connected with the second end of the first choke filter circuit, the second end of the second grid voltage supply circuit and the second end of the second choke filter circuit are both connected with the positive electrode of the voltage source, and the third end of the second choke filter circuit is connected with the output port. In one possible implementation, the first gate voltage supply circuit includes a first inductance, a second inductance, and a first resistance; The first end of the first inductor is used as the first end of the first grid voltage providing circuit, the second end of the first inductor is connected with the first end of the second inductor, the second end of the first inductor is also used as the second end of the first grid voltage providing circuit, the second end of the second inductor is connected with the first end of the first resistor, and the second end of the first resistor is grounded. In one possible implementation, the direct current self-bias circuit includes a first microstrip line, a second capacitor, and a third resistor; The first end of the first microstrip line is used as the first end of the direct current self-bias circuit, the second end of the first microstrip line is connected with the first end of the second capacitor and the first end of the third resistor, and the second end of the second capacitor and the second end of the third resistor are grounded. In one possible implementation, the negative feedback circuit includes a third inductance, a third capacitance, and a second resistance; the first end of the second resistor is used as the first end of the negative feedback circuit, the second end of the second resistor is connected with the first end of the third capacitor, the second end of the third capacitor is used as the third end of the negative feedback circuit, the first end of the th