CN-119497421-B - Power device and method of manufacturing the same

Abstract

The disclosure provides a power device and a manufacturing method thereof, wherein the power device comprises a semiconductor layer, an isolation part, a grid conductor and a first resistor structure, wherein the semiconductor layer comprises a first doped region, a second doped region, a well region and a third doped region which are sequentially adjacent along a vertical direction, the isolation part extends into the second doped region from the first surface of the semiconductor layer and is adjacent to the well region and the third doped region, the grid conductor is positioned in the isolation part, the first resistor structure is used for forming a first resistor, the second resistor structure is used for forming a second resistor, the diode structure is used for forming a first diode, the first end of the first resistor is electrically connected with the third doped region, the second end of the first resistor is electrically connected with a cathode of the first diode and the first end of the second resistor respectively, an anode of the first diode is electrically connected with the third doped region, and the second end of the second resistor is electrically connected with the well region, and the resistance value of the first resistor is smaller than that of the second resistor.

Inventors

• SU WEI

Assignees

• 杰华特微电子股份有限公司

Dates

Publication Date

20260512

Application Date

20240614

Claims (13)

1. 1. A power device, comprising: The semiconductor layer is provided with a first surface and a second surface which are opposite, and comprises a first doping region, a second doping region, a well region and a third doping region which are adjacent in sequence along the direction of the second surface towards the first surface; a spacer extending from the first surface of the semiconductor layer into the second doped region and adjoining the well region and the third doped region, and A gate conductor in the isolation portion, The first doped region and the well region are of a first doping type, the second doped region and the third doped region are of a second doping type, the first doping type is opposite to the second doping type, The power device further comprises a first resistor structure for forming a first resistor, a second resistor structure for forming a second resistor, and a first diode structure for forming a first diode, The first end of the first resistor is electrically connected with the third doped region, the second end of the first resistor is electrically connected with the cathode of the first diode and the first end of the second resistor respectively, the anode of the first diode is electrically connected with the third doped region, the second end of the second resistor is electrically connected with the well region, The resistance value of the first resistor is smaller than that of the second resistor.
2. 2. The power device of claim 1, wherein the first doped region, the second doped region, and the well region are used to form a first transistor, The second doped region, the well region and the third doped region are used to form a second transistor and a third transistor, The first transistor is a PNP triode, the second transistor is an NPN triode, the third transistor is an NMOS transistor, The emitter of the first transistor is connected with a first potential, the base of the first transistor is respectively connected with the collector of the second transistor and the first current end of the third transistor, the collector of the first transistor is respectively connected with the base of the second transistor and the substrate of the third transistor, the emitter of the second transistor is connected with the second current end of the third transistor, The anode of the first diode is connected with the emitter of the second transistor, the cathode of the first diode is connected with a second potential, The first resistor is connected in series between the emitter of the second transistor and the second potential, The second resistor is connected in series between the base of the second transistor and the second potential.
3. 3. The power device of claim 1, wherein the semiconductor layer further comprises a fourth doped region adjacent to the well region, the second end of the second resistor being electrically connected to the fourth doped region, Wherein the fourth doped region is of the first doping type.
4. 4. The power device of claim 1, wherein the gate conductor, the first resistive structure, the second resistive structure, the diode structure are located in the same isolation; or at least one of the gate conductor, the first resistive structure, the second resistive structure, and the diode structure is located in a different one of the spacers.
5. 5. The power device of claim 1, wherein the diode structure includes a first fill extending from a surface of the isolation portion into the isolation portion.
6. 6. The power device of claim 5, wherein the diode structure further comprises a fifth doped region extending from a surface of the first fill into the first fill, The fifth doped region is of a first doping type, and the first filling portion is of a second doping type.
7. 7. The power device of claim 5, wherein the diode structure further comprises a metal layer on a surface of the first fill portion, The first filling part is contacted with the metal layer to form a Schottky diode.
8. 8. The power device of any of claims 5 to 7, wherein the first resistive structure extends from a surface of the spacer into the spacer or the first resistive structure is located at the spacer surface; The second resistive structure extends from the surface of the spacer into the spacer or the second resistive structure is located at the spacer surface.
9. 9. The power device of claim 8, wherein a material of the first filling portion and/or the first resistive structure and/or the second resistive structure is the same as a material of the gate conductor.
10. 10. A method of manufacturing a power device, comprising: Forming a first doped region, a second doped region, a well region and a third doped region which are adjacent in sequence in the semiconductor layer along the direction of the second surface of the semiconductor layer towards the first surface; forming a spacer in the semiconductor layer, the spacer extending from the first surface into the second doped region and adjoining the well region and the third doped region, and A gate conductor is formed in the isolation portion, The first doped region and the well region are of a first doping type, the second doped region and the third doped region are of a second doping type, the first doping type is opposite to the second doping type, The method of manufacturing further includes forming a first resistive structure, a second resistive structure and a diode structure, The first resistor structure is used for forming a first resistor, the second resistor structure is used for forming a second resistor, the diode structure is used for forming a first diode, The first end of the first resistor is electrically connected with the third doped region, the second end of the first resistor is electrically connected with the cathode of the first diode and the first end of the second resistor respectively, the anode of the first diode is electrically connected with the third doped region, and the second end of the second resistor is electrically connected with the well region.
11. 11. The method of manufacturing as claimed in claim 10, wherein forming the diode structure comprises forming a first filling portion in the isolation portion, Wherein the first filling portion and the gate conductor are formed in the same step.
12. 12. The manufacturing method according to claim 10 or 11, wherein the first resistive structure and/or the second resistive structure is formed in the same step as the gate conductor.
13. 13. The method of manufacturing as claimed in claim 11, further comprising forming a fourth doped region in the semiconductor layer, the fourth doped region extending from the first surface toward the second surface and adjoining the well region, The step of forming the diode structure further includes forming a fifth doped region in the first fill, The fourth doped region and the fifth doped region are of a first doping type, the first filling part is of a second doping type, The fourth doped region is formed in the same step as the fifth doping.

Description

Power device and method of manufacturing the same Technical Field The present disclosure relates to the field of semiconductor device technology, and more particularly, to a power device and a method of manufacturing the same. Background Insulated gate bipolar transistors (Insulated Gate Bipolar Transistor, IGBTs) are the core devices of power electronics systems in the medium-high power domain. As a composite device of a field effect transistor and a bipolar transistor, the IGBT has the characteristics of high input impedance, simple driving, high current capability, low conduction voltage drop and the like. Compared to a common metal oxide semiconductor field effect transistor (Metal Oxide SemiconductorField EffectTransistor, MOSFET), IGBTs have a lower on-voltage drop, which benefits from the conductance modulation effect in the drift region when the IGBTs are on. At present, the continuous reduction of the on-voltage drop of the IGBT so as to reduce the on-power consumption of the IGBT is still an important research content in the field of the IGBT. Disclosure of Invention In view of the foregoing, an object of the present disclosure is to provide a power device and a method for manufacturing the same, in which an additional resistor and a diode are provided in the power device, so as to adjust the electric potentials of different regions in the power device, thereby reducing the conduction voltage drop of the power device. According to an aspect of an embodiment of the present disclosure, there is provided a power device, including a semiconductor layer having a first surface and a second surface opposite to each other, the semiconductor layer including a first doped region, a second doped region, a well region, and a third doped region sequentially adjoining along the second surface in a direction toward the first surface; a spacer extending from the first surface of the semiconductor layer into the second doped region and adjoining the well region and the third doped region, and A gate conductor in the isolation portion, The first doped region and the well region are of a first doping type, the second doped region and the third doped region are of a second doping type, the first doping type is opposite to the second doping type, The semiconductor device further comprises a first resistor structure for constituting a first resistor, a second resistor structure for constituting a second resistor, and a first diode structure for constituting a first diode, The first end of the first resistor is electrically connected with the third doped region, the second end of the first resistor is electrically connected with the cathode of the first diode and the first end of the second resistor respectively, the anode of the first diode is electrically connected with the third doped region, the second end of the second resistor is electrically connected with the well region, The resistance value of the first resistor is smaller than that of the second resistor. Optionally, the first doped region, the second doped region and the well region are used to form a first transistor, The second doped region, the well region and the third doped region are used to form a second transistor and a third transistor, The first transistor is a PNP triode, the second transistor is an NPN triode, the third transistor is an NMOS transistor, The emitter of the first transistor is connected with a first potential, the base of the first transistor is respectively connected with the collector of the second transistor and the first current end of the third transistor, the collector of the first transistor is respectively connected with the base of the second transistor and the substrate of the third transistor, the emitter of the second transistor is connected with the second current end of the third transistor, The anode of the first diode is connected with the emitter of the second transistor, the cathode of the first diode is connected with a second potential, The first resistor is connected in series between the emitter of the second transistor and the second potential, The second resistor is connected in series between the base of the second transistor and the second potential. Optionally, the semiconductor device further comprises a fourth doped region adjacent to the well region, the second end of the second resistor being electrically connected to the fourth doped region, Wherein the fourth doped region is of the first doping type. Optionally, the gate conductor, the first resistive structure, the second resistive structure, the diode structure are located in the same isolation portion; or at least one of the gate conductor, the first resistive structure, the second resistive structure, and the diode structure is located in a different one of the spacers. Optionally, the diode structure includes a first filling portion extending from a surface of the isolation portion into the isolation portion. Optionally, the diode structure fur