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CN-119626156-B - Display panel and display device

CN119626156BCN 119626156 BCN119626156 BCN 119626156BCN-119626156-B

Abstract

The application discloses a display panel and a display device, wherein the display panel comprises a reset driving circuit, the reset driving circuit comprises a plurality of cascaded shift registers, the shift registers comprise a pull-up control module and a pull-up module, square wave signals are connected to the pull-up module to replace connected high-potential signals, and square wave signals with low potential can be output as reset control signals in a black inserting period, so that the reset control signals with low potential can be obtained in the black inserting period, and the problem of driving time sequence errors caused by the reset control signals with high potential output in black inserting is avoided.

Inventors

  • WANG RUIFANG

Assignees

  • 武汉华星光电技术有限公司

Dates

Publication Date
20260512
Application Date
20250108

Claims (10)

  1. 1. A display panel, the display panel comprising a reset drive circuit, the reset drive circuit comprising a plurality of cascaded shift registers, the shift registers comprising: the pull-up control module is configured to control the transmission of a high-potential signal to a pull-up node according to an initialization control signal; a pull-up module configured to output a reset control signal of a low potential according to a square wave signal of the low potential in a black insertion period of a light emitting stage in a hold frame according to a signal of the pull-up node; the display panel further comprises a pixel circuit, wherein the pixel circuit comprises a driving transistor and a reset transistor, the reset transistor is connected between a grid electrode of the driving transistor and a reference voltage line, the grid electrode of the reset transistor is connected with the reset control signal, the light-emitting stage of the pixel circuit comprises a black inserting period, and the reset transistor is turned off in the black inserting period.
  2. 2. The display panel of claim 1, wherein the pull-up module comprises a pull-up transistor having a gate connected to the pull-up node, a first pole of the pull-up transistor configured to access the square wave signal, and a second pole of the pull-up transistor configured to output the reset control signal.
  3. 3. The display panel according to claim 2, wherein each frame of the display panel includes a write frame or a hold frame in which the square wave signal is at a low potential, and the second pole of the pull-up transistor is configured to output the reset control signal at a low potential.
  4. 4. A display panel according to claim 3, characterized in that in the write frame the square wave signal is at a high potential.
  5. 5. The display panel according to any one of claims 1 to 4, wherein the pixel circuit includes: a light emission control transistor connected between a first power supply line and a first pole of the driving transistor; a light emitting device connected between a second power line and a second pole of the driving transistor; wherein, in the black insertion period, the light emission control transistor is turned off.
  6. 6. The display panel according to claim 5, wherein the reset transistor is an N-channel transistor, and the reset control signal is at a low potential in the black insertion period.
  7. 7. The display panel according to claim 5, wherein the pixel circuit further comprises a write transistor configured to control transmission of a data signal to a gate of the drive transistor according to a scan signal.
  8. 8. The display panel according to claim 7, wherein the pixel circuit is in a write frame, the write transistor is turned on to write the data signal to the gate of the drive transistor.
  9. 9. The display panel according to claim 8, wherein the pixel circuit is in a hold frame, the write transistor is turned off to control the data signal not to be written to the gate of the drive transistor.
  10. 10. A display device comprising the display panel according to any one of claims 1-9.

Description

Display panel and display device Technical Field The application relates to the technical field of display, in particular to a display panel and a display device. Background In a display panel, in order to achieve an intended display effect of a pixel circuit, it is necessary to provide the pixel circuit with corresponding driving timings, which may be provided by corresponding gate driving circuits. However, with the change of the driving timing required for the pixel circuit, the gate driving circuit also needs to be correspondingly improved to achieve a desired display effect. Disclosure of Invention The application provides a display panel and a display device, which are used for solving the technical problem that a reset control signal of a high potential is output by a reset driving circuit in a grid driving circuit when black is inserted, so that driving time sequence is wrong. In a first aspect, the present application provides a display panel, the display panel including a reset driving circuit, the reset driving circuit including a plurality of cascaded shift registers, the shift registers including a pull-up control module configured to control a high potential signal to be transmitted to a pull-up node according to an initialization control signal, and a pull-up module configured to output a low potential square wave signal as a reset control signal in a black insertion period according to a signal of the pull-up node. In a second aspect, the present application provides a display device comprising the display panel described above. According to the display panel and the display device, the square wave signal is connected to replace the connected high-potential signal through the pull-up module, and the square wave signal with low potential can be output as the reset control signal in the black inserting period, so that the reset control signal with low potential can be obtained in the black inserting period, and the problem of driving time sequence error caused by outputting the reset control signal with high potential in black inserting is avoided. Drawings The technical solution and other advantageous effects of the present application will be made apparent by the following detailed description of the specific embodiments of the present application with reference to the accompanying drawings. Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present application. Fig. 2 is a schematic diagram of a shift register in a reset driving circuit according to an embodiment of the present application. Fig. 3 is a schematic structural diagram of a light-emitting driving unit in a light-emitting driving circuit according to an embodiment of the present application. Fig. 4 is a schematic structural diagram of a pixel circuit according to an embodiment of the present application. Fig. 5 is a timing diagram of a display panel according to an embodiment of the application. Detailed Description The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. It will be apparent that the described embodiments are only some, but not all, embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to fall within the scope of the application. Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated, whereby a feature defining "first," "second," or the like, may explicitly or implicitly include one or more of such features, and in the description of the present invention, "a plurality" means two or more, unless otherwise specifically limited. Referring to fig. 1 to 5, fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the application. The display panel includes a pixel circuit 50, a reset driving circuit 10 providing a reset control signal REF to the pixel circuit 50, a light emitting driving circuit 20 providing a light emitting control signal EM to the pixel circuit 50, a scan driving circuit 30 providing a scan signal Gn to the pixel circuit 50, and an initialization driving circuit 40 providing an initialization control signal INI to the pixel circuit 50. The reset driving circuit 10, the light emitting driving circuit 20, the scan driving circuit 30, and the initialization driving circuit 40 are all one of gate driving circuits (GOA circuits). In other embodiments, the scan signal Gn and the initialization control signal INI may also be provided by the same gate driving circuit. The reset driving circuit 10 includes a plurality of cascaded shift registers, wherein an nth stage