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CN-119967825-B - Diode and preparation method thereof

CN119967825BCN 119967825 BCN119967825 BCN 119967825BCN-119967825-B

Abstract

The invention provides a diode and a preparation method thereof, wherein the diode comprises an N-type substrate, an N-type epitaxial layer, a plurality of grooves, a plurality of metal filling areas, a plurality of P-type epitaxial regions, an opening groove and a plurality of metal filling areas, wherein the N-type epitaxial layer is arranged on one side of the N-type substrate, the grooves are arranged on the N-type epitaxial layer at intervals along the length direction of the N-type epitaxial layer, one end of each groove is arranged at intervals with the N-type substrate, the other end of each groove is communicated with one side, far away from the N-type substrate, of the N-type epitaxial layer, the grooves comprise a first groove, a second groove and a third groove which are sequentially arranged, the depth of each first groove and the depth of each third groove are larger than the depth of each second groove, the P-type epitaxial regions are correspondingly arranged on the grooves one by one, the first metal filling areas are formed in the P-type epitaxial regions, and the first metal filling areas are arranged in the opening groove, so that the problem that the SIC diode device in the prior art is poor in high-voltage resistance performance of unit area is solved.

Inventors

  • LI LI

Assignees

  • 珠海格力电子元器件有限公司
  • 珠海格力电器股份有限公司

Dates

Publication Date
20260508
Application Date
20250124

Claims (12)

  1. 1. A diode of the type used in the manufacture of a semiconductor device, characterized by comprising the following steps: An N-type substrate (1); The N-type epitaxial layer (2) is arranged on one side of the N-type substrate (1); The plurality of grooves (3) are arranged on the N-type epitaxial layer (2) at intervals along the length direction of the N-type epitaxial layer (2), one end of each groove (3) is arranged on the N-type substrate (1) at intervals, the other end of each groove (3) is communicated with one side, far away from the N-type substrate (1), of the N-type epitaxial layer (2), the plurality of grooves (3) comprise a first groove (31), a second groove (32) and a third groove (33) which are sequentially arranged, and the depth of each first groove (31) and the depth of each third groove (33) are larger than the depth of each second groove (32); the plurality of P-type epitaxial regions (4) are arranged in the plurality of grooves (3) in a one-to-one correspondence manner, one P-type epitaxial region (4) is arranged in each groove (3), and the first groove (31) and the third groove (33) are filled with the P-type epitaxial regions (4); A first metal filling region (5), wherein an open groove (41) is formed in the P-type epitaxial region (4) in the second groove (32), and the first metal filling region (5) is arranged in the open groove (41); The diode comprises a P-type ion implantation region (6), wherein the P-type ion implantation region (6) is arranged on the N-type epitaxial layer (2), the doping concentration of the P-type ion implantation region (6) is smaller than that of the P-type epitaxial layer (4), the P-type ion implantation region (6) is arranged on one side, close to the second groove (32), of the first groove (31), the P-type ion implantation region (6) is not arranged on one side, far away from the second groove (32), of the first groove (31), and/or the P-type ion implantation region (6) is arranged on two opposite sides of the second groove (32), and/or the P-type ion implantation region (6) is arranged on one side, close to the second groove (32), of the third groove (33), and the P-type ion implantation region (6) is not arranged on one side, far away from the second groove (32), of the third groove (33).
  2. 2. The diode according to claim 1, characterized in that each of the trenches (3) is a rectangular trench, the depth of the first trench (31) being equal to the depth of the third trench (33), the width of the first trench (31) being equal to the width of the third trench (33) and being smaller than the width of the second trench (32).
  3. 3. A diode as claimed in claim 1, characterized in that, The depth of the P-type ion implantation region (6) is smaller than the depth of the trench (3), and/or The width of the P-type ion implantation region (6) is larger than the width of the first trench (31) and larger than the width of the third trench (33), and/or The width of the P-type ion implantation region (6) is smaller than the width of the second groove (32).
  4. 4. A diode as claimed in claim 1, characterized in that, The material of the first metal filling area (5) comprises nickel, and/or Ohmic contact is formed between the first metal filling region (5) and the P-type epitaxial region (4).
  5. 5. The diode of claim 1, wherein the diode comprises: A second metal layer (7), wherein the second metal layer (7) is arranged on one side of the N-type epitaxial layer (2) far away from the N-type substrate (1); A third metal layer (8), the third metal layer (8) being arranged on the side of the second metal layer (7) remote from the N-type epitaxial layer (2); And the back metal layer (9) is arranged on one side of the N-type substrate (1) far away from the N-type epitaxial layer (2).
  6. 6. The diode as claimed in claim 5, wherein, And a Schottky contact is formed between the second metal layer (7) and the N-type epitaxial layer (2) and the P-type epitaxial region (4).
  7. 7. The diode as claimed in claim 5, wherein, The second metal layer (7) comprises a titanium metal layer, and/or The third metal layer (8) comprises an aluminum metal layer, and/or The back metal layer (9) comprises a titanium metal layer, a nickel metal layer and a silver metal layer which are sequentially arranged along the direction far away from the N-type substrate (1).
  8. 8. A diode preparation method for preparing the diode of any one of claims 1 to 7, the diode preparation method comprising: Setting an N-type substrate (1); An N-type epitaxial layer (2) is arranged on the N-type substrate (1); Forming a plurality of trenches (3) including a first trench (31), a second trench (32) and a third trench (33) on the N-type epitaxial layer (2) by dry etching; Filling a P-type epitaxy into each of the trenches (3) to form a plurality of P-type epitaxy regions (4), Removing a part of the P-type epitaxial region (4) in the second trench (32) by dry etching to form an open recess (41); -filling a first metal into the open recess (41) to form the first metal filled region (5).
  9. 9. The diode preparation method according to claim 8, characterized in that, when performing the step of filling the first metal into the open recess (41) to form the first metal filling region (5), the diode preparation method comprises: and carrying out thermal annealing on the first metal filling region (5) so as to form ohmic contact between the first metal filling region (5) and the corresponding P-type epitaxial region (4).
  10. 10. The method of manufacturing a diode according to claim 8, characterized in that the method of manufacturing a diode comprises: p-type ions are implanted on the N-type epitaxial layer (2) to form a P-type ion implantation region (6).
  11. 11. The method of manufacturing a diode according to claim 8, characterized in that the method of manufacturing a diode comprises: a second metal layer (7) is arranged on one side of the N-type epitaxial layer (2) far away from the N-type substrate (1); A third metal layer (8) is arranged on one side of the second metal layer (7) far away from the N-type epitaxial layer (2); a back metal layer (9) is arranged on one side of the N-type substrate (1) far away from the N-type epitaxial layer (2).
  12. 12. The diode preparation method according to claim 11, characterized in that, when performing the step of providing a third metal layer (8) on the side of the second metal layer (7) remote from the N-type epitaxial layer (2), the diode preparation method comprises: -preparing said third metal layer (8) at a high temperature and-thermally annealing said second metal layer (7) so as to form a schottky contact between said second metal layer (7) and said N-type epitaxial layer (2) and said P-type epitaxial region (4).

Description

Diode and preparation method thereof Technical Field The invention relates to the technical field of semiconductors, in particular to a diode and a preparation method thereof. Background The power diode is a key component of a circuit system, and is widely applied to civil products such as high-frequency inverters, digital products, generators, televisions and the like, satellite receiving devices, various advanced weapon control systems such as missiles, aircrafts and the like, and military occasions of instruments and meter equipment. The power diode is expanding towards two important directions, namely (1) the power diode is expanding towards tens of millions to tens of amperes, can be applied to occasions such as high-temperature arc wind tunnels and resistance welding machines, and the like, and (2) the reverse recovery time is shorter and shorter, and the power diode is expanding towards the directions of ultrafast, ultrasoft and ultradurable, so that the power diode is not only used for rectifying occasions, but also has different functions in various switching circuits. To meet the application requirements of low power consumption, high frequency, high temperature, miniaturization and the like on-resistance, on-voltage drop, reverse recovery characteristics, high temperature characteristics, and the like are becoming higher and higher. The commonly used power diodes include a common rectifier diode, a schottky rectifier diode and a PIN rectifier diode. Compared with the prior art, the Schottky rectifier diode has the characteristics of low on-state voltage drop, large leakage current and almost zero reverse recovery time. While the PIN fast recovery rectifier diode has a fast reverse recovery time, but its on-state voltage drop is high. Currently, with the development of microelectronic devices in the directions of low power consumption, high voltage resistance and high reliability, the requirements for semiconductor materials are gradually increasing. Microelectronic devices are increasingly being used in special environments such as high temperature, high irradiation, high frequency, and high power. In order to meet the application of microelectronic devices in the fields of high temperature resistance, irradiation resistance and the like, new semiconductor materials need to be developed so as to improve the performance of the microelectronic devices to the maximum extent. The silicon device and gallium arsenide device in the prior art limit the improvement of the device and system performance, and the third generation semiconductor material represented by silicon carbide (SiC) and gallium nitride (GaN) becomes an ideal semiconductor material for manufacturing high-temperature-resistant, high-power and radiation-resistant electronic devices due to the advantages of the material such as wide forbidden bandwidth, high critical breakdown electric field and the like. The critical breakdown field strength of the SiC-based devices (such as high-temperature and high-frequency SiC devices, microwave and high-frequency SiC devices, siC photoelectric devices, irradiation-resistant devices and other SiC materials) studied at present is 10 times that of Si materials, the forbidden band width and the thermal conductivity of the SiC-based devices are 3 times that of the Si materials, and the concentration of intrinsic carriers of the SiC-based devices is only one tenth that of the Si materials. The excellent physical properties enable the semiconductor power device made of the SiC material to have high advantages in high-frequency, high-temperature, high-power, high-irradiation and other environments. SiC can form different crystal structures in different environments, and three crystal structures of 3C-SiC, 4H-SiC and 6H-SiC are commonly used, and the 4H-SiC material has a higher forbidden band width and hole mobility, and a lower intrinsic carrier concentration becomes a main stream material for manufacturing semiconductor devices. In the prior art, the structure of the diode mainly adopts a groove structure. However, the electrical performance of the conventional diode with the trench structure still has a large improvement space. Because the SIC diode device structurally does not perform device structural optimization aiming at the material characteristics of SIC, the product performance advantage is not obvious enough in part of parameters compared with the Si device, and the shape of a depletion region of the SIC diode device is similar to a semicircle with high middle and low two ends when the SIC diode device works reversely, so that the high-voltage resistance performance of the SIC diode device in unit area is poor. In addition, the traditional process of the Si diode is adopted in the production process flow of the SIC diode device, the production process flow is complex and requires special equipment (Al ion implantation and special implantation equipment), and the production cost is high. Disclosur