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CN-120051202-B - Staggered silicon-based three-dimensional spiral inductor and band-pass and low-pass filter

CN120051202BCN 120051202 BCN120051202 BCN 120051202BCN-120051202-B

Abstract

The invention relates to an interleaved silicon-based three-dimensional spiral inductor and a band-pass and low-pass filter, wherein the interleaved silicon-based three-dimensional spiral inductor comprises an inductor first metal layer, a first silicon dioxide dielectric layer, an inductor silicon dielectric layer, a second silicon dioxide dielectric layer and an inductor second metal layer which are sequentially arranged from top to bottom, a plurality of inductor metal sheets are arranged on the inductor first metal layer in an interleaved manner, a plurality of inductor metal sheets are arranged on the inductor second metal layer in an interleaved manner, the number of the inductor metal sheets on the inductor first metal layer is the same as that on the inductor second metal layer, and the inductor metal sheets on the inductor first metal layer and the inductor second metal layer are respectively connected in a one-to-one correspondence manner through a plurality of first metal conductor columns. According to the invention, the inductance metal sheets are arranged in a staggered manner, so that the area of the three-dimensional spiral inductance is reduced, the higher inductance density is realized on the single-layer silicon substrate, and the preparation process is simpler.

Inventors

  • LIU XIAOXIAN
  • LIU NUO
  • ZHU ZHANGMING
  • ZHANG LEI
  • FAN CHENHUI
  • REN ZHIHAO

Assignees

  • 西安电子科技大学

Dates

Publication Date
20260505
Application Date
20250211

Claims (8)

  1. 1. The staggered silicon-based three-dimensional spiral inductor is characterized by comprising an inductor first metal layer (1), a first silicon dioxide dielectric layer (2), an inductor silicon dielectric layer (3), a second silicon dioxide dielectric layer (4) and an inductor second metal layer (5) which are sequentially arranged from top to bottom, A plurality of inductance metal sheets are arranged on the inductance first metal layer (1) in a staggered manner, a plurality of inductance metal sheets are arranged on the inductance second metal layer (5) in a staggered manner, the inductance first metal layer (1) and the inductance metal sheets on the inductance second metal layer (5) are the same in number, and the inductance first metal layer (1) and the inductance metal sheets on the inductance second metal layer (5) are respectively connected in a one-to-one correspondence through a plurality of first metal conductor columns (6); The two ends of the two adjacent inductance metal sheets are positioned on different horizontal lines, the two inductance metal sheets of the inductance second metal layer (5) are parallel to each other or are mutually angled, and the two ends of the two adjacent inductance metal sheets are positioned on different horizontal lines; An input port or an output port is respectively arranged on the first metal layer (1) or the second metal layer (5) of the inductor.
  2. 2. The staggered silicon-based three-dimensional spiral inductor according to claim 1, wherein each inductor metal sheet on the inductor first metal layer (1) and the inductor second metal layer (5) is provided with at least one connection site, and the connection sites of the inductor metal sheets on the inductor first metal layer (1) and the connection sites of the inductor metal sheets on the inductor second metal layer (5) are in one-to-one correspondence and are connected through the corresponding first metal conductor columns (6).
  3. 3. The staggered silicon-based three-dimensional spiral inductor according to claim 1, wherein the arrangement mode of a plurality of inductor metal sheets on the inductor first metal layer (1) and the inductor second metal layer (5) is the same or different.
  4. 4. The staggered silicon-based three-dimensional spiral inductor according to claim 1, wherein a plurality of dielectric through holes are formed in the first silicon dioxide dielectric layer (2), the silicon sensing dielectric layer (3) and the second silicon dioxide dielectric layer (4) at intervals, and a plurality of first metal conductor columns (6) are arranged in the dielectric through holes in a one-to-one correspondence manner.
  5. 5. The staggered silicon-based three-dimensional spiral inductor according to claim 4, wherein the inductor first metal layer (1) comprises an inductor first metal sheet (7), an inductor second metal sheet (8), an inductor third metal sheet (9), an inductor fourth metal sheet (10), an inductor fifth metal sheet (11), an inductor sixth metal sheet (12), an inductor seventh metal sheet (13), an inductor eighth metal sheet (14), a grounding first metal sheet (15) and a grounding second metal sheet (16); The first metal sheet (7) of the inductor and the second metal sheet (8) of the inductor are arranged far away from each other and serve as an input port and an output port respectively; The third metal sheet (9), the fourth metal sheet (10), the fifth metal sheet (11), the sixth metal sheet (12), the seventh metal sheet (13) and the eighth metal sheet (14) are arranged in sequence, The inductance third metal sheet (9), the inductance fifth metal sheet (11) and the inductance seventh metal sheet (13) are arranged in parallel, and the lengths are all first lengths, the inductance fourth metal sheet (10), the inductance sixth metal sheet (12) and the inductance eighth metal sheet (14) are arranged in parallel, and the lengths are all second lengths, wherein the first lengths are smaller than or equal to the second lengths; The first grounding metal sheet (15) and the second grounding metal sheet (16) are respectively arranged on the first side and the second side of the first inductance metal layer (1).
  6. 6. The staggered silicon-based three-dimensional spiral inductor according to claim 5, wherein the inductor second metal layer (5) comprises an inductor ninth metal sheet (17), an inductor tenth metal sheet (18), an inductor eleventh metal sheet (19), an inductor twelfth metal sheet (20), an inductor thirteenth metal sheet (21), an inductor fourteenth metal sheet (22), an inductor fifteenth metal sheet (23) and a grounding third metal sheet (24); the ninth metal sheet (17), the tenth metal sheet (18), the eleventh metal sheet (19), the twelfth metal sheet (20), the thirteenth metal sheet (21), the fourteenth metal sheet (22) and the fifteenth metal sheet (23) are arranged in sequence, The ninth metal sheet (17), the eleventh metal sheet (19), the thirteenth metal sheet (21) and the fifteenth metal sheet (23) are parallel to each other and have a third length, the tenth metal sheet (18), the twelfth metal sheet (20) and the fourteenth metal sheet (22) are parallel to each other and have a fourth length, and the third length is less than or equal to the fourth length; the third metal sheet (24) is arranged outside the second metal layer (5) of the inductor.
  7. 7. A bandpass filter, characterized by using the staggered silicon-based three-dimensional spiral inductor according to any one of claims 1 to 6, comprising two staggered silicon-based three-dimensional spiral inductors arranged at intervals and a coupling capacitor arranged between the two staggered silicon-based three-dimensional spiral inductors.
  8. 8. A low-pass filter, characterized in that an interleaved silicon-based three-dimensional spiral inductor according to any one of claims 1 to 6 is used, comprising two coupling capacitors arranged at intervals and the interleaved silicon-based three-dimensional spiral inductor arranged between the two coupling capacitors.

Description

Staggered silicon-based three-dimensional spiral inductor and band-pass and low-pass filter Technical Field The invention belongs to the technical field of integrated circuit manufacturing and packaging, and particularly relates to an interleaved silicon-based three-dimensional spiral inductor and a band-pass and low-pass filter. Background The development trend of Moore's law is slowed down and the diversification development of integrated circuit application is two important characteristics of the current integrated circuit industry, and with the development of products in the fields of smart phones, internet of things, automobile electronics, high-performance computing, 5G, artificial intelligence and the like, particularly the application requirements of high-speed, high-frequency and heterogeneous integration of various devices in the 5G field (5G millimeter wave (28-60 GHz), 5G Sub-6GHz and 5G Internet of things (Sub-1 GHz)), advanced packaging technology is required to be innovated and developed continuously. Inductance is one of the most widely used passive components in integrated circuits, and is applied to analog, radio frequency and microwave circuits such as low noise amplifiers, filters, impedance matching networks and the like. The through silicon via (Through Silicon Vi, TSV) inductor can meet more complex design requirements in the circuit due to its higher quality factor and self-resonant frequency, and smaller parasitic effects and area. The integrated passive device (INTEGRATED PASSIVE DEVICE, IPD) technology can integrate radio frequency front-end devices such as band-pass filters, band-stop filters, power splitters, balancers, diplexers or multiplexers into a smaller flat space, thereby improving performance and overall integration. In the traditional three-dimensional spiral inductor structure, the redistribution layer metal on the bottom layer and the top layer of the substrate is connected by adopting TSV (through silicon via) so as to form the three-dimensional spiral structure, so that the quality factor and the inductance density of the inductor in the radio frequency circuit are improved, but the area of the three-dimensional spiral inductor is still larger, and the inductance density still has an improved space. Disclosure of Invention In order to solve the problems in the prior art, the invention provides an interleaved silicon-based three-dimensional spiral inductor and a band-pass and low-pass filter. The technical problems to be solved by the invention are realized by the following technical scheme: The invention provides an interleaved silicon-based three-dimensional spiral inductor which comprises an inductor first metal layer, a first silicon dioxide dielectric layer, an inductor silicon dielectric layer, a second silicon dioxide dielectric layer and an inductor second metal layer which are sequentially arranged from top to bottom, wherein a plurality of inductor metal sheets are arranged on the inductor first metal layer in an interleaved manner, a plurality of inductor metal sheets are arranged on the inductor second metal layer in an interleaved manner, the number of the inductor metal sheets on the inductor first metal layer is the same as that of the inductor metal sheets on the inductor second metal layer, and the inductor metal sheets on the inductor first metal layer and the inductor second metal layer are respectively connected in a one-to-one correspondence through a plurality of first metal conductor columns. In one embodiment of the invention, the inductance metal sheets of the inductance first metal layer are parallel or mutually angled, two ends of two adjacent inductance metal sheets are positioned on different horizontal lines, and the inductance metal sheets of the inductance second metal layer are parallel or mutually angled, and two ends of two adjacent inductance metal sheets are positioned on different horizontal lines. In one embodiment of the present invention, each of the inductance metal plates on the inductance first metal layer and the inductance second metal layer is provided with at least one connection site, and the connection sites of the inductance metal plates on the inductance first metal layer are in one-to-one correspondence with the connection sites of the inductance metal plates on the inductance second metal layer, and are all connected through the corresponding first metal conductor columns. In an embodiment of the present invention, the arrangement mode of the plurality of inductance metal sheets on the inductance first metal layer and the inductance second metal layer is the same or different. In one embodiment of the invention, a plurality of dielectric through holes are arranged on the first silicon dioxide dielectric layer, the silicon sensing dielectric layer and the second silicon dioxide dielectric layer at intervals, and a plurality of first metal conductor columns are arranged in the dielectric through holes in a one-to-o