CN-120110006-B - High-power anti-reverse power distribution control and detection circuit and method

CN120110006BCN 120110006 BCN120110006 BCN 120110006BCN-120110006-B

Abstract

The invention relates to a high-power anti-reflection power distribution control and detection circuit and a method, belongs to the technical field of power distribution control and detection circuits, and solves the problems of preventing false execution and non-execution of instructions and ensuring high reliability and high safety of power distribution output. The circuit comprises an isolation driving circuit, a level conversion circuit, an upper computer and a power supply circuit, wherein the isolation driving circuit is used for carrying out on-off control on a MOSFET switch transistor through a transistor control signal and detecting an on-off state, the level conversion circuit is used for converting the control signal into a transistor control signal and carrying out level conversion on a state signal and providing the transistor control signal for the FPGA, the FPGA is communicated with the upper computer in a CAN communication mode to provide the transistor state signal for the upper computer and receive the control signal from the upper computer, and the power supply circuit is used for providing power supply voltage for the isolation driving circuit, the level conversion circuit and the FPGA and receiving an off-control signal in a 485 communication mode to set the power supply voltage to zero. And a full work flow state detection is used for providing sufficient criteria for power distribution execution. When CAN communication fails, RS485 communication is utilized to cut off power distribution output, so that the safety of the system is improved.

Inventors

ZHAO WEISHUANG
GUO YANJIAO
ZHANG YING
WANG SHAONING
ZHAO YINGKAI
NAN FEI
LI QINGBIAO
WANG MENGHUI
WANG SEN
HU ZHAOTIAN

Assignees

北京航天时代微机电技术有限公司

Dates

Publication Date: 20260512
Application Date: 20250228

Claims (8)

1. A high power anti-reverse power distribution control and detection circuit, comprising: The isolation driving circuit is used for controlling the on-off of a MOSFET switch transistor of the power distribution circuit to be detected through a transistor control signal and detecting the on-off state of the MOSFET switch transistor to obtain a transistor state signal; the level conversion circuit is used for converting a control signal provided by the FPGA into the transistor control signal and performing level conversion on the transistor state signal and providing the transistor state signal to the FPGA; The FPGA is used for communicating with an upper computer in a CAN communication mode to provide the transistor state signal after level conversion to the upper computer and receive the control signal from the upper computer, and A power supply circuit for supplying power supply voltages to the isolation driving circuit, the level shift circuit and the FPGA, wherein the power supply voltages of the isolation driving circuit, the level shift circuit and the FPGA are set to zero based on the received turn-off signals of the MOSFET switch transistors, The power distribution circuit to be detected comprises a first branch circuit, wherein the first branch circuit comprises a first ideal diode, a second ideal diode, a first MOSFET switch transistor and a second MOSFET switch transistor which are sequentially connected in series; Each of the first ideal diode and the second ideal diode is a combination of a control diode and a MOSFET control transistor, wherein an anode of the control diode is connected to a source of the MOSFET control transistor; the cathode of the control diode is connected to the drain electrode of the MOSFET control transistor, wherein the grid electrode of the MOSFET control transistor is controlled by a control chip to control the conduction sequence of the first ideal diode and the second ideal diode; The control chip comprises a first control chip U52 and a second control chip U54, wherein an input pin of the first control chip is connected to an anode of the first ideal diode, a gate pin of the first control chip is connected to a gate of a MOSFET control transistor in the first ideal diode, an output pin of the first control chip is connected to a cathode of the first ideal diode and an input pin of the second control chip, a gate pin of the second control chip is connected to a gate of a MOSFET control transistor in the second ideal diode, and an output pin of the second control chip is connected to a cathode of the second ideal diode, wherein a fourth capacitor is connected between a power supply voltage output pin in the first control chip and a ground output pin, a power supply voltage output pin in the first control chip is connected to the anode of the first ideal diode via a fifth resistor, a fifth capacitor is connected between a power supply voltage output pin in the second control chip and a ground output pin, and a power supply voltage output pin in the second control chip is connected to the cathode of the ideal diode via a sixth resistor.
2. The high power anti-reflection power distribution control and detection circuit according to claim 1, wherein the power distribution circuit to be detected comprises a second branch, the isolation driving circuit comprises a first isolation driving circuit, a second isolation driving circuit, a third isolation driving circuit and a fourth isolation driving circuit, wherein, The second branch comprises a third ideal diode, a fourth ideal diode, a third MOSFET switch transistor and a fourth MOSFET switch transistor which are sequentially connected, wherein the first isolation driving circuit, the second isolation driving circuit, the third isolation driving circuit and the fourth isolation driving circuit are respectively used for controlling the first MOSFET switch transistor, the second MOSFET switch transistor, the third MOSFET switch transistor and the fourth MOSFET switch transistor.
3. The high power anti-reflection power control and detection circuit according to claim 2, wherein each isolation driving circuit is configured to isolate an operating power supply voltage of the isolation driving circuit from a MOSFET side power supply, the each isolation driving circuit comprising a detection input, a detection output, a control input, and a control output, wherein, The detection input is used for detecting a state signal of the MOSFET switch transistor at a source electrode of the MOSFET switch transistor through the detection input; the detection output end is used for outputting a state voltage corresponding to a state signal of the MOSFET switch transistor and providing the state voltage for the level conversion circuit; the control input terminal is used for receiving the transistor control signal, and The control output is used for providing the transistor control signal to the grid electrode of the MOSFET switch transistor.
4. The high power anti-reflection power control and detection circuit of claim 3 wherein the isolation driver circuit further comprises an isolation driver chip, a diode, a first resistor, a second resistor, a third resistor, a fourth resistor, a first capacitor, a second capacitor, and a third capacitor, wherein The anode of the diode is connected to the detection input terminal, and the cathode of the diode is connected to the source of the MOSFET switch transistor; The detection output end is connected to the input end of the level conversion circuit; one end of the first capacitor is grounded, and the other end of the first capacitor is connected to the control input end; One ends of the first resistor and the second resistor are respectively connected to a first control output end and a second control output end, and the other ends of the first resistor and the second resistor are connected to the grid electrode of the MOSFET switch transistor; One end of the third resistor and one end of the fourth resistor are connected to the isolation ground ISOGND and the drain of the MOSFET switch transistor, the other end of the third resistor is connected to one end of the second capacitor, the other end of the second capacitor and the other end of the fourth resistor are connected to the gate of the MOSFET switch transistor, and One end of the third capacitor is grounded, and the other end of the third capacitor is connected to a power supply voltage and a power supply pin of the isolation driving circuit.
5. The high power anti-reflection power control and detection circuit according to claim 1, wherein the power supply circuit comprises a power input pin SVIN, a power output pin VOUT, an operation MODE selection pin MODE, an internal regulator output pin INTVCC, an output enable pin RUN, and a power output normal pin PGOOD, wherein, The power input pins SVIN include a first power input pin SVIN1, a second power input pin SVIN, and a third power input pin SVIN, which are all used for receiving a power supply of the power supply circuit; Whether the power supply output is normal or not includes a first path pin PGOOD1, a second path pin PGOOD2 and a third path pin PGOOD3, wherein the first path pin PGOOD1, the second path pin PGOOD2 and the third path pin PGOOD3 are respectively connected to a working MODE selection pin MODE1 and an internal voltage regulator output pin INTVCC1, a working MODE selection pin MODE2 and an internal voltage regulator output pin INTVCC2, and a working MODE selection pin MODE3 and an internal voltage regulator output pin INTVCC3 through two resistors; The output enable pin RUN comprises a first path output enable pin RUN1, a second path output enable pin RUN2 and a third path output enable pin RUN3, wherein the first path output enable pin RUN1 is connected to an output signal pin pow_OFF of the 485 communication-based FPGA, the second path output enable pin RUN2 is connected to a connection point of two resistors between the working MODE selection pin MODE1 and the internal voltage regulator output pin INTVCC1, and the third path output enable pin RUN3 is connected to a connection point of two resistors between the working MODE selection pin MODE2 and the internal voltage regulator output pin INTVCC; The power output pins VOUT include a first path of output pin VOUT1, a second path of output pin VOUT2, and a third path of output pin VOUT3, where the first power voltage output via the first path of output pin VOUT1, the second power voltage output via the second path of output pin VOUT2, and the third power voltage output via the third path of output pin VOUT 3.
6. The high power anti-reflection power distribution control and detection circuit according to claim 5, wherein, Providing a first supply voltage to the FPGA via the first way output pin VOUT 1; providing a second supply voltage to the level-shifting circuit via the second output pin VOUT2, and Providing a third supply voltage to the isolation driving circuit via the third output pin VOUT3, wherein the first supply voltage, the second supply voltage, and the third supply voltage are different.
7. The high power anti-reflection power control and detection circuit according to claim 6, wherein the FPGA sets or zeroes a control input of the isolation driving circuit according to the control signal received from the host computer.
8. The high-power anti-reverse power distribution control and detection method is characterized by comprising the following steps of: the method comprises the steps that an isolation driving circuit utilizes a transistor control signal to conduct on-off control on a MOSFET switch transistor of a power distribution circuit to be detected, and the on-off state of the MOSFET switch transistor is detected to obtain a transistor state signal; Converting a control signal provided by an FPGA into the transistor control signal through a level conversion circuit, and performing level conversion on the transistor state signal and providing the transistor state signal to the FPGA; Communicating with an upper computer through the FPGA in a CAN communication mode to provide the transistor state signal after level conversion to the upper computer and receive the control signal from the upper computer, and Providing power supply voltages to the isolation driving circuit, the level converting circuit and the FPGA through a power supply circuit, wherein the power supply voltages of the isolation driving circuit, the level converting circuit and the FPGA are set to zero based on the received disconnection signals of the MOSFET switching transistors, The power distribution circuit to be detected comprises a first branch circuit, wherein the first branch circuit comprises a first ideal diode, a second ideal diode, a first MOSFET switch transistor and a second MOSFET switch transistor which are sequentially connected in series; Each of the first ideal diode and the second ideal diode is a combination of a control diode and a MOSFET control transistor, wherein an anode of the control diode is connected to a source of the MOSFET control transistor; the cathode of the control diode is connected to the drain electrode of the MOSFET control transistor, wherein the grid electrode of the MOSFET control transistor is controlled by a control chip to control the conduction sequence of the first ideal diode and the second ideal diode; The control chip comprises a first control chip U52 and a second control chip U54, wherein an input pin of the first control chip is connected to an anode of the first ideal diode, a gate pin of the first control chip is connected to a gate of a MOSFET control transistor in the first ideal diode, an output pin of the first control chip is connected to a cathode of the first ideal diode and an input pin of the second control chip, a gate pin of the second control chip is connected to a gate of a MOSFET control transistor in the second ideal diode, and an output pin of the second control chip is connected to a cathode of the second ideal diode, wherein a fourth capacitor is connected between a power supply voltage output pin in the first control chip and a ground output pin, a power supply voltage output pin in the first control chip is connected to the anode of the first ideal diode via a fifth resistor, a fifth capacitor is connected between a power supply voltage output pin in the second control chip and a ground output pin, and a power supply voltage output pin in the second control chip is connected to the cathode of the ideal diode via a sixth resistor.

Description

High-power anti-reverse power distribution control and detection circuit and method Technical Field The invention relates to the technical field of power distribution control and detection circuits, in particular to a high-power anti-reflection power distribution control and detection circuit and method. Background The power distribution switch in the modern power distribution system is mostly dependent on a traditional mechanical relay or traditional monitoring equipment, the power distribution system based on the relay form is difficult to realize real-time detection of the power distribution switch state, the real-time monitoring capability is weak, the power distribution fault usually needs manual inspection or passive response, and the capturing of transient faults or the high-frequency monitoring cannot be realized. And the relay relies on mechanical contact to carry out switching operation, and frequent switching can lead to contact wearing and tearing, oxidation or adhesion, reduces life. The switching life of a common mechanical relay is typically around 10 tens of thousands times, much lower than millions of times or even higher for MOS-tube-based solid state power distribution switches. Modern power distribution systems rely more on customized hardware or complex wiring, which results in problems of high cost, long deployment period, large usage space and the like, and adaptation and productization between different load systems cannot be realized, so that a power distribution circuit with universality, modularization, high reliability, high safety and full-state detectability is urgently needed. Disclosure of Invention In view of the above analysis, the embodiment of the invention aims to provide a high-power anti-reflection power distribution control and detection circuit, which is used for solving the problems of how to execute a power distribution output instruction and detect a power distribution output state, preventing the instruction from being executed by mistake and not being executed, and ensuring the high reliability and the high safety of the power distribution output. On one hand, the embodiment of the invention provides a high-power anti-reflection power distribution control and detection circuit, which comprises an isolation driving circuit, a level conversion circuit, an FPGA (field programmable gate array) and a power supply circuit, wherein the isolation driving circuit is used for carrying out on-off control on MOSFET (metal oxide semiconductor field effect transistor) switching transistors of a power distribution circuit to be detected through transistor control signals and detecting on-off states of the MOSFET switching transistors to obtain transistor state signals, the level conversion circuit is used for converting control signals provided by the FPGA into the transistor control signals and carrying out level conversion on the transistor state signals and providing the transistor state signals to the FPGA, the FPGA is used for communicating with an upper computer in a CAN (controller area network) communication mode to provide the transistor state signals after the level conversion to the upper computer and receive the control signals from the upper computer, and the power supply circuit is used for providing power supply voltages for the isolation driving circuit, the level conversion circuit and the FPGA, and the power supply voltage of the isolation driving circuit, the level conversion circuit and the FPGA is set to zero based on the received off signals of the MOSFET switching transistors. The technical scheme has the beneficial effects that (1) the system high reliability is realized by adopting a reliability design mode based on series-parallel execution. (2) The invention adopts the work whole flow state detection technology to provide sufficient criteria for the power distribution execution condition. (3) According to the invention, a CAN and RS485 communication mode is adopted, when the CAN communication fails, the RS485 communication CAN be utilized to cut off the power distribution output, so that the safety of the system is improved. Based on further improvement of the circuit, the power distribution circuit to be detected comprises a first branch and a second branch, wherein the isolation driving circuit comprises a first isolation driving circuit, a second isolation driving circuit, a third isolation driving circuit and a fourth isolation driving circuit, the first branch comprises a first ideal diode, a second ideal diode, a first MOSFET switch transistor and a second MOSFET switch transistor which are sequentially connected in series, the second branch comprises a third ideal diode, a fourth ideal diode, a third MOSFET switch transistor and a fourth MOSFET switch transistor which are sequentially connected, and the first isolation driving circuit, the second isolation driving circuit, the third isolation driving circuit and the fourth isolation driving ci