CN-120166831-B - Display panel and display device

Abstract

The application relates to a display panel and a display device, and relates to the technical field of display. The display panel comprises a pixel circuit, a light emitting element and a signal line, wherein the signal line comprises a grid reset signal line, an anode reset signal line and a power supply signal line, the grid reset signal line comprises a first grid reset signal line extending along a first direction and a second grid reset signal line extending along a second direction, the first grid reset signal line comprises a plurality of first subsections extending along the first direction, the first direction is intersected with the second direction, the anode reset signal line comprises a first anode reset signal line extending along the first direction and a second anode reset signal line extending along the second direction, the first anode reset signal line comprises a plurality of second subsections extending along the first direction, and the power supply signal line comprises a first power supply signal line extending along the first direction and arranged along the second direction. The application can improve the display uniformity.

Inventors

• LI WANRONG

Assignees

• 武汉天马微电子有限公司

Dates

Publication Date

20260508

Application Date

20250225

Claims (20)

1. 1. A display panel is characterized by comprising a pixel circuit, a light emitting element and a signal line; The pixel circuit comprises a driving transistor, a grid reset transistor and an anode reset transistor, wherein the signal line comprises a grid reset signal line, an anode reset signal line and a power signal line, a first electrode of the grid reset transistor is electrically connected with the grid reset signal line, a second electrode of the grid reset transistor is electrically connected with the grid of the driving transistor, a first electrode of the anode reset transistor is electrically connected with the anode reset signal line, a second electrode of the anode reset transistor is electrically connected with a first electrode of the light emitting element, a second electrode of the light emitting element is electrically connected with the power signal line, The gate reset signal line includes a first gate reset signal line extending in a first direction and a second gate reset signal line extending in a second direction; the first grid reset signal line comprises a plurality of first subsections extending along a first direction, and the first subsections are electrically connected with the second grid reset signal line; The anode reset signal line comprises a first anode reset signal line extending along a first direction and a second anode reset signal line extending along a second direction, wherein the first anode reset signal line comprises a plurality of second subsections extending along the first direction, and the second subsections are electrically connected with the second anode reset signal line; The power signal lines comprise first power signal lines extending along a first direction and arranged along a second direction, and the first subsections and the second subsections are alternately arranged along the first direction and the second direction.
2. 2. The display panel according to claim 1, wherein the second anode reset signal line and the second gate reset signal line penetrate a display region of the display panel, respectively, in the second direction; along the first direction, the first power signal line penetrates through a display area of the display panel.
3. 3. The display panel of claim 2, wherein the first power signal line is included between any adjacent first and second sub-segments along the second direction.
4. 4. The display panel according to claim 1, wherein the second gate reset signal line and the second anode reset signal line are alternately arranged along the first direction.
5. 5. The display panel of claim 1, wherein the first subsection overlaps the second gate reset signal line in a third direction, wherein the third direction is perpendicular to a plane in which the first direction and the second direction lie, A plurality of first subsections arranged along the second direction, wherein overlapped second grid reset signal lines are identical; the plurality of first subsections arranged along the first direction, the overlapped second gate reset signal lines are different.
6. 6. The display panel of claim 1, wherein the second subsection overlaps the second anode reset signal line in a third direction, wherein the third direction is perpendicular to a plane in which the first direction and the second direction lie, A plurality of the second sub-segments arranged along the second direction, the overlapped second anode reset signal lines being identical; and a plurality of second sub-segments arranged along the first direction, wherein the overlapped second anode reset signal lines are different.
7. 7. The display panel according to claim 1, wherein the power signal line further includes a second power signal line extending in the second direction and arranged in the first direction, the first power signal line being electrically connected to the second power signal line; and along the second direction, the second power signal line penetrates through the display area of the display panel.
8. 8. The display panel according to claim 7, further comprising a plurality of signal line groups arranged along the first direction, the signal line groups including one of the second gate reset signal lines, one of the second anode reset signal lines, and one of the second power supply signal lines.
9. 9. The display panel of claim 7, wherein the first sub-segment and the second sub-segment overlap the second power signal line in a third direction, respectively, wherein the third direction is perpendicular to a plane in which the first direction and the second direction are located, wherein, A plurality of first subsections arranged along the second direction, wherein the overlapped second power signal lines are the same; a plurality of the first sub-segments arranged along the first direction, the overlapped second power signal lines being different; a plurality of the second sub-segments arranged in the second direction, the overlapped second power signal lines being identical; and a plurality of second sub-segments arranged along the first direction, wherein the overlapped second power signal lines are different.
10. 10. The display panel according to claim 1, wherein in the same column of the pixel circuits, the number of the pixel circuits is N10, the number of the first sub-segments corresponding to the pixel circuits in the column is N11, and the number of the second sub-segments is N12, wherein N10 is equal to or greater than N11+N12, and N10, N11, and N12 are positive integers.
11. 11. The display panel according to claim 1, wherein in the same row of the pixel circuits, the number of the pixel circuits is N20, the number of the first gate reset signal lines corresponding to the row of the pixel circuits is N21, the number of the first anode reset signal lines is N22, and the number of the first power signal lines is N23, wherein N20 is equal to or greater than N21, N20 is equal to or greater than N22, N20 is equal to or greater than N23, and N20, N21, N22, and N23 are positive integers.
12. 12. The display panel according to claim 11, the method is characterized in that n21=n22=n23, and n20 is larger than or equal to n21+n23.
13. 13. The display panel according to claim 1, wherein in the same column of the pixel circuits, the number of the pixel circuits is N30, the number of the second gate reset signal lines corresponding to the column of the pixel circuits is N31, and the number of the second anode reset signal lines is N32, wherein N30 is equal to or greater than N31, N30 is equal to or greater than N32, and N30, N31, and N32 are positive integers.
14. 14. The display panel according to claim 13, wherein the power signal lines include the first power signal lines and second power signal lines extending in the second direction and arranged in the first direction, wherein the number of the second power signal lines is N33, N30 is equal to or greater than N33, and N33 is a positive integer.
15. 15. The display panel according to claim 14, it is characterized in that the method comprises the steps of, n31=n32 =n33.
16. 16. The display panel according to any one of claims 1 to 15, wherein the display panel includes first, second, and third sub-pixels having different emission colors; The first sub-pixel and the second sub-pixel form a first virtual quadrangle, the center of the first sub-pixel is positioned at a first vertex of the first virtual quadrangle, the center of the second sub-pixel is positioned at a second vertex of the first virtual quadrangle, the first vertex and the second vertex are alternately arranged at intervals, and the third sub-pixel is positioned in the first virtual quadrangle; the third sub-pixel forms a second virtual quadrangle, the center of the third sub-pixel is positioned at the vertex of the second virtual quadrangle, and the first sub-pixel or the second sub-pixel is positioned in the second virtual quadrangle; the first power supply signal line is overlapped with at least the pixel circuit of the third sub-pixel, the first sub-segment is overlapped with at least the pixel circuit of the first sub-pixel, the second sub-segment is overlapped with at least the pixel circuit of the second sub-pixel, or the first sub-segment is overlapped with at least the pixel circuit of the second sub-pixel, and the second sub-segment is overlapped with at least the pixel circuit of the first sub-pixel.
17. 17. The display panel of claim 16, wherein the first, second and third sub-pixels are each one of and different from a red, green and blue sub-pixel.
18. 18. The display panel according to any one of claims 1 to 15, wherein the first gate reset signal line and the second gate reset signal line are provided in different layers; the first anode reset signal line and the second anode reset signal line are arranged in different layers.
19. 19. The display panel according to claim 18, wherein the first gate reset signal line, the first anode reset signal line, and the first power signal line are arranged in the same layer; The second gate reset signal line and the second anode reset signal line are arranged in the same layer.
20. 20. The display panel of claim 19, further comprising a substrate, a first conductive layer, a second conductive layer, a third conductive layer, and a fourth conductive layer, which are stacked in this order; the first grid reset signal line, the first anode reset signal line and the first power supply signal line are respectively positioned on the third conductive layer, and the second grid reset signal line and the second anode reset signal line are respectively positioned on the second conductive layer.

Description

Display panel and display device Technical Field The present application relates to the field of display technologies, and in particular, to a display panel and a display device. Background With the continuous development of display technology, display products are gradually evolving toward high resolution. However, the higher the resolution, the more the design space is compressed, and the gridding design of part of the signal lines cannot be fully considered, so that the display uniformity of the display product is poor. Disclosure of Invention The application provides a display panel and a display device, which can realize grid design of grid reset signal lines and anode reset signal lines and are beneficial to improving display uniformity. In a first aspect, an embodiment of the present application provides a display panel including a pixel circuit, a light emitting element, and a signal line; The pixel circuit comprises a driving transistor, a grid reset transistor and an anode reset transistor, wherein the signal line comprises a grid reset signal line, an anode reset signal line and a power signal line, a first electrode of the grid reset transistor is electrically connected with the grid reset signal line, a second electrode of the grid reset transistor is electrically connected with the grid of the driving transistor, a first electrode of the anode reset transistor is electrically connected with the anode reset signal line, a second electrode of the anode reset transistor is electrically connected with a first electrode of the light emitting element, a second electrode of the light emitting element is electrically connected with the power signal line, The gate reset signal line includes a first gate reset signal line extending in a first direction and a second gate reset signal line extending in a second direction; the first grid reset signal line comprises a plurality of first subsections extending along a first direction, and the first subsections are electrically connected with the second grid reset signal line; The anode reset signal line comprises a first anode reset signal line extending along a first direction and a second anode reset signal line extending along a second direction, wherein the first anode reset signal line comprises a plurality of second subsections extending along the first direction, and the second subsections are electrically connected with the second anode reset signal line; the power signal lines include first power signal lines extending in a first direction and arranged in a second direction. In a second aspect, an embodiment of the present application further provides a display device, where the display device includes the display panel provided above. According to the display panel and the display device provided by the embodiment of the application, the grid reset signal lines comprise the first grid reset signal lines and the second grid reset signal lines which extend along different directions, the first grid reset signal lines comprise the first subsections which extend along the first direction and are disconnected, and the second grid reset signal lines which extend along the second direction and are connected with the second grid reset signal lines are arranged and are electrically connected with the second grid reset signal lines through the first subsections, so that the layout design of the grid reset signal lines is realized, the grid design of the grid reset signal lines is also realized, and the distribution uniformity of the grid reset signal lines is improved, thereby improving the uniformity of the grid reset signals in the display panel and being beneficial to improving the display effect of the display panel; in addition, the anode reset signal line comprises a first anode reset signal line and a second anode reset signal line which extend along different directions, and the first anode reset signal line comprises a plurality of second subsections which extend along the first direction and are disconnected, and a second anode reset signal line which extends along the second direction and is connected with the second anode reset signal line through the second subsections, so that the layout design of the anode reset signal line is realized, the grid design of the anode reset signal line is also realized, the distribution uniformity of the anode reset signal line is improved, the uniformity of grid reset signals in the display panel is improved, and the display effect of the display panel is improved; in addition, the power signal lines comprise first power signal lines extending along the first direction and arranged along the second direction, so that the layout design of the power signal lines is realized, the support is provided for the display function of the display panel, and the gate reset signal lines are realized, the layout design of the anode reset signal line and the power supply signal line also realizes the grid design of the grid res