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CN-121029243-B - Branch prediction method, device, system, computer device, medium and product

CN121029243BCN 121029243 BCN121029243 BCN 121029243BCN-121029243-B

Abstract

The embodiment of the disclosure discloses a branch prediction method, a branch prediction device, a branch prediction system, a computer device, a medium and a product. The branch prediction method comprises the steps of dividing a skip threshold of a first direction predictor into at least a first skip threshold and a second skip threshold, wherein the first skip threshold and the second skip threshold correspond to unconditional branches and conditional branches of a zero-delay branch target buffer respectively, determining the skip threshold corresponding to the first direction predictor and skip thresholds of other direction predictors according to hit results, determining skip prediction results according to symbols of the first skip threshold if the skip threshold corresponding to the determined first direction predictor is the first skip threshold, and performing addition operation on the skip threshold corresponding to the second skip threshold and skip thresholds of other direction predictors if the skip threshold corresponding to the determined first direction predictor is the second skip threshold, and determining skip prediction results according to symbols of addition operation results. The method can help to reduce the logic depth of the ZBTB, improve the capacity of the ZBTB and improve the prediction speed of BP.

Inventors

  • LI QIAO
  • YANG YAFANG

Assignees

  • 海光信息技术股份有限公司

Dates

Publication Date
20260512
Application Date
20250815

Claims (13)

  1. 1. A method of branch prediction, comprising: dividing a jump threshold of the first direction predictor into at least a first jump threshold corresponding to an unconditional branch of the zero delay branch target buffer and a second jump threshold corresponding to a conditional branch of the zero delay branch target buffer; Determining a jump threshold corresponding to the first direction predictor and jump thresholds of other direction predictors according to a hit result of the zero-delay branch target buffer; If the determined jump threshold corresponding to the first direction predictor is a first jump threshold, determining a jump prediction result according to the sign of the first jump threshold; if the determined jump threshold value corresponding to the first direction predictor is a second jump threshold value, carrying out addition operation on the second jump threshold value and jump threshold values of other direction predictors, and determining a jump prediction result according to the sign of the addition operation result; The first skip threshold and the second skip threshold are skip counts with sign bits, the first skip threshold has a first bit number, the second skip threshold has a second bit number, and the first bit number and the second bit number meet that the first bit number is larger than the bit numbers of the skip thresholds of the other direction predictors, and the second bit number is consistent with the bit numbers of the skip thresholds of the other direction predictors.
  2. 2. The branch prediction method of claim 1, wherein the first jump threshold comprises a fixed sign bit, an interval bit, and a numerical bit, the number of bits of the numerical bit of the first jump threshold being the same as the second number of bits.
  3. 3. The branch prediction method of claim 1, wherein the jump threshold of the first direction predictor is divided into a first jump threshold, a second jump threshold, and a third jump threshold, the third jump threshold corresponding to a branch not included in a zero-delay branch target buffer; the branch prediction method further comprises the step of determining a jump prediction result according to the sign of a third jump threshold if the jump threshold corresponding to the determined first direction predictor is the third jump threshold.
  4. 4. The branch prediction method of claim 3, wherein the third jump threshold has a third number of bits, the third number of bits satisfying a number of bits that is greater than the jump threshold of the other direction predictor.
  5. 5. The branch prediction method of claim 4, wherein the third jump threshold comprises a fixed sign bit, an interval bit, and a numerical bit, the numerical bit of the third jump threshold having the same number of bits as the second number of bits.
  6. 6. The branch prediction method of claim 2 or 5, wherein the fixed sign bit occupies at least one bit and the interval bit occupies at least one bit.
  7. 7. The branch prediction method of claim 1, wherein the first direction predictor is a PC index direction predictor, the branch prediction method further comprising updating a first jump threshold and a second jump threshold in the PC index direction predictor with a current PC after zero delay branch target buffer update.
  8. 8. A branch prediction apparatus, comprising: A threshold dividing module, configured to divide a jump threshold of the first direction predictor into at least a first jump threshold and a second jump threshold, where the first jump threshold corresponds to an unconditional branch of the zero-delay branch target buffer, and the second jump threshold corresponds to a conditional branch of the zero-delay branch target buffer; The threshold determining module is used for determining a jump threshold corresponding to the first direction predictor and jump thresholds of other direction predictors according to the hit result of the zero-delay branch target buffer; The jump prediction module is used for determining a jump prediction result according to the sign of the first jump threshold when the determined jump threshold corresponding to the first direction predictor is the first jump threshold, performing addition operation on the jump threshold corresponding to the second jump threshold and the jump thresholds of other direction predictors when the determined jump threshold corresponding to the first direction predictor is the second jump threshold, and determining the jump prediction result according to the sign of the addition operation result; The first skip threshold and the second skip threshold are skip counts with sign bits, the first skip threshold has a first bit number, the second skip threshold has a second bit number, and the first bit number and the second bit number meet that the first bit number is larger than the bit numbers of the skip thresholds of the other direction predictors, and the second bit number is consistent with the bit numbers of the skip thresholds of the other direction predictors.
  9. 9. A branch prediction system comprising a zero-delay branch target buffer, a first stage branch target buffer, a second stage branch target buffer, and the branch prediction apparatus of claim 8 corresponding to the zero-delay branch target buffer.
  10. 10. The branch prediction system of claim 9, wherein only the Tag field, val field, and Target field of each entry are maintained in the zero-latency branch Target buffer.
  11. 11. A computer apparatus, the computer apparatus comprising: at least one processor, and A memory communicatively coupled to the at least one processor, wherein, The memory stores instructions executable by the at least one processor to enable the at least one processor to perform the branch prediction method of any one of claims 1-7.
  12. 12. A computer readable storage medium storing computer instructions for causing a computer to perform the branch prediction method of any one of claims 1-7.
  13. 13. A computer program product comprising computer instructions which, when executed by a processor, implement the steps of the branch prediction method of any one of claims 1 to 7.

Description

Branch prediction method, device, system, computer device, medium and product Technical Field The present disclosure relates to the field of branch prediction technologies, and in particular, to a branch prediction method, device, system, computer device, medium, and product. Background The development of high performance processors requires BP to predict as fast as possible while improving prediction accuracy. BP microarchitecture, including multi-level BTBs, is currently often used for branch prediction. Typical BP microarchitectures include ZBTB, L1BTB, and L2BTB. The ZBTB has small capacity, the prediction delay is minimum, the prediction delay is generally 0 cycle, the L1BTB has slightly larger capacity, the prediction delay is generally 1-2 cycles, the L2BTB has very larger capacity, and the prediction delay is generally 3-4 cycles. In the prediction process, after obtaining the hit result of the ZBTB, the branch type of the hit branch of the ZBTB needs to be further combined with the direction prediction result of the direction predictor to give the jump prediction result. The inventor finds that the above combination logic is necessary for the micro-architecture of the ZBTB, so that the logic depth of the ZBTB in the prior art is larger, the capacity of the ZBTB is difficult to be improved, and the prediction speed of BP is not improved. Disclosure of Invention In view of this, embodiments of the present disclosure provide a branch prediction method, apparatus, system, computer device, medium, and product, which can help to reduce the logic depth of ZBTB, increase the capacity of ZBTB, and further increase the prediction speed of BP. In a first aspect, an embodiment of the present disclosure provides a branch prediction method, which adopts the following technical scheme: the branch prediction method comprises the following steps: dividing a jump threshold of the first direction predictor into at least a first jump threshold corresponding to an unconditional branch of the zero delay branch target buffer and a second jump threshold corresponding to a conditional branch of the zero delay branch target buffer; Determining a jump threshold corresponding to the first direction predictor and jump thresholds of other direction predictors according to a hit result of the zero-delay branch target buffer; If the determined jump threshold corresponding to the first direction predictor is a first jump threshold, determining a jump prediction result according to the sign of the first jump threshold; And if the determined jump threshold value corresponding to the first direction predictor is a second jump threshold value, performing addition operation on the second jump threshold value and jump threshold values of other direction predictors, and determining a jump prediction result according to the sign of the addition operation result. Optionally, the first skip threshold has a first number of bits, the second skip threshold has a second number of bits, and the first number of bits and the second number of bits satisfy that the first number of bits is greater than the number of bits of the skip threshold of the other direction predictor, and the second number of bits is consistent with the number of bits of the skip threshold of the other direction predictor. Optionally, the first skip threshold includes a fixed sign bit, an interval bit, and a number of bits, and the number of bits of the number bits of the first skip threshold is the same as the second number of bits. Optionally, the jump threshold of the first direction predictor is divided into a first jump threshold, a second jump threshold and a third jump threshold, wherein the third jump threshold corresponds to a branch which is not included in a zero delay branch target buffer, and the branch prediction method further comprises determining a jump prediction result according to a symbol of the third jump threshold if the jump threshold corresponding to the determined first direction predictor is the third jump threshold. Optionally, the third skip threshold has a third number of bits that satisfies that the third number of bits is greater than the number of bits of the skip threshold of the other direction predictors. Optionally, the third skip threshold includes a fixed sign bit, an interval bit, and a number of bits, and the number of bits of the number bits of the third skip threshold is the same as the second number of bits. Optionally, the fixed symbol bit occupies at least one bit, and the space bit occupies at least one bit. Optionally, the fixed symbol bits occupy 1 bit and the space bits occupy 1 bit. Optionally, the first direction predictor is a PC index direction predictor, and the other direction predictors are HP index direction predictors. Optionally, the first direction predictor is a PC index direction predictor, and the branch prediction method further comprises updating a first skip threshold and a second skip threshold in the PC inde