Search

CN-121052176-B - Universal computing unit verification method, device, electronic equipment and storage medium

CN121052176BCN 121052176 BCN121052176 BCN 121052176BCN-121052176-B

Abstract

The application provides a general computing unit verification method, a device, electronic equipment and a storage medium, which relate to the technical field of chip design verification and comprise the steps of instantiating at least one operator configuration stimulus; the method comprises the steps of generating execution excitation and description excitation corresponding to each operator configuration excitation, generating request interface excitation for driving a general purpose computing unit interface based on the execution excitation, generating return interface excitation for driving the general purpose computing unit interface based on the description excitation, generating request interface transaction based on the request interface excitation, and verifying the general purpose computing unit based on the return interface transaction generated based on the return interface excitation. The method and the device realize the gradual decomposition and configuration verification excitation of interface transactions from operator definition of the top layer to the bottom layer through the hierarchical decoupling excitation generation and management method, improve the flexibility, randomness and completeness of verification of the general computing unit, and effectively improve the verification efficiency of the general computing unit.

Inventors

  • Request for anonymity
  • Request for anonymity
  • Request for anonymity

Assignees

  • 上海壁仞科技股份有限公司

Dates

Publication Date
20260505
Application Date
20251029

Claims (5)

  1. 1. A method for verifying a general purpose computing unit, comprising: instantiating at least one operator configuration stimulus based on the number of operators corresponding to the current verification process; Generating execution excitation and description excitation corresponding to each operator configuration excitation based on preset parameters and/or randomization parameters, wherein the execution excitation is used for defining an execution flow of an operator, and the description excitation is used for defining hardware resources required by the operator; Generating a request interface stimulus to drive a general purpose computing unit interface based on the execution stimulus, and generating a return interface stimulus to drive a general purpose computing unit interface based on the description stimulus; verifying the general purpose computing unit based on a request interface transaction generated by the request interface stimulus and a return interface transaction generated by the return interface stimulus; The method further comprises the steps of: acquiring the execution state of each operator in the general calculation unit and the hardware resource influence parameters of each operator; Judging whether hardware resource conflict exists between a current operator and each operator based on the execution state of each operator and the hardware resource influence parameters of each operator so as to determine whether to execute the current operator; Configuring a first delay parameter, a second delay parameter, a third delay parameter and a fourth delay parameter; The system comprises a first delay parameter, a second delay parameter, a third delay parameter, a fourth delay parameter and a fourth delay parameter, wherein the first delay parameter is used for determining the initialization delay of a first execution stimulus; based on the execution state of each operator and the hardware resource influence parameters of each operator, judging whether the current operator and each operator have hardware resource conflict or not to determine whether to execute the current operator, including: executing the current operator in the case that the executing operator does not exist based on the execution state of each operator; Comparing the execution number of the current operator with the execution number of the target operator in the case that the existence of the executing target operator is determined based on the execution state of each operator; under the condition that the execution number of the current operator is the same as the execution number of any target operator, determining that hardware resource conflict exists between the current operator and any target operator, and executing the current operator after the execution of any target operator is finished; comparing the hardware resource influence parameters of the current operator with the hardware resource influence parameters of the target operators under the condition that the execution numbers of the current operator are different from the execution numbers of the target operators; And under the condition that the hardware resource influence parameters of the current operator are partially the same as those of any target operator, determining that the current operator and any target operator have hardware resource conflict, and executing the current operator after the execution of any target operator is ended.
  2. 2. The general purpose computing unit verification method according to claim 1, wherein the preset parameters are determined based on command line parameters entered by a user or based on reproduction requirements of a specific application scenario.
  3. 3. A general purpose computing unit verification apparatus, comprising: An operator configuration excitation instantiation module, configured to instantiate at least one operator configuration excitation based on the number of operators corresponding to the current verification process; The execution excitation and description excitation instantiation module is used for generating execution excitation and description excitation corresponding to each operator configuration excitation based on preset parameters and/or randomized parameters, wherein the execution excitation is used for defining an execution flow of an operator, and the description excitation is used for defining hardware resources required by the operator; An interface stimulus instantiation module to generate a request interface stimulus to drive a general purpose computing unit interface based on the execution stimulus and to generate a return interface stimulus to drive a general purpose computing unit interface based on the description stimulus; The verification module is used for verifying the general computing unit based on the request interface transaction generated by the request interface stimulus and the return interface transaction generated by the return interface stimulus; The device is used for: acquiring the execution state of each operator in the general calculation unit and the hardware resource influence parameters of each operator; Judging whether hardware resource conflict exists between a current operator and each operator based on the execution state of each operator and the hardware resource influence parameters of each operator so as to determine whether to execute the current operator; Configuring a first delay parameter, a second delay parameter, a third delay parameter and a fourth delay parameter; The system comprises a first delay parameter, a second delay parameter, a third delay parameter, a fourth delay parameter and a fourth delay parameter, wherein the first delay parameter is used for determining the initialization delay of a first execution stimulus; based on the execution state of each operator and the hardware resource influence parameters of each operator, judging whether the current operator and each operator have hardware resource conflict or not to determine whether to execute the current operator, including: executing the current operator in the case that the executing operator does not exist based on the execution state of each operator; Comparing the execution number of the current operator with the execution number of the target operator in the case that the existence of the executing target operator is determined based on the execution state of each operator; under the condition that the execution number of the current operator is the same as the execution number of any target operator, determining that hardware resource conflict exists between the current operator and any target operator, and executing the current operator after the execution of any target operator is finished; comparing the hardware resource influence parameters of the current operator with the hardware resource influence parameters of the target operators under the condition that the execution numbers of the current operator are different from the execution numbers of the target operators; And under the condition that the hardware resource influence parameters of the current operator are partially the same as those of any target operator, determining that the current operator and any target operator have hardware resource conflict, and executing the current operator after the execution of any target operator is ended.
  4. 4. An electronic device comprising a memory, a processor and a computer program stored on the memory and running on the processor, characterized in that the processor implements the general purpose computing unit verification method of claim 1 or 2 when executing the computer program.
  5. 5. A non-transitory computer readable storage medium having stored thereon a computer program, wherein the computer program when executed by a processor implements the general purpose computing unit verification method of claim 1 or 2.

Description

Universal computing unit verification method, device, electronic equipment and storage medium Technical Field The present application relates to the field of chip design verification technologies, and in particular, to a method and apparatus for verifying a general purpose computing unit, an electronic device, and a storage medium. Background The general purpose computing unit (General Computing Unit, GCU) in Application-SPECIFIC INTEGRATED Circuit (ASIC) front-end design is a critical module whose primary function is to provide the necessary general purpose computing and flexible control capabilities for highly customized ASIC chips. The related technology is generally to write a directional test case according to verification scenes, directly generate excitation to verify a general computing unit after static configuration, and the method cannot adapt to the verification requirements of different verification scenes, has poor flexibility and completeness and has low verification efficiency. Therefore, how to improve the flexibility and completeness of the verification of the general computing unit and improve the verification efficiency is a technical problem to be solved in the industry. Disclosure of Invention The application provides a general computing unit verification method, a device, electronic equipment and a storage medium, which are used for solving the technical problem of how to improve the flexibility and completeness of the general computing unit verification and improve the verification efficiency. The application provides a general computing unit verification method, which comprises the following steps: instantiating at least one operator configuration stimulus based on the number of operators corresponding to the current verification process; generating execution excitation and description excitation corresponding to each operator configuration excitation based on preset parameters and/or randomization parameters, wherein the execution excitation is used for defining an execution flow of an operator, and the description excitation is used for defining hardware resources required by the operator; Generating a request interface stimulus to drive a general purpose computing unit interface based on the execution stimulus, and generating a return interface stimulus to drive a general purpose computing unit interface based on the description stimulus; And verifying the general computing unit based on the request interface transaction generated by the request interface stimulus and the return interface transaction generated by the return interface stimulus. In some embodiments, the execution stimulus includes start information for identifying an operator to begin running, at least one thread group task for defining the operator to execute the task, and end information for identifying an operator to end running. In some embodiments, the descriptive stimulus includes configuration information defining various types of hardware resources required by the operator. In some embodiments, the method further comprises: acquiring the execution state of each operator in the general calculation unit and the hardware resource influence parameters of each operator; Based on the execution state of each operator and the hardware resource influence parameters of each operator, judging whether the current operator and each operator have hardware resource conflict or not so as to determine whether to execute the current operator or not. In some embodiments, the determining whether the current operator and each operator have a hardware resource conflict based on the execution state of each operator and the hardware resource influence parameter of each operator, includes: executing the current operator in the case that the executing operator does not exist based on the execution state of each operator; Comparing the execution number of the current operator with the execution number of the target operator in the case that the existence of the executing target operator is determined based on the execution state of each operator; under the condition that the execution number of the current operator is the same as the execution number of any target operator, determining that hardware resource conflict exists between the current operator and any target operator, and executing the current operator after the execution of any target operator is finished; comparing the hardware resource influence parameters of the current operator with the hardware resource influence parameters of the target operators under the condition that the execution numbers of the current operator are different from the execution numbers of the target operators; And under the condition that the hardware resource influence parameters of the current operator are partially the same as those of any target operator, determining that the current operator and any target operator have hardware resource conflict, and executing the current operator after the e