CN-121098309-B - Fast level shifting circuit

CN121098309BCN 121098309 BCN121098309 BCN 121098309BCN-121098309-B

Abstract

The invention discloses a quick level conversion circuit which comprises a first inverter, a first driving unit, a second input tube, a first output node and a second power supply voltage, wherein the first inverter is used for generating a first inversion signal based on an input signal, the first driving unit is used for generating a first logic signal based on the input signal and comprises a first input tube, a control end of the first input tube is used for receiving the input signal, a first end of the first input tube is connected with a first reference potential, the second end of the first input tube is used as an output end of the first driving unit, the first conversion unit is connected with a second end of the first input tube, a first output node and a second power supply voltage are used for generating a second logic signal based on the first logic signal, the first end of the second input tube is connected with the first reference potential, the second end of the second input tube is connected with the first output node and the first conversion unit, and the control end of the first driving unit is connected with the first inverter and is used for generating a second logic signal based on the first inversion signal. The invention can realize the equalization of quick level conversion and rising edge and falling edge conversion speed on the premise of not increasing the circuit cost.

Inventors

ZHANG BAOHUA
WANG JUNDA
YU QING
LIN KUN

Assignees

苏州顺芯半导体有限公司

Dates

Publication Date: 20260512
Application Date: 20250923

Claims (9)

1. A fast level shifter circuit, comprising: The first inverter is connected between the first power supply voltage and a first reference potential and is used for generating a first inverted signal based on an input signal, wherein the level range of the input signal is from the first power supply voltage to the first reference potential; The first driving unit comprises a first input tube and a driving tube, wherein a control end of the first input tube receives an input signal, the first end of the first input tube is connected with a first reference potential, the second end of the first input tube is used as an output end of the first driving unit, the first driving unit is used for generating a first logic signal based on the input signal, a control end of the driving tube is connected with the control end of the first input tube and receives the input signal, the second end of the driving tube is connected with the second end of the first input tube and outputs the first logic signal, and the first end of the driving tube is connected with a second power supply voltage; the first conversion unit is connected with the second end of the first input tube, the first output node and the second power supply voltage and is used for generating a second logic signal based on the first logic signal, and the first logic signal is in phase opposition with the second logic signal; And the first end of the second input tube is connected with the first reference potential, the second end of the second input tube is connected with the first output node and the first conversion unit, and the control end of the second input tube is connected with the first inverter and is used for generating a second logic signal based on the first inversion signal.
2. The fast level shift circuit of claim 1, wherein the first shift unit comprises a second MOS transistor having a first end connected to a second supply voltage, a second end connected to the first output node, and a control end connected to the second end of the first input transistor.
3. The fast level shift circuit of claim 2, wherein the second MOS transistor is a P-channel MOS transistor, the second input transistor is an N-channel MOS transistor, and an on-resistance of the second MOS transistor is greater than an on-resistance of the second input transistor.
4. A fast level shifting circuit according to claim 3, further comprising a shaping unit connected between a second supply voltage and a second reference potential for deriving an output signal based on the second logic signal, the output signal having a level in the range of the second supply voltage to the second reference potential.
5. The fast level shifting circuit of claim 4, wherein, When the input signal changes from high level to low level, the first inversion signal is high level, the second input tube is rapidly conducted, the second MOS tube is gradually turned off from conduction, so that the source-drain resistance of the second MOS tube changes from low to high, when the source-drain resistance of the second MOS tube is larger than that of the second input tube, the second logic signal is low level, and the shaping unit outputs an output signal with low level; When the input signal changes from low level to high level, the first inversion signal is low level, the second input tube is turned off, the first input tube is turned on and pulls down the first logic signal to low level, the second MOS tube is turned on and pulls up the second logic signal to high level, and the shaping unit outputs an output signal of high level.
6. The fast level shift circuit of claim 1, wherein the first driving unit further comprises a latch unit, the latch unit comprises a first latch MOS transistor and a second latch MOS transistor, a control end of the first latch MOS transistor is connected to the first output node, a second end of the first latch MOS transistor is connected to a second end of the first input transistor, a first end of the first latch MOS transistor is connected to a second power supply voltage, a control end of the second latch MOS transistor is connected to the second end of the first input transistor, a second end of the second latch MOS transistor is connected to the first output node, and a first end of the second latch MOS transistor is connected to a second power supply voltage.
7. The fast level shift circuit according to claim 1, wherein the first conversion unit comprises a second inverter and a third inverter for deriving an output signal based on the first logic signal and/or the second logic signal, the output signal having a level in a range from the second supply voltage to a second reference potential; The second inverter is connected between a second power supply voltage and a second reference potential, the input end of the second inverter is connected with the first output node, and the output end of the second inverter is connected with the input end of the third inverter; The input end of the third inverter is connected with the second end of the first input tube to receive the first logic signal, the third inverter is used for generating the second logic signal based on the first logic signal and taking the second logic signal as an output signal, and the output end of the third inverter is used for outputting the output signal.
8. The fast level shifting circuit of claim 7, wherein, When the input signal changes from high level to low level, the first input tube is turned off rapidly, the first inversion signal is high level, the second input tube is turned on rapidly, the level on the first output node is pulled down to low level, and the output signal of low level is output through the second inverter and the third inverter; When the input signal changes from low level to high level, the first inversion signal is low level, the second input tube is turned off quickly, the first input tube is turned on quickly and pulls down the first logic signal to low level, before the second inverter converts the level on the first output node to low level, the first logic signal is pulled down by the first input tube, and the third inverter outputs the output signal of high level based on the first logic signal.
9. The fast level shifting circuit of claim 4 or 7, wherein the first logic signal has a level in a range from the second supply voltage to the second reference voltage, and/or, The level range of the second logic signal is from the second power supply voltage to the second reference potential.

Description

Fast level shifting circuit Technical Field The invention belongs to the technical field of integrated circuits, and particularly relates to a quick level conversion circuit. Background In an integrated circuit, when a signal of a low voltage power domain is output to a high voltage power domain, a high level of the low voltage power domain may not belong to a high level or have a large quiescent current during operation with respect to a voltage of the high voltage power domain. To solve this problem, in integrated circuit designs, a level conversion circuit is provided between different power domains, i.e. to convert a high level signal of a low voltage power domain into a high level signal of a high voltage power domain. As shown in FIG. 1, the twelfth MOS transistor M12, the thirteenth MOS transistor M13, the fourteenth MOS transistor M14 and the fifteenth MOS transistor M15 form a ring structure, wherein the twelfth MOS transistor M12 and the fourteenth MOS transistor M14 are PMOS, the on-resistance is larger, and the thirteenth MOS transistor M13 and the fifteenth MOS transistor M15 are NMOS, and the on-resistance is smaller. The pull-up level of the PMOS tube with larger on-resistance is the basic principle of the conversion circuit, so that a low level is obtained between the PMOS and the NMOS connected in series at the moment of level inversion, which results in slower level inversion, limits the conversion speed of the level conversion circuit, and also aggravates the difference of the conversion speeds of the rising edge and the falling edge of the signal. If a small PMOS on-resistance is designed, the level shift may not work properly. Therefore, in view of the above technical problems, it is necessary to provide a fast level shifter circuit. Disclosure of Invention The invention aims to provide a quick level conversion circuit which can realize quick level conversion and equalization of rising edge and falling edge conversion speeds without increasing circuit cost. In order to achieve the above object, a specific embodiment of the present invention provides the following technical solution: a fast level shifting circuit comprising: the first inverter is connected between a first power supply voltage and a first reference potential and is used for generating a first inverted signal based on the input signal, and the level range of the input signal is from the first power supply voltage to the first reference potential; the first driving unit comprises a first input tube, a control end of the first input tube receives an input signal, a first end of the first input tube is connected with a first reference potential, a second end of the first input tube is used as an output end of the first driving unit, and the first driving unit is used for generating a first logic signal based on the input signal; the first conversion unit is connected with the second end of the first input tube, the first output node and the second power supply voltage and is used for generating a second logic signal based on the first logic signal, and the first logic signal is in phase opposition with the second logic signal; And the first end of the second input tube is connected with the first reference potential, the second end of the second input tube is connected with the first output node and the first conversion unit, and the control end of the second input tube is connected with the first inverter and is used for generating a second logic signal based on the first inversion signal. In one or more embodiments of the present invention, the first driving unit further includes a driving tube, a control end of the driving tube is connected to the control end of the first input tube and receives an input signal, a second end of the driving tube is connected to the second end of the first input tube and outputs a first logic signal, and a first end of the driving tube is connected to a second power supply voltage. In one or more embodiments of the present invention, the first conversion unit includes a second MOS transistor, a first end of the second MOS transistor is connected to a second power supply voltage, a second end of the second MOS transistor is connected to the first output node, and a control end of the second MOS transistor is connected to the second end of the first input transistor. In one or more embodiments of the present invention, the second MOS transistor is a P-channel MOS transistor, the second input transistor is an N-channel MOS transistor, and an on-resistance of the second MOS transistor is greater than an on-resistance of the second input transistor. In one or more embodiments of the present invention, the fast level shift circuit further includes a shaping unit, connected between a second power supply voltage and a second reference potential, for obtaining an output signal based on the second logic signal, where a level of the output signal ranges from the second power supply voltage to the secon