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CN-121194091-B - Three-dimensional compact co-packaged switch structure

CN121194091BCN 121194091 BCN121194091 BCN 121194091BCN-121194091-B

Abstract

The invention provides a three-dimensional compact co-packaging switch structure which comprises an exchange chip, an optical chip, an electric chip and an intermediate layer, wherein the optical chip is arranged below the exchange chip, the electric chip is arranged between the optical chip and the exchange chip and is bonded with the optical chip through a flip-chip bonding process, the electric chip and the optical chip jointly form a transceiver chip, the intermediate layer is arranged below the transceiver chip and is connected with the transceiver chip, and a metal wiring circuit is integrated in the intermediate layer.

Inventors

  • LI MING
  • WANG XINGYU
  • XIE YUJUN
  • LI WEI

Assignees

  • 中国科学院半导体研究所

Dates

Publication Date
20260512
Application Date
20251009

Claims (10)

  1. 1. A three-dimensional co-packaged switch, comprising: Exchanging chips; The optical chip is arranged below the exchange chip; The electric chip is arranged between the optical chip and the exchange chip and is bonded with the optical chip through a flip-chip bonding process, wherein the electric chip and the optical chip jointly form a receiving-transmitting chip; And the intermediate layer is arranged below the transceiver chip and connected with the transceiver chip, and a metal wiring circuit is integrated in the intermediate layer.
  2. 2. The switch of claim 1, further comprising: and the molding compound is filled at the top and the side surfaces of the transceiver chip and covers the upper surface of the intermediate layer, so that the transceiver chip is embedded in the molding compound.
  3. 3. The switch of claim 1, further comprising: and the substrate is bonded to the lower surface of the exchange chip and is interconnected with the exchange chip in a wire bonding mode.
  4. 4. The switch of claim 1, wherein signals in the metal wiring circuit are interconnected with the switch chip by micro bumps after the interposer rewires the metal wiring circuit.
  5. 5. The switch of claim 1, wherein the transmitting chip in the transceiver chip is one or more of an electro-absorption modulated laser chip, a distributed feedback laser chip, or a fabry-perot laser chip.
  6. 6. The switch of claim 1, wherein the receiving chip in the transceiver chip is one or more of a PIN photodiode chip, an avalanche photodiode chip, or a monolithically integrated chip.
  7. 7. The switch of claim 1, wherein the material of the interposer comprises silicon, organic materials, glass, and composite materials.
  8. 8. The switch of claim 1, wherein the interposer is internally integrated with through silicon vias configured to enable vertical stacking.
  9. 9. The switch of claim 1, wherein the inter-interposer-integrated metal routing circuitry forms a rewiring layer configured to enable horizontal-direction interconnection.
  10. 10. The switch of claim 1, wherein the transceiver chip is provided with an optical structure for edge coupling or grating coupling, the optical structure being configured to enable input and output of optical signals.

Description

Three-dimensional compact co-packaged switch structure Technical Field The present disclosure relates to the field of optoelectronic integration and optical communications, and in particular to a three-dimensional compact co-packaged switch structure. Background The photoelectric integration technology is a key path for breaking through the limitation of the electric moore law by introducing the advantages of low power consumption, high-speed transmission and high integration degree of the photonic device. In the current commonly used switching system, the hot-plug optical module faces significant challenges such as increasing the density requirements of electrical and optical connectors and continuously increasing the power consumption under the existing external dimensions. The co-packaging optics breaks through the limitation through photoelectric co-design, the silicon optical engine and the ASIC exchange chip are integrated on the same packaging substrate, and the micron-level interconnection is used for replacing the traditional board-level link, so that the transmission distance of the electric signal is shortened by more than 90%, the impedance mismatch loss is reduced, and the power consumption is obviously reduced. However, the current co-packaged optics still has problems, most of the research is focused on improving the packaging form of the optical chip and the electrical chip, but few exchange chips are considered, and a certain distance exists between the exchange chip and the transceiver chip in the co-packaged optics, which affects the transmission of the switch signals. Disclosure of Invention First, the technical problem to be solved In view of the above, the present disclosure provides a three-dimensional compact co-packaged switch structure, so as to at least partially solve the technical problems of longer distance between a switch chip and a transceiver chip, larger area of the switch, and the like in the current co-packaged optics. (II) technical scheme The first aspect of the disclosure provides a three-dimensional compact co-packaged switch structure, which comprises a switch chip, an optical chip arranged below the switch chip, an electric chip arranged between the optical chip and the switch chip and bonded with the optical chip through a flip-chip bonding process, wherein the electric chip and the optical chip jointly form a transceiver chip, and an intermediate layer arranged below the transceiver chip and connected with the transceiver chip, wherein a metal wiring circuit is integrated in the intermediate layer. According to the embodiment of the disclosure, the transceiver chip comprises a dielectric layer, a dielectric layer and a dielectric layer, wherein the dielectric layer is arranged on the top and the side surfaces of the transceiver chip, and the dielectric layer is arranged on the dielectric layer. According to the embodiment of the disclosure, the semiconductor package further comprises a substrate bonded to the lower surface of the exchange chip and interconnected with the exchange chip in a wire bonding mode. According to an embodiment of the present disclosure, after the interposer rewires the metal wiring circuit, signals in the metal wiring circuit are interconnected with the switching chip through the micro bumps. According to an embodiment of the present disclosure, the transmitting chip in the transceiver chip is one or more of an electro-absorption modulated laser chip, a distributed feedback laser chip or a fabry-perot laser chip. According to an embodiment of the present disclosure, the receiving chip in the transceiver chip is one or more of a PIN photodiode chip, an avalanche photodiode chip, or a monolithically integrated chip. Materials for the interposer according to embodiments of the present disclosure include silicon, organic materials, glass, and composite materials. In accordance with an embodiment of the present disclosure, the interposer is internally integrated with through silicon vias configured to enable vertical stacking. According to an embodiment of the present disclosure, the metal wiring circuit integrated inside the interposer forms a rewiring layer configured to realize horizontal-direction interconnection. According to an embodiment of the present disclosure, a transceiver chip is provided with an optical structure for edge coupling or grating coupling, the optical structure being configured to enable input and output of optical signals. (III) beneficial effects The present disclosure overcomes the deficiencies in the prior art and provides a three-dimensional compact co-packaged switch structure having at least the following technical effects: (1) The three-dimensional (3D) stacking integration of the photoelectric transceiver chip and the exchange chip greatly reduces the loss in the signal transmission process, and simultaneously effectively inhibits the attenuation of high-frequency signals. In addition, the problems of high-fr