CN-121211757-B - SysML-based resistive superconducting current limiter design method and device

CN121211757BCN 121211757 BCN121211757 BCN 121211757BCN-121211757-B

Abstract

The invention discloses a method and a device for designing a resistive superconducting current limiter based on SysML, wherein the method comprises the following steps of S1, obtaining the design requirement of the resistive superconducting current limiter and carrying out requirement analysis, S2, analyzing the functional logic architecture of the resistive superconducting current limiter according to the design requirement, S3, obtaining the physical architecture of the resistive superconducting current limiter through conversion of design parameters and the functional logic architecture, and S4, outputting the design result of the resistive superconducting current limiter through the physical architecture and a thermoelectric analog algorithm. The invention solves the technical problems of high complexity of finite element simulation and numerical simulation and insufficient analysis of the design process and architecture design in the prior art, and can rapidly design the resistive superconducting current limiter and improve the accuracy and consistency of the design result.

Inventors

PAN CHUNYU
CHENG JIN
LU HONGBO
ZENG SHENGYU
DONG QIUYAN
YU HONGYAN

Assignees

北京机电工程研究所

Dates

Publication Date: 20260508
Application Date: 20251103

Claims (10)

1. The resistive superconducting current limiter design method based on SysML is characterized by comprising the following steps of: s1, obtaining design requirements of a resistive superconducting current limiter and carrying out requirement analysis; s2, analyzing the relation between the resistive superconducting current limiter and the external environment through an use case diagram in the SysML, analyzing the working operation flow of the resistive superconducting current limiter through an active diagram in the SysML, and analyzing the functional logic architecture of the resistive superconducting current limiter through a module definition diagram in the SysML according to the design requirements; S3, analyzing the physical architecture and physical parameters of the resistive superconducting current limiter through a module definition diagram in the SysML through design parameters and a functional logic architecture; S4, outputting and obtaining a time-varying curve of resistance of the resistive superconducting current limiter, a time-varying curve of limiting current, a time-varying curve of voltage of the resistive superconducting current limiter and a time-varying curve of temperature of the resistive superconducting current limiter through a physical structure and a set thermoelectric analog algorithm.
2. The method for designing the resistive superconducting current limiter based on the SysML according to claim 1, wherein the functional logic architecture comprises a superconducting current limiting unit, a low-temperature refrigerating system, a high-voltage outlet unit and an on-line monitoring system, a physical architecture is generated by using a module definition diagram, the superconducting current limiting unit consists of a basal layer, a BSCCO-2212 superconducting strip, a metal connecting layer and a Cu-Ni shunt resistor, the low-temperature refrigerating system consists of liquid nitrogen and a liquid nitrogen storage tank, the high-voltage outlet unit consists of a current limiting unit electrode and a high-voltage insulating sleeve, and the on-line monitoring system consists of a temperature sensor and a control cabinet.
3. The method for designing a resistive superconducting current limiter based on SysML according to claim 2, wherein in step S1, the design requirement is obtained by importing CSV and Excel file formats, and the requirement analysis is performed by constructing a requirement analysis model through a requirement graph.
4. A method of designing a resistive superconducting current limiter based on SysML according to any one of claims 1 to 3 wherein in step S4 the resistance of the resistive superconducting current limiter in the thermoelectric analogy algorithm The expression is: Wherein l is the length of the resistive superconducting current limiter, 、、 The width, thickness and resistivity of the superconductive strip are respectively, ( , ) Critical electric field strength of superconducting layer , Is the current of the superconducting tape, Is the superconducting critical current, T sp is the superconducting tape temperature, T c is the critical temperature, and n is the superconducting tape characteristic constant; 、、 The width, thickness and resistivity of the shunt resistor are respectively; 、、 the width, thickness and resistivity of the substrate layer respectively; 、、 the width, thickness and resistivity of the metal connection layer are respectively.
5. The method for designing a resistive superconducting current limiter based on SysML according to claim 4, wherein in step S4, the short-circuit current I t in the thermoelectric analogy algorithm is calculated as: wherein V o is the grid voltage, R c 、L c is the equivalent resistance and inductance when the grid is short-circuited, respectively, and t is the fault current time.
6. The method for designing a resistive superconducting current limiter based on SysML according to claim 5, wherein the temperature calculation expression in the thermoelectric analogy algorithm is: wherein the substrate layer has a heat capacity , Is the specific mass of the basal layer, Is the specific heat capacity of the basal layer and the heat capacity of the superconductive tape , Is the specific mass of the superconducting tape, Is the specific heat capacity of the superconducting tape; heat capacity of metal connecting layer , Is the specific mass of the metal connecting layer, Is the specific heat capacity of the metal connecting layer and the shunt resistance heat capacity , Is the specific mass of the shunt resistance, Is the specific heat capacity of the shunt resistor; 、、、 The temperature of the substrate layer, the temperature of the superconductive tape, the temperature of the metal connecting layer and the shunt resistance respectively, the power of the superconductive tape , Is superconducting tape current, metal connection layer power , Is the current of metal connecting layer and the power of shunt resistor , Is the shunt resistance current; Is the liquid nitrogen temperature; , , , , , as a first scale factor of the coefficients of the set, As a second scaling factor, the first scaling factor, As a result of the third scaling factor, For the fourth scaling factor the value of the second scaling factor, For the fifth scaling factor, h c is the convective heat transfer coefficient, 、、、 The heat conductivity of the substrate layer, the heat conductivity of the superconductive tape, the heat conductivity of the metal connecting layer and the heat conductivity of the shunt resistor are respectively.
7. The method for designing the resistive superconducting current limiter based on the SysML according to claim 6, wherein the workflow of the resistive superconducting current limiter obtained through the activity diagram analysis comprises the steps of detecting short-circuit current by the resistive superconducting current limiter when a power grid works normally to judge whether the short-circuit current exceeds a threshold current, triggering quench phase change by the resistive superconducting current limiter when the threshold current is exceeded, inhibiting the short-circuit current by increasing the resistance of the superconducting current limiting unit, and recovering the superconducting state by the resistive superconducting current limiter when the power grid returns to normal.
8. A resistive superconducting current limiter design device based on SysML, comprising: the demand acquisition analysis module is used for converting the CSV and Excel file format into a demand analysis model in a demand graph; The functional logic architecture analysis module is used for generating a functional logic architecture model of the resistive superconducting current limiter through a use case diagram, an activity diagram and a module definition diagram in the SysML and analyzing the relation between the resistive superconducting current limiter and an external environment and the workflow thereof; The physical architecture analysis module is used for generating a physical architecture model of the resistive superconducting current limiter through a module definition diagram, and comprises physical architecture components and physical parameters; The simulation demonstration module is used for outputting the design result of the resistive superconducting current limiter, and comprises a current limiting current curve, a temperature change curve, a resistance change curve and a voltage change curve.
9. An electronic device comprising a memory, a processor and a computer program stored on the memory and running on the processor, characterized in that the processor implements the sysplatter-based resistive superconducting current limiter design method according to any one of claims 1 to 7 when executing the computer program.
10. A computer-readable storage medium, wherein a processing program is stored on the computer-readable storage medium, the processing program realizing the sysplatter-based resistive superconducting current limiter design method according to any one of claims 1 to 7 when executed by a processor.

Description

SysML-based resistive superconducting current limiter design method and device Technical Field The invention belongs to the technical field of data processing of new generation information technology, and particularly relates to a method and a device for designing a resistive superconducting current limiter based on SysML. Background The resistive superconducting current limiter suppresses the short-circuit fault current of the power grid by utilizing the principle of quench caused by phase transition of the superconducting strip, has the characteristics of small influence on the power grid, high response speed, strong current limiting effect and the like, and has wide application in the power industry. The design method of the common resistive superconducting current limiter mainly comprises finite element simulation, mathematical model simulation and the like. The finite element simulation builds an electrothermal coupling model of the resistive superconducting current limiter coil through multiple physical simulation software such as COMSOL, simulates a current impact process under a short circuit fault, and calculates key design parameters such as temperature distribution, resistance change, voltage-current change and the like of the superconducting strip. The mathematical model simulation builds simulation models such as resistance-unit heat, electric field strength-current density index and the like through tools such as Matlab/Simulink and the like, and analyzes parameter changes such as current peak value, current limiting impedance, temperature change and the like. However, the existing resistive superconducting current limiter design method has the following defects that (1) finite element simulation time is too long and finite element simulation software and a power system are difficult to couple, (2) the combined simulation complexity of mathematical model simulation software and circuit simulation software is too high and simulation time is relatively long, superconducting quench and recovery characteristics under different short-circuit currents cannot be rapidly analyzed, and (3) the design process is not refined and decomposed downwards from system-level requirements, and the design result and the requirements are compared and verified. In general, the existing design method focuses on the physical characteristic analysis of the resistive superconducting current limiter, the simulation process is complex and time-consuming, the demand decomposition and the architecture design are insufficient, and the accuracy and the consistency of the design of the resistive superconducting current limiter system related to multiple fields, multiple layers and multiple stages are difficult to meet. In summary, there is room for improvement in the prior art. Disclosure of Invention The embodiment of the invention provides a method and a device for designing a resistive superconducting current limiter based on SysML (system-induced adaptive multi-layer) to at least solve the technical problems of excessively high complexity of finite element simulation and numerical simulation, insufficient analysis of design process requirements and insufficient architecture design. According to one aspect of the invention, a resistive superconducting current limiter design method based on SysML is provided, which comprises the following steps of S1, obtaining a design requirement of the resistive superconducting current limiter and carrying out requirement analysis, S2, analyzing a relation between the resistive superconducting current limiter and an external environment according to the design requirement through a use diagram in the SysML, analyzing a working operation flow of the resistive superconducting current limiter through an active diagram in the SysML, analyzing a functional logic framework of the resistive superconducting current limiter through a module definition diagram in the SysML, S3, analyzing a physical framework and a physical parameter of the resistive superconducting current limiter through design parameters and the functional logic framework through a module definition diagram in the SysML, and S4, outputting a time-varying resistance curve, a current limiting time-varying curve, a voltage time-varying curve and a temperature time-varying curve of the resistive superconducting current limiter according to the design requirement. Further, the functional logic architecture comprises a superconducting current limiting unit, a low-temperature refrigerating system, a high-voltage outlet unit and an online monitoring system, wherein a physical architecture is generated by using a module definition diagram, the superconducting current limiting unit consists of a basal layer, a BSCCO-2212 superconducting strip, a metal connecting layer and a Cu-Ni shunt resistor, the low-temperature refrigerating system consists of liquid nitrogen and a liquid nitrogen storage tank, the high-voltage outlet unit consists of