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CN-121368119-B - Semiconductor structure and preparation method thereof

CN121368119BCN 121368119 BCN121368119 BCN 121368119BCN-121368119-B

Abstract

The embodiment of the disclosure provides a semiconductor structure and a preparation method thereof, wherein the semiconductor structure comprises a word line structure, a word line material layer, a functional layer and a dielectric layer, the word line structure is arranged on a substrate and extends along a first direction, the word line material layer and the functional layer are arranged along a second direction from bottom to top, the dielectric layer is arranged on one side of the word line material layer adjacent to the functional layer and extends along the first direction, the recess is recessed from top to bottom along the second direction, the side wall of the recess is surrounded by the word line material layer, the dielectric layer covers the surface of the recess and the top surface of the word line material layer, the functional layer covers the surface of the dielectric layer and is filled with the recess, the functional layer comprises a main body part and a protruding part, the main body part is arranged in the recess and covers the dielectric layer on the top of the word line material layer, the protruding part is smaller than the main body part in size, and the functional layer comprises conductive materials.

Inventors

  • LIU ZHIZHENG
  • LI ZONGHAN

Assignees

  • 长鑫芯瑞存储技术(北京)有限公司

Dates

Publication Date
20260508
Application Date
20251218

Claims (15)

  1. 1. A semiconductor structure, the semiconductor structure comprising: A substrate comprising at least one active region, the active region comprising a channel region and a doped region; A word line structure passing through at least the active region, the word line structure being located on the substrate and extending along a first direction, the channel region surrounding an outer sidewall of the word line structure, the doped region being located on both sides of the word line structure along a third direction, the word line structure including a word line material layer and a functional layer arranged from bottom to top along a second direction and a dielectric layer located between the word line material layer and the functional layer, the word line material layer being provided with a recess extending along the first direction adjacent to one side of the functional layer, the recess being surrounded by the word line material layer from top to bottom along the second direction, the dielectric layer covering a surface of the recess and a top surface of the word line material layer, the functional layer covering a surface of the dielectric layer and filling the recess, the functional layer including a body portion and a protrusion connected from top to bottom along the second direction, the protrusion being located in the body portion, the recess being located on a side of the word line material layer and the protrusion being located on a top of the body portion and the dielectric layer being small in size along the top of the body portion; wherein the word line material layer and the functional layer each include a conductive material, the first direction and the third direction are parallel to and intersect the surface of the substrate, and the second direction is parallel to the thickness direction of the substrate.
  2. 2. The semiconductor structure of claim 1, wherein the word line material layers comprise a first sub-word line material layer and a second sub-word line material layer from bottom to top in a second direction, the first sub-word line material layer and the second sub-word line material layer having different work functions.
  3. 3. The semiconductor structure of claim 2, wherein a material of the second sub-word line material layer is the same as a material of the functional layer, and a material of the first sub-word line material layer comprises titanium nitride.
  4. 4. The semiconductor structure of claim 2, wherein in the second direction, the height ratio of the first sub-word line material layer, the second sub-word line material layer, and the body portion ranges between (6-8): (4-5): (1-3), and/or In the second direction, the height ratio of the main body part and the protruding part ranges between (1-3): 1-2, and/or The thickness of the dielectric layer is 2.5-3.5nm, and/or The ratio of the width of the protrusion in the third direction to the height of the protrusion in the second direction ranges between 1 (0.5-1), and/or In the third direction, the ratio of the maximum width of the word line structure to the width of the protrusion ranges between (1.8-2.2): 1.
  5. 5. The semiconductor structure of any of claims 1-4, wherein a doping type of the doped region is one of P-type or N-type.
  6. 6. The semiconductor structure of claim 5, wherein the ratio of the work function of the functional layer to the work function of the channel region is 1 (0.95-1.05).
  7. 7. The semiconductor structure of claim 5, wherein the functional layer has a work function in a range of 3.7ev to 4.35ev when the doping type of the doped region is N-type, and in a range of 4.75ev to 5.45ev when the doping type of the doped region is P-type.
  8. 8. The semiconductor structure of claim 5, wherein said doped region comprises a first doped region and a second doped region from bottom to top along said second direction, wherein, The first doped region has a doping concentration lower than that of the second doped region, and/or, The ratio between the distance between the lower surface of the body portion and the lower surface of the first doped region and the height of the body portion ranges between (0-0.2): 1, and the ratio between the distance between the upper surface of the body portion and the upper surface of the first doped region and the height of the body portion ranges between (0-0.2): 1.
  9. 9. The semiconductor structure of claim 5, wherein the material of the word line material layer comprises at least titanium nitride when the doping type of the doped region is N-type, wherein, The material of the functional layer comprises N-type doped polysilicon, and/or, The material of the functional layer comprises doped titanium nitride and/or doped tungsten, the doping element in the doped titanium nitride comprises at least one of lanthanum, niobium and gallium, the doping element in the doped tungsten comprises at least one of lanthanum, niobium and gallium, and/or, The material of the functional layer comprises at least one of lanthanum, niobium and gallium, and/or, The functional layer comprises a first sub-layer and a second sub-layer, wherein the first sub-layer is positioned on the dielectric layer, covers the surface of the dielectric layer and comprises a part extending along the second direction along the third direction, the second sub-layer covers the surface of the first sub-layer and fills the space defined by the first sub-layer, the material of the first sub-layer comprises at least one of lanthanum, niobium, gallium, lanthanum oxide, niobium oxide and gallium oxide, and the material of the second sub-layer comprises titanium nitride.
  10. 10. The semiconductor structure of any of claims 1-4 and 6-9, wherein a material of the dielectric layer has a dielectric constant of no greater than 4.
  11. 11. The semiconductor structure of any one of claims 1-4 and 6-9, further comprising: A word line trench located on the substrate and extending in the first direction; a gate oxide layer covering the sidewall and bottom of the word line trench, the word line structure being located in a space defined by the gate oxide layer; and the capping layer covers the surface of the functional layer.
  12. 12. A method of fabricating a semiconductor structure, the method comprising: Providing a substrate; Forming a word line structure on the substrate, wherein a part of the substrate surrounding the outer side wall of the word line structure forms a channel region, the word line structure extends along a first direction and comprises a word line material layer and a functional layer which are arranged from bottom to top along a second direction, and a dielectric layer positioned between the word line material layer and the functional layer; a recessed portion extending along the first direction is arranged on one side, adjacent to the functional layer, of the word line material layer, the recessed portion is recessed from top to bottom along the second direction, and the side wall of the recessed portion is surrounded by the word line material layer; the dielectric layer covers the surface of the concave part and the top surface of the word line material layer, the functional layer covers the surface of the dielectric layer and fills the concave part, the functional layer comprises a main body part and a protruding part which are connected from top to bottom along the second direction, the protruding part is positioned in the concave part, the main body part is positioned on the protruding part and the dielectric layer covering the top of the word line material layer, and the size of the protruding part is smaller than that of the main body part along the third direction; Forming a doped region, wherein the channel region and the doped region form an active region, the word line structure at least penetrates through the active region, and the doped region is positioned at two sides of the word line structure along a third direction; wherein the word line material layer and the functional layer each include a conductive material, the first direction and the third direction are parallel to and intersect the surface of the substrate, and the second direction is parallel to the thickness direction of the substrate.
  13. 13. The method of manufacturing of claim 12, wherein forming the wordline structure comprises: etching the substrate to form a first word line trench extending in the first direction on the substrate; Forming a first sub-word line material layer filling a lower region of the first word line trench, defining a portion of the first word line trench not filled by the first sub-word line material layer as a second word line trench; forming an initial second sub-wordline material layer that fills a lower region of the second wordline trench; Removing a portion of the initial second sub-word line material layer to form a recess extending in a first direction, the recess being recessed from top to bottom in the second direction and sidewalls of the recess being surrounded by the initial second sub-word line material layer; forming a dielectric layer, wherein the dielectric layer covers the surface of the concave part and the top surface of the second sub word line material layer; and forming a functional layer, wherein the functional layer covers the surface of the dielectric layer and fills the concave part.
  14. 14. The method of manufacturing of claim 13, wherein prior to forming the first sub-wordline material layer, the method of manufacturing further comprises: Forming a gate oxide layer, wherein the gate oxide layer covers the side wall and the bottom of the first word line groove; after forming the functional layer, the preparation method further includes: And forming a cap layer, wherein the cap layer covers the surface of the functional layer.
  15. 15. The method of any one of claims 12-14, wherein forming the doped region comprises: Forming a doped region, wherein the doped region is positioned at two sides of the word line structure along the third direction, the doped region comprises a first doped region and a second doped region from bottom to top along the second direction, The first doped region has a doping concentration lower than that of the second doped region, and/or, The ratio between the distance between the lower surface of the body portion and the lower surface of the first doped region and the height of the body portion ranges between (0-0.2): 1, and the ratio between the distance between the upper surface of the body portion and the upper surface of the first doped region and the height of the body portion ranges between (0-0.2): 1.

Description

Semiconductor structure and preparation method thereof Technical Field The present disclosure relates to the field of semiconductor manufacturing, and more particularly, to a semiconductor structure and a method for fabricating the same. Background With the development and progress of technology, semiconductor devices are continually advancing toward miniaturization and high integration. The memory is an important semiconductor device that can be used as a data storage or storage program for operation of an electronic device for data processing. However, as the size and line width of the memory are further reduced, there are still many problems in the production process. Disclosure of Invention Embodiments of the present disclosure provide a semiconductor structure including: A substrate; The word line structure is positioned on the substrate and extends along a first direction, the word line structure comprises a word line material layer, a functional layer and a dielectric layer, the word line material layer and the functional layer are arranged from bottom to top along a second direction, the dielectric layer is positioned on one side of the word line material layer adjacent to the functional layer, a concave part is arranged on one side of the word line material layer adjacent to the functional layer, the concave part is concave from top to bottom along the second direction, the side wall of the concave part is surrounded by the word line material layer, the dielectric layer covers the surface of the concave part and the top surface of the word line material layer, the functional layer covers the surface of the dielectric layer and fills the concave part, the functional layer comprises a main body part and a protruding part, the main body part is positioned on the protruding part and the dielectric layer covering the top of the word line material layer, and the size of the protruding part is smaller than that of the main body part along the third direction; wherein the word line material layer and the functional layer each include a conductive material, the first direction and the third direction are parallel to and intersect the surface of the substrate, and the second direction is parallel to the thickness direction of the substrate. In some embodiments, the word line material layers include a first sub-word line material layer and a second sub-word line material layer from bottom to top in a second direction, the work functions of the first sub-word line material layer and the second sub-word line material layer being different. In some embodiments, the material of the second sub-word line material layer is the same as the material of the functional layer, and the material of the first sub-word line material layer includes titanium nitride. In some embodiments, the height ratio of the first sub-word line material layer, the second sub-word line material layer, and the body portion in the second direction ranges between (6-8): 4-5): 1-3, and/or In the second direction, the height ratio of the main body part and the protruding part ranges between (1-3): 1-2, and/or The thickness of the dielectric layer is 2.5-3.5nm, and/or The ratio of the width of the protrusion in the third direction to the height of the protrusion in the second direction ranges between 1 (0.5-1), and/or In the third direction, the ratio of the maximum width of the word line structure to the width of the protrusion ranges between (1.8-2.2): 1. In some embodiments, the substrate includes at least one active region through which the word line structure passes, the active region including a channel region surrounding an outer sidewall of the word line structure and a doped region located on both sides of the word line structure in the third direction, the doped region being one of P-type or N-type in doping type. In some embodiments, the ratio of the work function of the functional layer to the work function of the channel region is 1 (0.95-1.05). In some embodiments, when the doping type of the doping region is N-type, the work function of the functional layer ranges from 3.7ev to 4.35ev, and when the doping type of the doping region is P-type, the work function of the functional layer ranges from 4.75ev to 5.45 ev. In some embodiments, the doped regions include a first doped region and a second doped region from bottom to top along the second direction, wherein, The first doped region has a doping concentration lower than that of the second doped region, and/or, The ratio between the distance between the lower surface of the body portion and the lower surface of the first doped region and the height of the body portion ranges between (0-0.2): 1, and the ratio between the distance between the upper surface of the body portion and the upper surface of the first doped region and the height of the body portion ranges between (0-0.2): 1. In some embodiments, the material of the word line material layer includes at least titanium nitride wh