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CN-121399305-B - Resistor mask, plating device and plating method

CN121399305BCN 121399305 BCN121399305 BCN 121399305BCN-121399305-B

Abstract

The present invention appropriately shields the non-pattern area according to the arrangement pattern of the wafer on the substrate. A resistor mask for a resistor arranged between a substrate and an anode in a plating apparatus and having a cross-shaped pattern region formed by overlapping two quadrangles, the resistor mask comprising first to fourth mask pieces provided corresponding to corners of one of the two quadrangles; and a fifth mask piece and a sixth mask piece which are respectively arranged relative to a pair of protruding parts which extend outwards from each of two sides of the quadrilateral which are opposite to each other.

Inventors

  • Fukuda Zhenghui

Assignees

  • 株式会社荏原制作所

Dates

Publication Date
20260505
Application Date
20241213

Claims (11)

  1. 1. A resistor mask for a resistor disposed between a substrate and an anode in a plating apparatus and having a cross-shaped pattern region formed by overlapping two quadrangles, comprising: A first mask piece to a fourth mask piece which are arranged corresponding to each corner of one of the two quadrilaterals, and A fifth mask piece and a sixth mask piece respectively provided for a pair of protruding portions extending outward from each of two sides of the one quadrangle which are opposed to each other.
  2. 2. A resistor mask as claimed in claim 1, Each of the first to fourth mask pieces has a first inner side contour extending linearly in a first direction, and a second inner side contour extending linearly from one end of the first inner side contour in a second direction orthogonal to the first direction, a vertex at which the first inner side contour intersects the second inner side contour protrudes toward the inner side of the one quadrangle, The fifth mask piece and the sixth mask piece respectively have a fifth inner side contour and a sixth inner side contour which linearly extend along the first direction.
  3. 3. A resistor mask as claimed in claim 2, Each of the first to fourth mask pieces further has: a third inner contour having the other end of the first inner contour as one end and extending linearly along the second direction, and A fourth inner contour extending linearly in the first direction from the other end of the third inner contour.
  4. 4. A plating apparatus is characterized by comprising: A plating tank; an anode disposed in the plating tank so as to face a substrate holder for holding a substrate; A resistor disposed between the substrate holder and the anode in the plating tank and having a cross-shaped pattern area formed by overlapping two quadrangles, and A resistor mask according to any one of claims 1 to 3.
  5. 5. A plating apparatus as recited in claim 4, wherein, The resistor body has a first face on the substrate holder side and a second face on the anode side, The one quadrangular portion in the pattern region protrudes from the first face by a prescribed thickness in a thickness direction of the resistor, the pair of protruding portions protrudes from the second face by the prescribed thickness in the thickness direction of the resistor, and the cross-shaped pattern region has the same thickness throughout the entire region.
  6. 6. A plating apparatus as recited in claim 5, wherein, The first mask sheet to the fourth mask sheet are arranged with a gap in the thickness direction of the resistor body with respect to the one quadrangular portion, The fifth mask piece and the sixth mask piece are arranged with a gap in a thickness direction of the resistor body with respect to the pair of protruding portions and the first mask piece to the fourth mask piece at a height between the pair of protruding portions and the first mask piece to the fourth mask piece.
  7. 7. A plating apparatus as recited in claim 4, wherein, The first to sixth mask pieces are configured to be movable.
  8. 8. The plating apparatus according to claim 7, further comprising: A first actuator for moving the first to fourth mask pieces in at least one of the first and second directions for moving the first to fourth mask pieces independently or in part synchronously, respectively, and And a second actuator for moving the fifth mask sheet and the sixth mask sheet in the second direction, and for moving the fifth mask sheet and the sixth mask sheet independently or synchronously, respectively.
  9. 9. A plating apparatus as recited in claim 8, wherein, The wafer processing apparatus further includes a control device that drives the first actuator and the second actuator according to a layout pattern of the wafer on the substrate, and automatically adjusts the positions of the first to sixth mask pieces.
  10. 10. A plating apparatus as recited in claim 4, wherein, The first to sixth masking pieces are disposed on one of two opposite surfaces of the resistor, or are disposed so as to be dispersed on each of the two surfaces of the resistor.
  11. 11. A plating method, comprising the steps of: Preparing a resistor having a cross-shaped pattern region formed by overlapping two quadrangles, and a resistor mask including first to fourth mask pieces provided corresponding to corners of one of the two quadrangles, and fifth and sixth mask pieces provided for a pair of protruding portions extending outward from each of two opposite sides of the one quadrangle; adjusting the positions of the first to sixth mask pieces of the resistor mask according to the arrangement pattern of the wafer on the substrate, thereby adjusting the exposed area of the pattern area of the resistor, and The resistor and the adjusted resistor mask are used to plate the substrate.

Description

Resistor mask, plating device and plating method Technical Field The present application relates to a resistor mask for masking a resistor used in a plating apparatus, and a plating method. Background In recent years, wafers for AI and the like have been increased in size. When the size of the die (quadrangle) on the circular wafer becomes larger, the mounting of the die is reduced due to the influence of the circular arc portion of the wafer, and the die is arranged in a shape (cross shape) or quadrangle in which two quadrangles are overlapped. In such a wafer, electric fields tend to concentrate at the boundaries between the non-pattern region and the die (particularly, at the corners of the die), which are regions where there is no die, and when the wafer is plated, there is a concern that plating quality such as in-plane uniformity of a plated film on the wafer may be adversely affected. Patent document 1 Japanese patent application laid-open No. 2022-59581 Patent document 2 Japanese patent No. 7014553 As one of solutions to the above-described problems, the present inventors found that it is effective to shield the non-pattern region on the wafer from the electric field. An electric field shielding member for shielding an electric field in a plating apparatus is described in, for example, japanese patent application laid-open No. 2022-59561 (patent document 1) and japanese patent application laid-open No. 7014553 (patent document 2). Patent document 1 describes an example of an electromagnetic shielding plate disposed below or above a porous resistor in a plating bath. Patent document 2 describes an example of an anode mask that is disposed in the vicinity of an anode and shields a part of an electric field flowing from the anode to a substrate. In the electromagnetic shielding masks according to the related art including patent documents 1 and 2, the shielding region of the electric field shielding member is configured in accordance with the outer shape of the substrate such as a wafer, and thus the non-pattern region is not shielded according to the arrangement pattern of the chips on the wafer. In addition, when the outline of the arrangement pattern of the wafer has irregularities such as a cross shape, and such irregularities affect the plating quality, it is desirable to appropriately shield the non-pattern region with the electric field shielding member. Disclosure of Invention The present invention is directed to solving at least some of the problems described above. One of the objects of the present invention is to appropriately mask a non-pattern area according to a layout pattern of a wafer on a substrate. One of the objects of the present invention is to adjust the exposed area of the pattern area of the resistor according to the arrangement pattern and/or the non-pattern area of the wafer on the substrate. According to one aspect of the present invention, there is provided a resistor mask for a resistor having a cross-shaped pattern region formed by overlapping two quadrangles and arranged between a substrate and an anode in a plating apparatus, the resistor mask including first to fourth mask pieces provided corresponding to corners of one of the two quadrangles, and fifth and sixth mask pieces provided for a pair of protruding portions extending outward from each of two sides of the one quadrangle, the protruding portions being opposed to each other. Drawings Fig. 1 is a perspective view showing an overall structure of a plating apparatus according to an embodiment. Fig. 2 is a plan view showing an overall structure of a plating apparatus according to an embodiment. Fig. 3 is a schematic view of a plating module according to an embodiment. Fig. 4A is a plan view of a resistor according to an embodiment. Fig. 4B is a plan view illustrating the shape of the pattern region of the resistor. Fig. 4C is a plan view illustrating the shape of the pattern region of the resistor. Fig. 4D is a plan view illustrating the shape of the pattern region of the resistor. Fig. 4E is a plan view illustrating the shape of the pattern region of the resistor. Fig. 5 is a top view of a resistor mask according to an embodiment. Fig. 6A is an example of a masking pattern based on a resistor mask. Fig. 6B is an example of a masking pattern based on a resistor mask. Fig. 6C is an example of a masking pattern based on a resistor mask. Fig. 7 is a perspective view of a resistor according to an embodiment. Fig. 8 is a plan view showing an example of arrangement of each mask piece of the resistor mask. Fig. 9 is a perspective view showing an example of arrangement of each mask piece of the resistor mask. Fig. 10A is a cross-sectional view of the resistor and resistor mask taken along line X-X of fig. 9. Fig. 10B is a perspective view of the resistor and the resistor mask in a state of being cut along the X-X line in fig. 9. Fig. 10C is a perspective view from another angle of the resistor and the resistor mask in a sta