CN-121415844-B - Inline calibration method of memory test equipment

CN121415844BCN 121415844 BCN121415844 BCN 121415844BCN-121415844-B

Abstract

The invention relates to the technical field of memory calibration, in particular to an inline calibration method of memory test equipment, which comprises the following steps of defining a calibration object and a calibration triggering condition in a test program initialization stage, and establishing a calibration parameter table in a memory, wherein the calibration parameter table is used for storing the latest calibration value of each test parameter; the testing machine tests the memory devices according to the normal testing flow, monitors whether the calibration triggering conditions are met or not in real time in the idle gap or the specific node of the testing flow, if not, returns to continue to execute the normal testing flow, if yes, enters the calibration flow, automatically invokes the calibration subprogram to calibrate the testing program, and continues to execute the testing flow on the next memory devices or the next batch of memory devices by using the updated calibration parameters. The invention does not need to interrupt production, avoids long-time shutdown of the traditional offline calibration, and greatly improves the utilization rate and the production efficiency of the test equipment.

Inventors

Gao Ermeng
ZHANG YUE
YANG AIMIN
LU BO
ZHU CHAO

Assignees

悦芯科技股份有限公司

Dates

Publication Date: 20260508
Application Date: 20251230

Claims (7)

1. An inline calibration method for a memory test device, comprising the steps of: The method comprises the following steps of S1, configuring a calibration strategy, namely defining a calibration object and a calibration triggering condition in an initialization stage of a test program, and establishing a calibration parameter table in a memory, wherein the calibration parameter table is used for storing the latest calibration value of each test parameter; S2, executing a test flow, wherein the tester tests the memory device according to the normal test flow; s3, judging calibration triggering, namely monitoring whether the calibration triggering condition is met in real time in an idle gap or a specific node of the test flow, if not, returning to S2 to continue to execute the normal test flow, and if so, entering into S4 calibration flow; S4, performing the line calibration, namely automatically calling a calibration subprogram by a test program to calibrate; S5, seamlessly continuing the test, namely returning to S2 to continue to execute the test flow on the next or next batch of memory devices by utilizing the updated calibration parameters; in the step S4, the test program automatically invokes the calibration subroutine to perform the following operations: S4.1, switching the calibrated test channel from the state of connecting the memory device to the state of connecting the measuring unit in the tester through a switch matrix in the tester; S4.2, parameter measurement, namely controlling a signal generation unit of the tester to apply a target excitation signal to the channel, and simultaneously sampling and measuring an actual output signal of the channel through an internal measurement unit to obtain an actual measurement value of a measured parameter; s4.3, error calculation and compensation, namely comparing the actual measured value obtained in the step S4.2 with a preset target standard value, calculating an error value delta=actual value-target value, calculating a compensation value according to the error value, and updating and compensating the corresponding parameter configuration of the channel in real time; S4.4, updating a calibration parameter table, namely updating the calculated latest compensation value or the calibrated parameter value into the calibration parameter table; S4.5, channel recovery, namely, after calibration is completed, switching the test channel from the state of connecting the measuring unit back to the state of connecting the memory device.
2. The method according to claim 1, wherein the calibration object in the step S1 includes one or more of a power supply voltage Vdd, an input high level VIH, an input low level VIL, an Offset Error Offset, and a Gain Error Gain.
3. The method according to claim 1, wherein the calibration trigger condition in the step S1 includes one or more of a periodic trigger, a time trigger, a temperature change trigger, or a statistical trigger based on a test result, wherein the periodic trigger is a trigger after each test of N devices, the time trigger is a trigger at intervals of T, the temperature change trigger is a trigger when a test environment temperature change exceeds Δt, the statistical trigger based on a test result is a trigger when an abnormal test result continuously occurs, N is a preset number of tests, T is a preset interval time, and Δt is a preset temperature change value.
4. The method according to claim 1, wherein the specific node of the test procedure in the step S3 includes replacing the test Lot or Wafer.
5. The method according to claim 1, wherein after the target stimulus signal is applied in the step S4.2, the Offset compensation or the Offset plus Gain compensation is used to calculate the compensation related parameter, wherein: Setting the excitation signal as Vi1 and the actual measurement value as Vo1, and calculating to obtain an Offset error Offset through the formula Offset=Vo1-Vi1; Setting excitation signals as Vi1 and Vi2, setting corresponding practical measurement values as Vo1 and Vo2 respectively, calculating to obtain Gain through a formula gain= (Vo 2-Vo 1)/(Vi 2-Vi 1), and calculating to obtain Offset error through a formula offset=Vo1- (Vo 2-Vo 1)/(Vi 2-Vi 1) x Vi 1.
6. The line calibration method of a memory test device according to claim 2, wherein in the step S4.2 and the step S4.3, when calibrating a plurality of test parameters, each parameter is measured and compensated in sequence by using a time division multiplexing manner.
7. The method of claim 2, wherein the compensation factor is obtained by pre-calibration based on tester hardware characteristics and historical calibration data.

Description

Inline calibration method of memory test equipment Technical Field The invention relates to the technical field of memory calibration, in particular to an inline calibration method of memory test equipment. Background In mass production testing of semiconductor memories, a tester (Automated Test Equipment) needs to apply precise supply voltage, reference voltage, timing signal (e.g., clock period, setup/hold time), and input signal voltage (VIH/VIL) parameters to a memory Device (DUT). These test parameters may drift slightly over time due to thermal drift, aging of components within the tester, and changes in the test environment (e.g., temperature). If the processing is not performed, the drift can cause inaccurate test results, misjudgment (judging good products as defective products) or missed judgment (judging defective products as good products), and loss of yield and quality is caused. The conventional calibration method is usually "off-line calibration" (Offline Calibration), i.e., the tester is stopped periodically, and the parameters of the test channel are measured and calibrated by using a high-precision external instrument (such as a digital multimeter and an oscilloscope). However, in the prior art, the test is stopped, the needle card is turned up and down again, the test head is turned over, and the test head needs to be calibrated for more than 8 hours per stoppage, so that the equipment utilization rate and the production efficiency are reduced, and the internal state change (such as thermal drift and the like) of the test machine cannot be responded in real time. Therefore, there is a strong need for an online calibration method that can be performed seamlessly during testing without interrupting the testing process. Disclosure of Invention The invention aims to provide an inline calibration method of memory test equipment so as to solve the technical problems. The aim of the invention can be achieved by the following technical scheme: An inline calibration method of a memory test device, comprising the steps of: The method comprises the following steps of S1, configuring a calibration strategy, namely defining a calibration object and a calibration triggering condition in an initialization stage of a test program, and establishing a calibration parameter table in a memory, wherein the calibration parameter table is used for storing the latest calibration value of each test parameter; S2, executing a test flow, wherein the tester tests the memory device according to the normal test flow; s3, judging calibration triggering, namely monitoring whether the calibration triggering condition is met in real time in an idle gap or a specific node of the test flow, if not, returning to S2 to continue to execute the normal test flow, and if so, entering into S4 calibration flow; S4, performing the line calibration, namely automatically calling a calibration subprogram by a test program to calibrate; And S5, seamlessly continuing the test, namely returning to S2 to continue to execute the test flow on the next or next batch of memory devices by using the updated calibration parameters. In the step S4, the test program automatically calls the calibration subprogram to execute the following operations: S4.1, switching the calibrated test channel from the state of connecting the memory device to the state of connecting the measuring unit in the tester through a switch matrix in the tester; S4.2, parameter measurement, namely controlling a signal generation unit of the tester to apply a target excitation signal to the channel, and simultaneously sampling and measuring an actual output signal of the channel through an internal measurement unit to obtain an actual measurement value of a measured parameter; s4.3, error calculation and compensation, namely comparing the actual measured value obtained in the step S4.2 with a preset target standard value, calculating an error value delta=actual value-target value, calculating a compensation value according to the error value, and updating and compensating the corresponding parameter configuration of the channel in real time; S4.4, updating a calibration parameter table, namely updating the calculated latest compensation value or the calibrated parameter value into the calibration parameter table; S4.5, channel recovery, namely, after calibration is completed, switching the test channel from the state of connecting the measuring unit back to the state of connecting the memory device. As a further aspect of the present invention, the calibration object in the step S1 includes one or more of a power supply voltage Vdd, an input high level VIH, an input low level VIL, an Offset Error Offset, and a Gain Error. The method comprises the following steps of S1, wherein the calibration triggering conditions comprise one or more of periodic triggering, time triggering, temperature change triggering or statistical triggering based on test results, the periodic triggering