CN-121433968-B - Memory data reading error correction method and device based on logic operation

CN121433968BCN 121433968 BCN121433968 BCN 121433968BCN-121433968-B

Abstract

The application discloses a memory data reading error correction method and device based on logic operation, wherein the method comprises the steps of performing anomaly detection on each memory unit in a memory array to determine bit number and position information of data reading errors according to detection results, performing exclusive OR on all read data bits according to coding rules of an ECC encoder to obtain coding formulas corresponding to each bit in ECC values, extracting the coding formulas comprising error data bits from the coding formulas corresponding to each bit in ECC values according to the bit number and the position information of the data reading errors, establishing a linear equation set by adopting a pre-obtained correct ECC value and the extracted coding formulas comprising the error data bits to solve the equation set to obtain a correct value of the error bits, replacing the correct data to the corresponding position according to the position information to perform error correction, and therefore achieving arbitrary bit error correction and reducing the required ECC bits and memory array area.

Inventors

HUANG YONGHONG
SU WENJIE
HE YINI
LIU MEIDONG
HE HUIXIN

Assignees

厦门半导体工业技术研发有限公司

Dates

Publication Date: 20260505
Application Date: 20251230

Claims (4)

1. A memory data read error correction method based on logical operations, the method comprising: Performing anomaly detection on each storage unit in the storage array to determine the bit number and position information of the data reading error according to the detection result; exclusive or is carried out on all read data bits according to the coding rule of the ECC encoder so as to obtain a coding formula corresponding to each bit in the ECC value; Extracting a coding formula comprising error data bits from the coding formula corresponding to each bit in the ECC value according to the bit number and the position information of the data reading error; Establishing a linear equation set by adopting the pre-acquired correct ECC value and the extracted coding formula comprising the error data bits, so as to solve the equation set to obtain the correct value of the error bits; Replacing the correct value to a corresponding position according to the position information so as to correct the error; wherein, carry on the unusual detection to every memory cell in the memory array, including: detecting a cell current on each word line in the memory array using an error detection module; comparing the cell current on each word line with a preset reference current to judge whether the data read by the corresponding cell is abnormal or not; The correct ECC value is obtained by exclusive or according to the written correct data by adopting an encoding rule of an ECC encoder.
2. The method of claim 1, wherein the data of the correct data bits is maintained as the solving of the system of equations is performed.
3. A memory data read error correction apparatus based on a logical operation, comprising: The error detection module is used for carrying out abnormality detection on each storage unit in the storage array so as to determine the bit number and the position information of the data reading error according to the detection result; The error correction module is used for carrying out exclusive OR on all read data bits according to the coding rule of the ECC encoder to obtain a coding formula corresponding to each bit in an ECC value, extracting the coding formula comprising error data bits from the coding formula corresponding to each bit in the ECC value according to the bit number and the position information of the data reading error, establishing a linear equation set by adopting a correct ECC value obtained in advance and the extracted coding formula comprising error data bits so as to solve the equation set to obtain a correct value of the error bit, and replacing the correct value to a corresponding position according to the position information so as to carry out error correction; The error detection module is also used for detecting the unit current on each word line in the storage array by adopting the error detection module, and comparing the unit current on each word line with a preset reference current to judge whether the data read by the corresponding unit is abnormal or not; The correct ECC value is obtained by exclusive or according to the written correct data by adopting an encoding rule of an ECC encoder.
4. A memory data read error correction apparatus based on logical operations as claimed in claim 3, wherein the data of the correct data bits is maintained unchanged while solving the system of equations.

Description

Memory data reading error correction method and device based on logic operation Technical Field The application relates to the technical field of semiconductors, in particular to a memory data reading error correction method based on logic operation and a memory data reading error correction device based on logic operation. Background In the related art, memory data reading and error correction is generally realized based on an ECC algorithm, taking 32bit data as an example, 6bit ECC bits are required to be added for correcting 1bit error, 12bit ECC bits are required to be added for correcting 2bit error, 18bit ECC bits are required to be added for correcting 3bit error, wherein in a 2bit ECC scheme for correcting 32bit, although 12bit ECC bits are required to be added, at most 2bit error in 32bit data can be corrected, and when 3bit error occurs, error correction cannot be performed even if the position of the error is known. Disclosure of Invention The present application aims to solve at least to some extent one of the technical problems in the above-described technology. Therefore, an object of the present application is to provide a memory data reading error correction method based on logic operation, which uses the known ECC value to reversely push the correct value of the error bit based on the reverse push principle of the ECC encoding algorithm, thereby realizing arbitrary bit error correction and reducing the required ECC bit and memory array area. A second object of the present application is to provide a memory data reading error correction device based on logic operation. In order to achieve the above purpose, an embodiment of the present application provides a memory data reading error correction method based on logic operation, which includes the steps of performing anomaly detection on each memory cell in a memory array to determine a bit number and position information of a data reading error according to a detection result, performing exclusive or on all read data bits according to an encoding rule of an ECC encoder to obtain an encoding formula corresponding to each bit in an ECC value, extracting an encoding formula including an error data bit from the encoding formula corresponding to each bit in the ECC value according to the bit number and position information of the data reading error, establishing a linear equation set by adopting a pre-acquired correct ECC value and the extracted encoding formula including the error data bit to solve the equation set to obtain a correct value of the error bit, and replacing the correct data to a corresponding position according to the position information to perform error correction. The memory data reading error correction method based on the logical operation has the advantages that based on the reverse pushing principle of an ECC coding algorithm, the correct value of the error bit is reversely pushed by using the known ECC value, so that error correction of any bit is realized, and the required ECC bit and memory array area are reduced. In addition, the memory data reading error correction method based on logic operation according to the above embodiment of the present application may further have the following additional technical features: Optionally, the abnormality detection of each memory cell in the memory array includes detecting a cell current on each word line in the memory array by an error detection module, and comparing the cell current on each word line with a preset reference current to determine whether the data read by the corresponding cell is abnormal. Optionally, the data of the correct data bits is maintained as the solution of the system of equations is performed. Optionally, the correct ECC value is obtained by xoring the written correct data using an encoding rule of an ECC encoder. In order to achieve the above objective, a memory data reading and error correcting device based on logic operation according to a second aspect of the present application includes an error detecting module configured to perform anomaly detection on each memory cell in a memory array to determine a bit number and position information of a data reading error according to a detection result, an error correcting module configured to exclusive-or all read data bits according to an encoding rule of an ECC encoder to obtain an encoding formula corresponding to each bit in an ECC value, extract an encoding formula including an error data bit from the encoding formula corresponding to each bit in the ECC value according to the bit number and position information of the data reading error, and establish a linear equation set using a correct ECC value obtained in advance and the extracted encoding formula including the error data bit to solve the equation set to obtain a correct value of the error bit, and replace the correct data to a corresponding position according to the position information to perform error correction. In addition, the memory data