CN-121433987-B - Multi-BIOS start-up switching method, device, storage medium and computer program product

Abstract

The application discloses a multi-BIOS (basic input/output system) starting and switching method, equipment, a storage medium and a computer program product, which relate to the technical field of multi-BIOS storage chip starting and disclose the multi-BIOS starting and switching method, comprising the steps of obtaining a firmware degradation state vector of a main BIOS storage chip; when the start failure probability exceeds a preset threshold, the power-on starting target of the baseboard management controller is switched to a backup BIOS storage chip, so that the firmware degradation state vector obtained by the multi-BIOS starting switching method predicts the future start failure probability through the preset time sequence prediction model and is automatically switched to the backup BIOS storage chip when necessary, thereby effectively avoiding the start failure problem caused by the firmware degradation of the main BIOS storage chip and improving the stability and reliability of the system.

Inventors

• XU MAOWU

Assignees

• 四川华鲲振宇智能科技有限责任公司

Dates

Publication Date

20260508

Application Date

20251230

Claims (8)

1. 1. The multi-BIOS starting and switching method is characterized by comprising the following steps of: acquiring a firmware degradation state vector of a main BIOS memory chip; The baseboard management controller inputs the firmware degradation state vector to a preset time sequence prediction model so as to obtain the start failure probability in the future preset time length; when the start failure probability exceeds a preset threshold, switching a power-on start target of the baseboard management controller into a backup BIOS storage chip; The step of obtaining the firmware degradation state vector of the main BIOS storage chip comprises the following steps: the baseboard management controller collects a plurality of firmware health data; Performing data transformation and normalization processing on the firmware health data to perform weighted combination on the processed firmware health data to generate the firmware degradation state vector; The firmware degradation state vector comprises an ECC uncorrectable error rate component, a FLASH erasing frequency component, a firmware hash drift amount component, an average temperature component, a temperature standard deviation component, an SPI reading retry frequency component and a bit flip distribution mode component.
2. 2. The multi-BIOS boot switching method of claim 1 wherein the baseboard management controller inputting the firmware degradation state vector to a predetermined time sequence prediction model to obtain a boot failure probability within a predetermined time period in the future comprises the steps of: the baseboard management controller screens the firmware degradation state vector according to preset screening conditions; And if the preset time sequence prediction model is used for acquiring the firmware degradation state vector when the preset screening condition is met, so as to generate the start failure probability in the future preset time length.
3. 3. The multi-BIOS startup switching method of claim 1, wherein when the startup failure probability exceeds a preset threshold, the step of switching the power-on startup target of the baseboard management controller to a backup BIOS memory chip further comprises: If the starting time of the main BIOS storage chip exceeds the preset time, the baseboard management controller is switched to the backup BIOS storage chip; And performing fault analysis on the main BIOS storage chip to generate fault positioning data and an attribution analysis report so as to upload or repair the fault positioning data and the attribution analysis report.
4. 4. The multi-BIOS startup switch method of claim 3, wherein the step of performing failure analysis on the main BIOS memory chip comprises the steps of monitoring a status code sequence in the CPU startup process by the baseboard management controller, performing failure location on the main BIOS memory chip according to a preset structure mapping table to generate failure location data, and performing attribution analysis on the main BIOS memory chip according to a work log to generate attribution analysis report.
5. 5. The multi-BIOS startup switch method of claim 3, wherein said step of performing fault analysis on said main BIOS memory chip to generate fault location data and a report of attribution analysis to upload or repair said fault location data and said report of attribution analysis further comprises: Based on the fault location data and the attribution analysis report, the baseboard management controller executes differential repair of the main BIOS storage chip, and performs repair verification according to a simulated starting flow so as to generate verification data.
6. 6. A multi-BIOS boot switching device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the computer program being configured to implement the steps of the multi-BIOS boot switching method as claimed in any one of claims 1 to 5.
7. 7. A storage medium, characterized in that the storage medium is a computer readable storage medium, on which a computer program is stored, which computer program, when being executed by a processor, implements the steps of the multi-BIOS start-up switching method according to any one of claims 1 to 5.
8. 8. A computer program product, characterized in that it comprises a computer program which, when executed by a processor, implements the steps of the multi-BIOS start-up switching method of any one of claims 1 to 5.

Description

Multi-BIOS start-up switching method, device, storage medium and computer program product Technical Field The present application relates to the field of BIOS startup technologies, and in particular, to a method, an apparatus, a storage medium, and a computer program product for switching between multiple BIOS startup. Background In servers, workstations, and high availability computing devices, the Basic Input Output System (BIOS), which is the key firmware for hardware initialization and operating system loading, has reliability directly related to the startup stability and business continuity of the overall system. In order to improve the fault tolerance of the system, the industry generally adopts a dual-BIOS (or multi-BIOS) redundancy architecture, i.e. a main BIOS memory chip and a backup BIOS memory chip are configured, and when the main BIOS fails, the backup BIOS can be switched to maintain the normal start of the system, however, the multi-BIOS switching mechanism in the prior art generally has the defect of passive response. Typical schemes typically rely on real-time error detection during startup (e.g., SPI communication failure, checksum error, or CPU POST code exception) to trigger a switch, meaning that the system must first undergo a startup failure to activate the backup BIOS. Such "post-switch" strategies not only result in service interruption and extended recovery time, but may also cause cascading failures due to repeated attempts to damage the degraded main BIOS chip. Disclosure of Invention The application mainly aims to provide a multi-BIOS starting switching method, equipment, a storage medium and a computer program product, which aim to solve the technical problem that a server multi-BIOS system can only passively respond to switching. In order to achieve the above objective, the present application provides a multi-BIOS startup switching method, which includes: acquiring a firmware degradation state vector of a main BIOS memory chip; The baseboard management controller inputs the firmware degradation state vector to a preset time sequence prediction model so as to obtain the start failure probability in the future preset time length; And when the start failure probability exceeds a preset threshold, switching a power-on start target of the baseboard management controller into a backup BIOS storage chip. In one embodiment, the step of obtaining the firmware degradation state vector of the main BIOS memory chip includes: the baseboard management controller collects a plurality of firmware health data; And carrying out data transformation and normalization processing on the firmware health data to carry out weighted combination on the processed firmware health data to generate the firmware degradation state vector. In one embodiment, the firmware degradation state vector includes an ECC uncorrectable error rate component, a FLASH number of erasures component, a firmware hash drift amount component, an average temperature component, a temperature standard deviation component, an SPI read retry number component, and a bit flip distribution pattern component. In one embodiment, the baseboard management controller inputs the firmware degradation state vector to a predetermined time sequence prediction model to obtain a start failure probability within a predetermined time period in the future, and the method comprises the following steps: the baseboard management controller screens the firmware degradation state vector according to preset screening conditions; And if the preset time sequence prediction model is used for acquiring the firmware degradation state vector when the preset screening condition is met, so as to generate the start failure probability in the future preset time length. In an embodiment, when the boot failure probability exceeds a preset threshold, the step of switching the power-on boot target of the baseboard management controller to a backup BIOS memory chip further includes: If the starting time of the main BIOS storage chip exceeds the preset time, the baseboard management controller is switched to the backup BIOS storage chip; And performing fault analysis on the main BIOS storage chip to generate fault positioning data and an attribution analysis report so as to upload or repair the fault positioning data and the attribution analysis report. In one embodiment, the step of performing fault analysis on the main BIOS storage chip includes the steps that the baseboard management controller monitors a state code sequence in a starting process of the central processing unit, performs fault positioning on the main BIOS storage chip according to a preset structure mapping table to generate fault positioning data, and performs attribution analysis on the main BIOS storage chip according to a working log to generate attribution analysis reports. In an embodiment, the step of uploading or repairing the fault location data and the attribution analysis report by performin