CN-121461958-B - Multi-grid distributed driving structure of GaN chip and switching circuit unit

Abstract

The invention discloses a multi-gate distributed driving structure of a GaN chip and a switching circuit unit. The multi-gate distributed driving structure of the GaN chip comprises a GaN HEMT module and a driving module connected with the GaN HEMT module, wherein the GaN HEMT module is provided with a plurality of gates, the gates are distributed at intervals along a direction parallel to the surface of the GaN HEMT module, and each gate is respectively and electrically connected with the driving module. The near end and the far end of the GaN HEMT module can receive driving signals simultaneously through the multiple grid electrodes, so that transmission delay is effectively reduced, the switching speed of the chip is remarkably improved, and switching loss is reduced.

Inventors

• CAI ZHONGHUA
• MO HAIFENG

Assignees

• 苏州明义微电子技术有限公司

Dates

Publication Date

20260512

Application Date

20251226

Claims (7)

1. 1. The multi-grid distributed driving structure of the GaN chip comprises a GaN HEMT module and a driving module connected with the GaN HEMT module, and is characterized in that the GaN HEMT module is provided with a plurality of grids, the grids are distributed at intervals along the direction parallel to the surface of the GaN HEMT module, and each grid is respectively and electrically connected with the driving module; The multi-grid distributed driving structure comprises a grid array, wherein the grid array comprises a plurality of grid bars and grid buses which are mutually arranged at intervals, the grid bars are mutually connected in parallel through the grid buses and form a compact net structure which entirely covers the surface of the GaN HEMT module; The grid electrodes comprise a first grid electrode and a second grid electrode, wherein the first grid electrode and the second grid electrode are led out from the middle position of the grid array and are arranged in a bilateral symmetry mode; The first grid electrode and the second grid electrode are connected with the grid bars through two layers of metal interconnection, and through holes are formed between each layer of metal; the GaN HEMT module and the driving module are arranged in a stacked mode.
2. 2. The multi-gate distributed drive structure of claim 1, comprising a plurality of the drive modules, each of the drive modules being electrically connected to a respective one of the gates.
3. 3. The multi-gate distributed drive structure of a GaN chip of claim 2, wherein at least two of said gates are electrically connected to the same drive module.
4. 4. The multi-gate distributed drive structure of claim 2, comprising a plurality of the GaN HEMT modules, each of the GaN HEMT modules being electrically connected to at least one drive module.
5. 5. The multi-gate distributed drive structure of any of claims 1-4, wherein the GaN HEMT modules and the drive modules are arranged in parallel on a working plane.
6. 6. The multi-gate distributed drive structure of the GaN chip of claim 1, wherein the GaN HEMT module is integrated within the same chip as the drive module and/or the drive module employs HEMT devices.
7. 7. A switching circuit unit comprising the GaN chip multi-gate distributed drive structure of any one of claims 1-6.

Description

Multi-grid distributed driving structure of GaN chip and switching circuit unit Technical Field The invention relates to the technical field of GaN chips, in particular to a multi-gate distributed driving structure and a switching circuit unit of a GaN chip. Background The GaN chip has a fast switching characteristic and is widely applied to high-speed scenes with the frequency of up to 500KHz and even more than 1 MHz. In these high-speed application scenarios, the passive devices can be sized smaller, which helps to reduce the overall system volume, while also effectively reducing costs. However, for GaN chips in high-speed applications, the need for driving capability is very high, which means that the driving circuit must be able to control the turning on and off of the GaN chip quickly and accurately. However, most of the existing GaN chips refer to the low-frequency application architecture of the conventional silicon device, and only simple replacement applications are performed, and no special design optimization is performed for high-frequency applications. Although meeting some basic application requirements to some extent, the high-speed performance advantages of GaN materials are not fully utilized. Specifically, the GaN chip currently marketed has an external interface mainly of a gate electrode. For those GaN chips with small resistance, the different positions of the gate arrays relative to the gate electrode result in different propagation delays for each gate array due to the difference in parasitic inductance of the trace. In particular, the parasitic inductance of the nH level exists for the far-end gate array relative to the gate electrode, which results in different turn-on speeds for the near-end and far-end gate arrays. In addition, the loop current of mutual crosstalk can appear between the source and the drain in different areas, so that the switching speed is further reduced, and the switching efficiency is affected. Disclosure of Invention The invention mainly aims to provide a multi-gate distributed driving structure and a switching circuit unit of a GaN chip, thereby overcoming the defects in the prior art. In order to achieve the aim of the invention, the invention adopts the following technical scheme. The first aspect of the invention provides a multi-gate distributed driving structure of a GaN chip, which comprises a GaN HEMT module and a driving module connected with the GaN HEMT module, wherein the GaN HEMT module is provided with a plurality of gates, the gates are distributed at intervals along a direction parallel to the surface of the GaN HEMT module, and each gate is respectively and electrically connected with the driving module. In some more specific aspects, the multi-gate distributed driving structure of the GaN chip further includes a gate bus, and the gates are arranged in parallel through the gate bus. Further, the multi-grid distributed driving structure comprises a grid array, wherein the grid array comprises a plurality of grid bars and grid buses which are arranged at intervals, and the grid bars are connected in parallel through the grid buses and form a compact net structure which covers the surface of the GaN HEMT module. Illustratively, the plurality of gates includes a first gate and a second gate that are drawn from a middle position of the gate array and maintain a bilateral symmetry layout. In some more specific aspects, the multi-gate distributed driving structure includes a plurality of driving modules, each of which is electrically connected to a corresponding gate. Further, at least two of the gates are electrically connected to the same driving module. Further, the multi-gate distributed driving structure comprises a plurality of GaN HEMT modules, and each GaN HEMT module is electrically connected with at least one driving module. In some more specific embodiments, the GaN HEMT module and the driving module are disposed in parallel on a working plane. In some more specific aspects, the GaN HEMT module is stacked with a driver module. In some more specific schemes, the GaN HEMT module and the driving module are integrated in the same chip, and the driving module adopts HEMT devices. The second aspect of the invention provides a switching circuit unit, which comprises the multi-gate distributed driving structure of the GaN chip. Compared with the prior art, the invention has the advantages that at least: The GaN chip is characterized in that a plurality of grids are designed for a GaN HEMT module, and independent driving is configured for each grid. The distributed driving mode shortens the wiring length between the far end of the GaN HEMT module and the grid electrode, and remarkably reduces the parasitic inductance from the grid electrode to the grid electrode at the far end, thereby bringing positive influence to the performance of the chip. Specifically, each drive is responsible for driving a portion of the GaN HEMT module, rather than a sing