CN-121461995-B - Input driving circuit of high-speed analog-to-digital converter with overvoltage protection

CN121461995BCN 121461995 BCN121461995 BCN 121461995BCN-121461995-B

Abstract

The invention provides an input driving circuit of a high-speed analog-to-digital converter with overvoltage protection, which relates to the technical field of analog-to-digital converter driving circuits and comprises a power-on overvoltage protection circuit, a voltage boosting circuit and a voltage buffer main loop, wherein the voltage buffer main loop is used for improving the broadband signal performance of the analog-to-digital converter, the power-on overvoltage protection circuit is connected to a plurality of nodes of the voltage buffer main loop and is used for realizing the power-on overvoltage protection and the power-off overvoltage protection of a voltage buffer, the voltage boosting circuit is connected to an input signal end of the voltage buffer main loop and is used for enabling the grid voltage of a MOSFET (metal oxide semiconductor field effect transistor) in the voltage buffer main loop to follow an input signal, a clock is not arranged at the voltage boosting circuit, and the power-on and the power-off of the power-on overvoltage protection circuit and the nodes of the voltage buffer main loop are carried out according to time sequence so as to ensure that the voltage born by the voltage buffer main loop does not exceed a tolerance voltage. The invention can keep low power consumption on the premise of improving performance and simultaneously provides complete over-voltage protection function for power on and power off.

Inventors

FENG YAO
LIANG CHAO
HU BIAO
LI HAOYI

Assignees

铭科思(上海)微电子技术有限责任公司

Dates

Publication Date: 20260505
Application Date: 20251110

Claims (5)

1. The input driving circuit of the high-speed analog-to-digital converter with the overvoltage protection is characterized by comprising a power-on overvoltage protection circuit, a boost circuit and a voltage buffer main loop; The voltage buffer main loop is used for improving the broadband signal performance of the analog-to-digital converter; The power-on overvoltage protection circuit is connected to a plurality of nodes of the voltage buffer main loop and is used for realizing power-on overvoltage protection and power-off overvoltage protection for the voltage buffer; The voltage boosting circuit is connected to an input signal end of the voltage buffer main loop and is used for enabling the grid voltage of the MOSFET in the voltage buffer main loop to follow an input signal, and a clock is not arranged at the voltage boosting circuit; Powering up and powering down a plurality of nodes of the power-up overvoltage protection circuit and the voltage buffer main circuit according to a time sequence so as to ensure that the voltage born by the voltage buffer main circuit does not exceed the tolerance voltage; the voltage buffer main loop comprises a plurality of MOSFET tubes; The source electrode of the second MOSFET is connected to the power-on overvoltage protection circuit, the drain electrode of the second MOSFET is connected to the drain electrode of the third MOSFET, and the grid electrode of the second MOSFET is connected to the power-on overvoltage protection circuit; the source electrode of the third MOSFET is connected with the drain electrode of the fourth MOSFET and is an output signal end, and the grid electrode of the third MOSFET is an input signal end; The source electrode of the fourth MOSFET is connected with the drain electrode of the fifth MOSFET, and the grid electrode of the fourth MOSFET is connected with the power-on overvoltage protection circuit and is connected with a first power supply through a first current source; The grid electrode of the fifth MOSFET is connected to the power-on overvoltage protection circuit, and the source electrode of the fifth MOSFET is grounded; the power-on overvoltage protection circuit comprises a plurality of MOSFET tubes; the source electrode of the first MOSFET is connected with a first power supply, and the drain electrode of the first MOSFET is connected with the source electrode of the second MOSFET; The grid electrode of the second MOSFET is connected with the drain electrode of the sixth MOSFET, the source electrode of the sixth MOSFET is connected with the second bias voltage node, and the grid electrode of the sixth MOSFET is connected with the grid electrode of the ninth MOSFET; The drain electrode of the seventh MOSFET is connected with the common mode voltage, the source electrode of the seventh MOSFET is connected with the first end of the second resistor, the second end of the second resistor is connected with the grid electrode of the third MOSFET and the first end of the second capacitor, and the second end of the second capacitor is connected with the grid electrode of the twelfth MOSFET; The source electrode of the eighth MOSFET is connected with the drain electrode of the second MOSFET, and the drain electrode of the eighth MOSFET is connected with a second bias voltage node; a source electrode of the ninth MOSFET is connected with a source electrode of the third MOSFET, a grid electrode of the ninth MOSFET is connected with a grid electrode of the eighth MOSFET, and a drain electrode of the ninth MOSFET is connected with a second bias voltage node; The drain electrode of the tenth MOSFET is connected with the grid electrode of the fourth MOSFET, and the source electrode of the tenth MOSFET is connected with a second power supply; the source electrode of the eleventh MOSFET is connected with the source electrode of the fourth MOSFET, and the drain electrode of the eleventh MOSFET is connected with the fourth bias voltage node; the drain electrode of the twelfth MOSFET is connected with the grid electrode of the fourth MOSFET, the source electrode of the twelfth MOSFET is grounded, and the grid electrode of the twelfth MOSFET is connected with the source electrode of the fourth MOSFET; the source electrode of the thirteenth MOSFET and the drain electrode of the fifteenth MOSFET are connected with the grid electrode of the fifth MOSFET, the drain electrode of the thirteenth MOSFET is connected with the grid electrode and the drain electrode of the fourteenth MOSFET, the source electrode of the fourteenth MOSFET and the source electrode of the fifteenth MOSFET are grounded, the grid electrode of the fifteenth MOSFET is connected with the grid electrode of the eighth MOSFET, and the drain electrode of the fourteenth MOSFET is connected with the grid electrode of the fourteenth MOSFET and is connected with the first power supply through the second current source; When a plurality of nodes are powered on and powered off according to a time sequence, the nodes comprise a grid electrode of the eighth MOSFET, a grid electrode of the thirteenth MOSFET, a grid electrode of the first MOSFET and a grid electrode of the eleventh MOSFET, and are sequentially marked as a first power-on and power-off node, a second power-on and power-off node, a third power-on and power-off node and a fourth power-on and power-off node; the method for powering up and powering down the plurality of nodes according to the time sequence comprises the following steps: the first power-on and power-off nodes alternately perform power-on and power-off according to a period T, and the third power-on and power-off nodes alternately perform power-on and power-off according to the period T relative to the delay time T of the first power-on and power-off nodes; the second power-on and power-off nodes alternately perform power-on and power-off according to a period T, and the fourth power-on and power-off nodes alternately perform power-on and power-off according to the period T relative to the delay time T of the second power-on and power-off nodes; the power-on and power-off actions of the first power-on and power-off node and the second power-on and power-off node are opposite.
2. The input drive circuit of a high-speed analog-to-digital converter with over-voltage protection according to claim 1, wherein in the main loop of the voltage buffer, the second MOSFET is PMOS, and the other MOSFETs are NMOS.
3. The input drive circuit of a high-speed analog-to-digital converter with over-voltage protection according to claim 1, wherein in said power-up over-voltage protection circuit, said first MOSFET is PMOS, and the other MOSFETs are NMOS.
4. The input drive circuit of a high-speed analog-to-digital converter with over-voltage protection according to claim 1, wherein the voltage of the first power supply is greater than the voltage of the second power supply, and the voltage of the second power supply is the withstand voltage limit of the MOSFET in the main loop of the voltage buffer.
5. The high-speed analog-to-digital converter input drive circuit with over-voltage protection according to claim 1, wherein the boost circuit comprises a first resistor and a first capacitor; The first end of the first resistor is connected with the first bias voltage node, the second end of the first resistor is connected with the first end of the first capacitor and the grid electrode of the second MOSFET, and the second end of the first capacitor is connected with the grid electrode of the third MOSFET.

Description

Input driving circuit of high-speed analog-to-digital converter with overvoltage protection Technical Field The invention relates to the technical field of analog-to-digital converter driving circuits, in particular to a high-speed analog-to-digital converter input driving circuit with overvoltage protection. Background An analog-to-digital converter (ADC) is a component that converts an analog input signal into a digital output signal in electronic applications for further digital signal processing or storage. Analog-to-digital converters are widely used in communication systems, transmitter systems, and receiver systems. Various application scenarios have different requirements for performance, power consumption, cost and size. With the development of electronic technology, the bandwidths of the radar, communication and other systems are continuously increased, the signal bandwidths are continuously increased, the modulation mode is also complicated, and the speed and the precision of the analog-to-digital converter are both required to be higher. The input driving circuit is used as an important component of the analog-to-digital converter and is a precondition for guaranteeing the broadband signal performance of the analog-to-digital converter. The performance of the input drive circuit directly determines the upper performance limit of the analog-to-digital converter. Besides the secondary, the input driving circuit also provides isolation for the analog-to-digital converter from external circuits, avoiding parasitic induced by packaging and the like, and generating oscillation in sampling. The prior art generally reduces nonlinear distortion caused by channel modulation effect and substrate bias effect by improving gm, but SFDR is rapidly degraded under high frequency input signal, and if the prior art is to counteract the effect, the complexity of the system is increased, meanwhile, the signal swing space is consumed, and the prior art is not suitable for an analog-to-digital converter with large input swing. In addition, the problem that the over-voltage power consumption electric element is easy to be damaged exists. Therefore, it is needed to optimize the input driving circuit to achieve low power consumption while providing complete over-voltage protection. Disclosure of Invention The invention aims to provide a high-speed analog-to-digital converter input driving circuit with overvoltage protection, which can keep low power consumption on the premise of improving performance and simultaneously provide complete power-on and power-off overvoltage protection functions. The invention is realized by the following technical scheme: An input driving circuit of a high-speed analog-to-digital converter with overvoltage protection comprises a power-on overvoltage protection circuit, a booster circuit and a voltage buffer main loop; The voltage buffer main loop is used for improving the broadband signal performance of the analog-to-digital converter; The power-on overvoltage protection circuit is connected to a plurality of nodes of the voltage buffer main loop and is used for realizing power-on overvoltage protection and power-off overvoltage protection for the voltage buffer; The voltage boosting circuit is connected to an input signal end of the voltage buffer main loop and is used for enabling the grid voltage of the MOSFET in the voltage buffer main loop to follow an input signal, and a clock is not arranged at the voltage boosting circuit; And powering up and powering down a plurality of nodes of the power-up overvoltage protection circuit and the voltage buffer main loop according to a time sequence so as to ensure that the voltage born by the voltage buffer main loop does not exceed the tolerance voltage. Preferably, the voltage buffer main loop comprises a plurality of MOSFET tubes; The source electrode of the second MOSFET is connected to the power-on overvoltage protection circuit, the drain electrode of the second MOSFET is connected to the drain electrode of the third MOSFET, and the grid electrode of the second MOSFET is connected to the power-on overvoltage protection circuit; the source electrode of the third MOSFET is connected with the drain electrode of the fourth MOSFET and is an output signal end, and the grid electrode of the third MOSFET is an input signal end; The source electrode of the fourth MOSFET is connected with the drain electrode of the fifth MOSFET, and the grid electrode of the fourth MOSFET is connected with the power-on overvoltage protection circuit and is connected with a first power supply through a first current source; And the grid electrode of the fifth MOSFET is connected to the power-on overvoltage protection circuit, and the source electrode of the fifth MOSFET is grounded. Preferably, in the main circuit of the voltage buffer, the second MOSFET is PMOS, and the other MOSFET is NMOS. Preferably, the power-on overvoltage protection circuit comprises a plurality