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CN-121485498-B - Low-voltage-drop rectifier bridge circuit with wide voltage input range

CN121485498BCN 121485498 BCN121485498 BCN 121485498BCN-121485498-B

Abstract

The invention provides a low-voltage-drop rectifier bridge circuit with a wide voltage input range, which comprises a diode rectifier circuit, a low-voltage-drop auxiliary structure and other load circuits, wherein the input end of the diode rectifier circuit is connected with an alternating current input signal, the output end of the diode rectifier circuit outputs a positive power rail and a reference ground after rectification, the input end of the low-voltage-drop auxiliary structure is connected with the input end of the diode rectifier circuit in parallel to the alternating current input signal, the output end of the low-voltage-drop auxiliary structure is connected with the positive power rail and the reference ground, the control signal input end of the low-voltage-drop auxiliary structure receives a high-side control signal and a low-side control signal, and the input ends of the other load circuits are connected with the output ends of the diode rectifier circuit and the low-voltage-drop auxiliary structure, and the output ends of the low-voltage-drop auxiliary structure output the high-side control signal and the low-side control signal to the control signal input end of the low-voltage-drop auxiliary structure. The invention clamps the alternating current signal with wide voltage input range to the low voltage domain by using the high-voltage MOS, and gates the corresponding side channel by using the cross-coupled circuit structure, thereby reducing the forward voltage drop when the diode is conducted.

Inventors

  • YANG YANG
  • ZHENG HONGYI
  • ZHU ZHIMING
  • JIN BAOQUAN

Assignees

  • 上海芯跳科技有限公司

Dates

Publication Date
20260508
Application Date
20260109

Claims (7)

  1. 1. The low-voltage-drop rectifier bridge circuit with the wide voltage input range is characterized by comprising a diode rectifier circuit, a low-voltage-drop auxiliary structure and other load circuits; The input end of the diode rectifying circuit is connected with an alternating current input signal, and the output end of the diode rectifying circuit outputs a positive power rail and a reference ground after rectification; The input end of the low-voltage drop auxiliary structure and the input end of the diode rectifying circuit are connected to the alternating current input signal in parallel, the output end of the low-voltage drop auxiliary structure is connected to the positive power rail and the reference ground, and the control signal input end of the low-voltage drop auxiliary structure receives a high-side control signal and a low-side control signal; the input ends of the other load circuits are connected to the output ends of the diode rectifying circuit and the low-voltage drop auxiliary structure, and the output ends of the other load circuits output the high-side control signals and the low-side control signals to the control signal input ends of the low-voltage drop auxiliary structure; the diode rectifying circuit comprises a first diode, a second diode, a third diode and a fourth diode; The anodes of the first diode and the second diode are connected to the reference ground, and the cathodes are respectively connected to a first input end and a second input end of an alternating current input signal; The anodes of the third diode and the fourth diode are respectively connected to the first input end and the second input end of the alternating current input signal, and the cathodes of the third diode and the fourth diode are both connected to the positive power supply rail; The low-voltage drop auxiliary structure comprises a lower half-bridge voltage drop reducing circuit and an upper half-bridge voltage drop reducing circuit; The lower half-bridge voltage drop reducing circuit comprises a first high-voltage NMOS, a second high-voltage NMOS, a third high-voltage NMOS, a fourth high-voltage NMOS, a first resistor and a second resistor; the gate end of the first high-voltage NMOS is connected to one end of the first resistor, the drain end of the first high-voltage NMOS is connected to one end of the second resistor, and the source end of the first high-voltage NMOS is connected to the reference ground; the gate end of the second high-voltage NMOS is connected to the other end of the second resistor, the drain end of the second high-voltage NMOS is connected to the other end of the first resistor, and the source end of the second high-voltage NMOS is connected to the reference ground; the gate end of the third high-voltage NMOS is connected to the low-side control signal end, the drain end is connected to the first input end of the alternating current input signal, and the source end is connected to the drain end of the first high-voltage NMOS; the gate end of the fourth high-voltage NMOS is connected to the low-side control signal end, the drain end is connected to the second input end of the alternating current input signal, and the source end is connected to the drain end of the second high-voltage NMOS; the upper half-bridge voltage drop reducing circuit comprises a first high-voltage PMOS, a second high-voltage PMOS, a third high-voltage PMOS, a fourth high-voltage PMOS, a third resistor and a fourth resistor; the grid end of the first high-voltage PMOS is connected to one end of the third resistor, the drain end of the first high-voltage PMOS is connected to one end of the fourth resistor, and the source end of the first high-voltage PMOS is connected to the positive power supply rail; the grid end of the second high-voltage PMOS is connected to the other end of the fourth resistor, the drain end of the second high-voltage PMOS is connected to the other end of the third resistor, and the source end of the second high-voltage PMOS is connected to the positive power supply rail; The gate end of the third high-voltage PMOS is connected to the high-side control signal end, the drain end of the third high-voltage PMOS is connected to the first input end of the alternating current input signal, and the source end of the third high-voltage PMOS is connected to the drain end of the first high-voltage PMOS; The gate end of the fourth high-voltage PMOS is connected to the high-side control signal end, the drain end of the fourth high-voltage PMOS is connected to the second input end of the alternating current input signal, and the source end of the fourth high-voltage PMOS is connected to the drain end of the second high-voltage PMOS; The other load circuits comprise a voltage stabilizing capacitor and a load circuit; the positive plate of the voltage stabilizing capacitor is connected to the positive power rail, and the negative plate of the voltage stabilizing capacitor is connected to the reference ground; The input end of the load circuit is connected to the positive power rail and the reference ground, and the output end of the load circuit outputs the high-side control signal and the low-side control signal.
  2. 2. The wide voltage input range low dropout rectifier bridge circuit according to claim 1, wherein said low side control signal is a voltage based on said reference ground, said high side control signal is a voltage based on said positive power rail, said low side control signal is a low voltage power domain voltage, and said high side control signal is a voltage of said positive power rail minus a low voltage power domain voltage.
  3. 3. The wide voltage input range low voltage drop rectifier bridge circuit of claim 1, wherein upon system power up, said diode rectifier circuit first operates to produce an initial positive power rail and said reference ground, said other load circuits operate and produce said high side control signal and said low side control signal based on said initial positive power rail and reference ground, and subsequently said low voltage drop auxiliary structure begins operating based on said high side control signal and said low side control signal.
  4. 4. The wide voltage input range low dropout rectifier bridge circuit according to claim 1, wherein when the ac input signal is a first input voltage that is higher than a second input voltage: In the lower half-bridge voltage drop reducing circuit, the difference between the low-side control signal and the voltage of the second input end is larger than the threshold voltage of the fourth high-voltage NMOS, so that the fourth high-voltage NMOS channel is conducted, the grid voltage of the first high-voltage NMOS is pulled down to be closed, the grid voltage of the second high-voltage NMOS is clamped by the grid of the third high-voltage NMOS, the grid of the second high-voltage NMOS is high-level, so that the channel of the second high-voltage NMOS is conducted, and the reference ground is communicated with the second high-voltage NMOS and the fourth high-voltage NMOS which are conducted through the conducted second high-voltage NMOS; In the upper half-bridge voltage drop reduction circuit, the difference between the first input end voltage and the high-side control signal is larger than the threshold voltage of the third high-voltage PMOS, the third high-voltage PMOS channel is conducted, the grid voltage of the second high-voltage PMOS is pulled up to be turned off, the grid voltage of the first high-voltage PMOS is clamped by the grid of the fourth high-voltage PMOS, the first high-voltage PMOS channel is conducted, and therefore the positive power supply rail is communicated with the first high-voltage PMOS and the third high-voltage PMOS through conduction.
  5. 5. The wide voltage input range low dropout rectifier bridge circuit according to claim 4, wherein a gate of said third high voltage NMOS is connected to said low side control signal with a source potential following a gate potential and being clamped at most to a level of said low side control signal, and a gate of said fourth high voltage PMOS is connected to said high side control signal with a source potential following a gate potential and being clamped at least to a level of said high side control signal.
  6. 6. The wide voltage input range low dropout rectifier bridge circuit according to claim 4, wherein, when said low dropout auxiliary structure is operated, said positive power rail voltage is: The voltage of the reference ground is: Where I is the total current of the whole chip, 、 、 、 The on-resistances of the first high-voltage PMOS, the third high-voltage PMOS, the second high-voltage NMOS and the fourth high-voltage NMOS are respectively, And The voltages at the first input and the second input of the ac input signal, respectively.
  7. 7. The wide voltage input range low voltage drop rectifier bridge circuit of claim 6 wherein for low power applications the on-resistances of the first high voltage PMOS, third high voltage PMOS, second high voltage NMOS and fourth high voltage NMOS are configured such that when the total current I is a low power level current, the voltage drop across the low voltage drop auxiliary structure is reduced by the forward on-voltage drop of the diode.

Description

Low-voltage-drop rectifier bridge circuit with wide voltage input range Technical Field The invention relates to the technical field of low-voltage-drop rectifier bridge circuits, in particular to a low-voltage-drop rectifier bridge circuit with a wide voltage input range. Background The traditional diode rectifier bridge in the prior art has larger voltage drop, limits the lowest voltage of an input signal, and is not suitable for application scenes with low power consumption. The full MOS active rectifier bridge needs an additional independent power supply and a drive control circuit, is complex in system and high in cost, is not suitable for an application scene of a single power supply, and is difficult to integrate on-chip. However, other existing semi-active rectification schemes with mixed diodes and MOS are difficult to cope with the requirement of wide voltage input range. Patent application CN222506449U discloses a converter protection circuit for input open-phase and relay actuation detection, including relay actuation detection circuit, input open-phase detection circuit and signal synthesis circuit, signal synthesis circuit includes the NAND gate, the input of NAND gate A with relay actuation detection circuit is connected, the input of NAND gate B with input open-phase detection circuit is connected, the output of NAND gate Y is connected with the controller. However, the present patent cannot completely solve the existing technical problems, and cannot meet the needs of the present invention. Disclosure of Invention In view of the drawbacks of the prior art, an object of the present invention is to provide a low voltage drop rectifier bridge circuit with a wide voltage input range. The low-voltage-drop rectifier bridge circuit with the wide voltage input range comprises a diode rectifier circuit, a low-voltage-drop auxiliary structure and other load circuits; The input end of the diode rectifying circuit is connected with an alternating current input signal, and the output end of the diode rectifying circuit outputs a positive power rail and a reference ground after rectification; The input end of the low-voltage drop auxiliary structure and the input end of the diode rectifying circuit are connected to the alternating current input signal in parallel, the output end of the low-voltage drop auxiliary structure is connected to the positive power rail and the reference ground, and the control signal input end of the low-voltage drop auxiliary structure receives a high-side control signal and a low-side control signal; The input ends of the other load circuits are connected to the output ends of the diode rectifying circuit and the low-voltage drop auxiliary structure, and the output ends of the other load circuits output the high-side control signal and the low-side control signal to the control signal input ends of the low-voltage drop auxiliary structure. Preferably, the diode rectifying circuit includes a first diode, a second diode, a third diode, and a fourth diode; The anodes of the first diode and the second diode are connected to the reference ground, and the cathodes are respectively connected to a first input end and a second input end of an alternating current input signal; the anodes of the third diode and the fourth diode are respectively connected to the first input end and the second input end of the alternating current input signal, and the cathodes are connected to the positive power supply rail. Preferably, the low-voltage drop auxiliary structure comprises a lower half-bridge voltage drop reducing circuit and an upper half-bridge voltage drop reducing circuit; The lower half-bridge voltage drop reducing circuit comprises a first high-voltage NMOS, a second high-voltage NMOS, a third high-voltage NMOS, a fourth high-voltage NMOS, a first resistor and a second resistor; the gate end of the first high-voltage NMOS is connected to one end of the first resistor, the drain end of the first high-voltage NMOS is connected to one end of the second resistor, and the source end of the first high-voltage NMOS is connected to the reference ground; the gate end of the second high-voltage NMOS is connected to the other end of the second resistor, the drain end of the second high-voltage NMOS is connected to the other end of the first resistor, and the source end of the second high-voltage NMOS is connected to the reference ground; the gate end of the third high-voltage NMOS is connected to the low-side control signal end, the drain end of the third high-voltage NMOS is connected to the first input end of the alternating current input signal, and the source end of the third high-voltage NMOS is connected to the drain end of the first high-voltage NMOS; the gate end of the fourth high-voltage NMOS is connected to the low-side control signal end, the drain end is connected to the second input end of the alternating current input signal, and the source end is connected to the drain end of the s