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CN-121510657-B - Method for preparing integrated circuit

CN121510657BCN 121510657 BCN121510657 BCN 121510657BCN-121510657-B

Abstract

The invention discloses a preparation method of an integrated circuit, which relates to the technical field of integrated circuits and comprises the steps of preprocessing an N-type monocrystalline silicon substrate, depositing an SiO 2 -Si 3 N 4 -SiO 2 transition layer containing CeO 2 and the like, injecting phosphorus ions with low energy and high energy to form an active area, sequentially depositing a TiN barrier layer, a TiMoV barrier layer containing nano Cr and the like on the surface of the active area, electroplating a CuMnFe interconnection layer containing Y and the like, annealing, and preparing a passivation structure of a composite passivation inner layer. The preparation method can solve the problems of high low-temperature start failure rate, easy failure of an interconnection layer under temperature change vibration, electric leakage caused by oil stain penetration and the like of the conventional integrated circuit when the conventional integrated circuit is applied to an automobile engine compartment, and finally prepares the integrated circuit meeting the requirements of high-low temperature circulation at-35-120 ℃ and broadband vibration at 10-2000Hz and oil stain resistance of the automobile engine compartment, thereby ensuring long-term reliable operation of an electronic module.

Inventors

  • MOU YIHUI
  • WAN LEI
  • GAO DAWEI
  • LI YANG
  • XIAO HAILONG
  • YANG JIAXIN
  • FENG LINGYI
  • Wang Weigun
  • ZHANG ZHENXI
  • QIAN PENG

Assignees

  • 电子科技大学成都学院

Dates

Publication Date
20260508
Application Date
20260113

Claims (10)

  1. 1. A method of fabricating an integrated circuit comprising the steps of: S1, preprocessing a substrate, namely selecting an N-type monocrystalline silicon substrate, and sequentially performing alkali liquor cleaning and plasma activation treatment in an oxygen-nitrogen mixed atmosphere on the functional surface of the N-type monocrystalline silicon substrate; S2, preparing a transition layer, namely depositing a SiO 2 -Si 3 N 4 -SiO 2 three-layer composite transition layer with the thickness of 30-40nm on the functional surface of the substrate; the intermediate Si 3 N 4 layer is doped with CeO 2 , nano Ti powder and LiAlO 2 nano particles; s3, forming an active region, namely arranging an active region on the surface of the transition layer, and sequentially injecting phosphorus ions by adopting low energy of 30-40keV and high energy of 80-100 keV; s4, preparing a barrier layer, namely depositing a TiN barrier layer with the thickness of 4-6nm on the surface of the active region; s5, preparing a barrier layer, namely depositing a TiMoV barrier layer with the thickness of 15-20nm on the surface of the TiN barrier layer, wherein nano Cr powder and Y 2 O 3 nano particles are doped in the TiMoV barrier layer; s6, preparing an interconnection layer, namely depositing a CuMnFe interconnection layer with the thickness of 250-300nm on the surface of the TiMoV blocking layer by adopting an electroplating process, and adding rare earth Y, znSO 4 into electroplating solution; s7, synchronously annealing, namely carrying out three-section annealing on the prepared structure, wherein the temperature of the first section is 250-300 ℃, the temperature of the second section is 820-850 ℃ and the temperature of the third section is 400-450 ℃; The TiN diffusion barrier layer, the TiMoV barrier layer and the CuMnFe interconnection layer form a step on the surface of the active region together; S8, preparing a passivation layer: S81, depositing a Si 3 N 4 passivation layer with the thickness of 10-15nm on the edge of the side wall of the step; S82, depositing an AlN-Si 3 N 4 composite passivation inner layer with the thickness of 100-120nm on the surface of the interconnection layer and the surface of the exposed transition layer, wherein nano SiO 2 powder and AlN@MgO core-shell particles are added in the composite passivation inner layer; s83, coating a fluorocarbon resin-PI blending passivation outer layer with the thickness of 80-100nm on the surface of the composite passivation inner layer, wherein AlN nano particles are doped in the blending passivation outer layer; s84, forming a plurality of heat dissipation through holes on the blending passivation outer layer; the integrated circuit is an integrated circuit special for an automobile engine cabin.
  2. 2. The method of claim 1, wherein in step S1, the volume ratio of the two gases is 1:3 in an oxygen-nitrogen mixed atmosphere, and the plasma activation rf power is 80-100W.
  3. 3. The method of claim 1, wherein in step S2, the deposition process of the transition layer is LPCVD, the deposition temperature is 680-720 ℃, the silicon source is TEOS, the flow rate of ammonia gas is 40-60sccm, and the vacuum degree is 2-4Torr.
  4. 4. The method according to claim 1, wherein in step S2, the oxygen atmosphere plasma interface treatment is performed on the deposition gaps between the two SiO 2 layers and the Si 3 N 4 layers.
  5. 5. The method of manufacturing an integrated circuit according to claim 1, wherein in step S3, the low energy implant has a phosphorus ion concentration of 1×10 19 ~2×10 19 cm -3 , a dose of 4×10 14 ~6×10 14 cm -2 , the high energy implant has a phosphorus ion concentration of 4×10 18 ~6×10 18 cm -3 , a dose of 1×10 14 ~3×10 14 cm -2 , and a substrate temperature of 150-200 ℃.
  6. 6. The method of claim 1, wherein in step S5, the deposition process of TiMoV is magnetron sputtering, the sputtering temperature is 200-220 ℃, the vacuum degree is less than or equal to 5 x 10 -5 Pa, and the sputtering power is 180-220W.
  7. 7. The method of manufacturing an integrated circuit according to claim 1, wherein in the step S7, the three-stage annealing is performed for a period of time of 5-8S in the first stage, 8-10S in the second stage, and 3-5S in the third stage, respectively.
  8. 8. The method according to claim 1, wherein in step S82, the deposition process of the AlN-Si 3 N 4 composite passivation inner layer is PECVD, the deposition temperature is 350-380 ℃, the aluminum source is TMA, and the flow rate of ammonia gas is 50-70sccm.
  9. 9. The method according to claim 8, wherein in the step S82, the thickness ratio of AlN to Si 3 N 4 of the AlN-Si 3 N 4 composite passivation inner layer is 3:1.
  10. 10. The method of manufacturing an integrated circuit according to claim 1, wherein in step S8, the heat dissipation through hole is filled with a silver-copper-epoxy composite paste.

Description

Method for preparing integrated circuit Technical Field The invention relates to the technical field of integrated circuits, in particular to a preparation method of an integrated circuit suitable for an automobile engine compartment. Background Electronic modules (such as ignition control modules, sensor signal processing modules, etc.) in the engine compartment of an automobile need to operate in complex and harsh environments for a long period of time. In terms of temperature conditions, when a vehicle is started in winter, the temperature in a cabin can be quickly reduced to below-35 ℃, after an engine runs normally, the temperature in the cabin can be increased to 120 ℃ or even above, frequent high-low temperature circulation of-35 ℃ to 120 ℃ is formed, in terms of vibration conditions, broadband vibration with the frequency of 10-2000Hz and the acceleration of 10g can be generated in the running process of the engine, the vibration can continuously act on an interlayer structure of an integrated circuit, in addition, engine oil steam can be generated in the cabin, and the engine oil steam is easy to mix with dust to form viscous greasy dirt, and is in direct contact with the surface of the integrated circuit. However, the design criteria of the current commercial integrated circuits are mainly aimed at the common consumer electronics or industrial scenario (the commercial grade temperature range is usually 0 ℃ to 70 ℃), and the following problems exist when the design criteria are applied to the engine compartment of an automobile: firstly, under the low-temperature environment, the threshold voltage of the traditional silicon-based MOS tube can be obviously increased, so that the starting voltage of an electronic module is insufficient, the failure rate is higher during cold start in winter, and the engine can not be started normally in severe cases. Secondly, the conventional integrated circuit mostly adopts aluminum-silicon alloy as interconnection lines, and the thermal expansion coefficient of the conventional integrated circuit is obviously different from that of a silicon substrate. Under the superposition of high-low temperature circulation and broadband vibration, the interconnection line can be stripped or broken due to continuous stress concentration, and the average fault-free time of the electronic module is far lower than the standard required by the automotive electronics industry. Third, traditional integrated circuit adopts silica as the passivation layer, and it is relatively poor to the barrier property of organic oil dirt, and the engine oil steam in the engine compartment mixes inside the passivation layer after the dust, easily permeates into the passivation layer, leads to the leakage current of circuit to increase by a wide margin, causes electronic module dysfunction even inefficacy. Based on this, it is very important how to develop a method for manufacturing an application specific integrated circuit that can adapt to the severe environment of the engine compartment of an automobile. Disclosure of Invention The invention aims to overcome the defects of the prior art, and provides a preparation method of an integrated circuit, so as to solve the problems of high low-temperature start failure rate, easy failure of an interconnection layer under temperature-change vibration, electric leakage caused by oil stain penetration and the like when the prior integrated circuit is applied to an automobile engine compartment. The technical purpose of the invention is realized by the following technical scheme: A method of fabricating an integrated circuit comprising the steps of: S1, preprocessing a substrate, namely selecting an N-type monocrystalline silicon substrate, and sequentially performing alkali liquor cleaning and plasma activation treatment in an oxygen-nitrogen mixed atmosphere on the functional surface of the N-type monocrystalline silicon substrate; S2, preparing a transition layer, namely depositing a SiO 2-Si3N4-SiO2 three-layer composite transition layer with the thickness of 30-40nm on the functional surface of the substrate; The intermediate Si 3N4 layer is doped with 0.8 to 1.2 weight percent of CeO 2, 0.3 to 0.5 weight percent of 5 to 10nm of nano Ti powder and 0.1 to 0.2 weight percent of 3 to 5nm of LiAlO 2 nano particles; s3, forming an active region, namely arranging an active region on the surface of the transition layer, and sequentially injecting phosphorus ions by adopting low energy of 30-40keV and high energy of 80-100 keV; s4, preparing a barrier layer, namely depositing a TiN barrier layer with the thickness of 4-6nm on the surface of the active region; S5, preparing a barrier layer, namely depositing a TiMoV barrier layer with the thickness of 15-20nm on the surface of the TiN barrier layer, wherein 0.2-0.4wt% of 8-12nm nano Cr powder and 0.05-0.1wt% of 2-4nmY 2O3 nano particles are doped in the TiMoV barrier layer; S6, preparing an interconnection laye