CN-121580939-B - Multi-board circuit simulation method, system, computer equipment and storage medium

CN121580939BCN 121580939 BCN121580939 BCN 121580939BCN-121580939-B

Abstract

The invention provides a multi-board circuit simulation method, a system, computer equipment and a storage medium, wherein the method comprises the steps of obtaining device pin information and network topology information of each circuit board in a multi-board circuit; marking each device pin on each circuit board as a starting point or an ending point of a cross board signal, constructing a connector model, wherein the connector model comprises a 0 European resistance model and an S parameter model, establishing a cross board pin mapping relation of mapping the device pins on each circuit board to the device pins on other circuit boards through the connector model, selecting the 0 European resistance model and/or the S parameter model based on the type of the cross board signal, and carrying out multi-board circuit system level simulation by combining the cross board pin mapping relation. According to the scheme, the modeling of the pins and the connectors can be accurately performed in the simulation of the multi-board circuit, the parasitic effect and the real topology information are ensured, and the characteristics of insertion loss, reflection, mode conversion and the like under a high-speed signal can be accurately reflected, so that the simulation of the multi-board circuit is more accurate.

Inventors

Cheng Lingye
DENG JUNYONG
Qian Beijie
SUN JIAXIN

Assignees

巨霖科技(上海)有限公司

Dates

Publication Date: 20260508
Application Date: 20260121

Claims (8)

1. A multi-board circuit simulation method, comprising the steps of: acquiring device pin information and network topology information of each circuit board in the multi-board circuit to be simulated; Marking each device pin on each circuit board as a starting point or an end point of a board crossing signal according to the device pin information; The method comprises the steps of constructing a connector model with a unified interface, wherein the connector model comprises a 0 European resistance model and an S parameter model, the construction of the connector model with the unified interface comprises the steps of defining a unified interface class, acquiring a first port parameter file in an ideal conduction state, constructing the 0 European resistance model, wherein the 0 European resistance model is adapted to the span board signal to be a low-frequency signal, acquiring a second port parameter file configured with high-frequency signal transmission characteristics, constructing the S parameter model, and the S parameter model is adapted to the span board signal to be a high-frequency signal; Establishing a board-crossing pin mapping relation of device pins on each circuit board to device pins on other circuit boards through the connector model according to the network topology information and the starting point or the ending point of the board-crossing signal; The 0 European resistance model and/or the S parameter model are/is selected based on the type of the board-crossing signal, multi-board circuit system level simulation is conducted by combining the board-crossing pin mapping relation, the 0 European resistance model is selected when the board-crossing signal among all circuit boards of the multi-board circuit is a low-frequency signal, the S parameter model is selected when the board-crossing signal among all circuit boards of the multi-board circuit is a high-frequency signal, and the 0 European resistance model and the S parameter model are used in a mixed mode according to the corresponding board-crossing signal when the board-crossing signal among all circuit boards of the multi-board circuit comprises both the low-frequency signal and the high-frequency signal.
2. The multi-board circuit simulation method of claim 1, further comprising, after establishing the cross-board pin mapping relationship: Carrying out integrity check on the mapping relation of the cross board pins, judging whether unmapped device pins or repeatedly mapped device pins exist, and judging whether a differential pair and anode and cathode mapping errors exist; if yes, marking the wrong pins, and carrying out error prompt to correct the mapping relation of the cross board pins.
3. The method of claim 1, wherein the establishing a board-crossing pin mapping relationship between the device pins on each circuit board and the device pins on other circuit boards through the connector model comprises: presetting pin mapping rules, wherein the pin mapping rules comprise one-to-one sequential mapping, differential pair mapping and cross mapping; and selecting a target pin mapping rule according to a mapping instruction, and after acquiring the network topology information and the starting point or the finishing point of the cross board signal, establishing a cross board pin mapping relation of the device pins on each circuit board to the device pins on other circuit boards through the connector model according to the target pin mapping rule.
4. The method of claim 1, wherein the establishing a board-crossing pin mapping relationship between the device pins on each circuit board and the device pins on other circuit boards through the connector model comprises: Constructing an imaging interface, and displaying each circuit board and device pins on each circuit board in real time; And establishing an image interaction rule, and establishing a cross-board pin mapping relation of the device pins on each circuit board to the device pins on other circuit boards through the connector model according to the interaction instruction.
5. The method of claim 1, wherein marking each device pin on each circuit board as a start point or an end point of a board-crossing signal according to the device pin information, comprises: Dividing each device pin on each circuit board into a first device pin with a cross-board connection relation and a second device pin without a cross-board connection relation according to the device pin information and the network topology information; each first device pin on each circuit board is marked as a start point or an end point of a board crossing signal.
6. A multi-board circuit emulation system, comprising: the acquisition module is used for acquiring device pin information and network topology information of each circuit board in the multi-board circuit to be simulated; The marking module is used for marking each device pin on each circuit board as a starting point or an end point of a cross-board signal according to the device pin information; The system comprises a construction module, a control module and a control module, wherein the construction module is used for constructing a connector model with a unified interface, the connector model comprises a 0 European resistance model and an S parameter model, the definition of the unified interface is carried out; The mapping module is used for establishing a cross-board pin mapping relation of the device pins on each circuit board to the device pins on other circuit boards through the connector model according to the network topology information and the starting point or the finishing point of the cross-board signal; The simulation module is used for selecting the 0 European resistance model and/or the S parameter model based on the type of the span board signals and carrying out system level simulation by combining the span board pin mapping relation, selecting the 0 European resistance model when the span board signals among all circuit boards of the multi-board circuit are low-frequency signals, selecting the S parameter model when the span board signals among all circuit boards of the multi-board circuit are high-frequency signals, and mixing and using the 0 European resistance model and the S parameter model according to the corresponding span board signals when the span board signals among all circuit boards of the multi-board circuit comprise both low-frequency signals and high-frequency signals.
7. A computer device comprising a memory, a processor and a computer program stored on the memory, characterized in that the processor executes the computer program to implement the steps of the multi-board circuit emulation method of any one of claims 1-5.
8. A computer storage medium having stored thereon a computer program or instructions, which when executed by a processor, implements the steps of the multi-board circuit emulation method of any one of claims 1-5.

Description

Multi-board circuit simulation method, system, computer equipment and storage medium Technical Field The present invention relates to the field of electronic design automation technology, and in particular, to a multi-board circuit simulation method, system, computer device, and storage medium. Background As the complexity of computers, communications, and storage devices increases, multi-board systems (e.g., motherboard + daughter card + backplane) are becoming increasingly popular. The different PCB boards are interconnected through connectors or cables, so that high-speed data transmission is realized, for example, PCIe, DDR, USB, serDes interfaces are used. However, the existing EDA simulation tool has the following problems that connector modeling is not uniform, part of the tool only supports ideal conduction (0 ohm resistance) and cannot accurately reflect the characteristics of insertion loss, reflection, mode conversion and the like under high-speed signals, pin processing is simplified, and part of the method can ignore or replace a device pin during cross-board modeling, so that parasitic effect and accurate signal characteristics are lost. Therefore, there is a need for a method that enables accurate pin and connector modeling in a multi-board circuit simulation to achieve efficient, accurate, repeatable multi-board system level simulation. Disclosure of Invention The invention aims to provide a multi-board circuit simulation method, a system, computer equipment and a storage medium, which can accurately model pins and connectors in multi-board circuit simulation, ensure parasitic effect and real topology information, accurately reflect characteristics such as insertion loss, reflection, mode conversion and the like under high-speed signals, and enable the multi-board circuit simulation to be more accurate and have stronger verifiability. The technical scheme provided by the invention is as follows: in a first aspect, the present application provides a multi-board circuit simulation method, including the steps of: acquiring device pin information and network topology information of each circuit board in the multi-board circuit to be simulated; Marking each device pin on each circuit board as a starting point or an end point of a board crossing signal according to the device pin information; constructing a connector model with a unified interface, wherein the connector model comprises a 0 European resistance model and an S parameter model; Establishing a board-crossing pin mapping relation of device pins on each circuit board to device pins on other circuit boards through the connector model according to the network topology information and the starting point or the ending point of the board-crossing signal; And selecting the 0 European resistance model and/or the S parameter model based on the type of the board-crossing signal, and carrying out multi-board circuit system level simulation by combining the board-crossing pin mapping relation. In some embodiments, after establishing the board-span pin mapping relationship, the method further includes: Carrying out integrity check on the mapping relation of the cross board pins, judging whether unmapped device pins or repeatedly mapped device pins exist, and judging whether a differential pair and anode and cathode mapping errors exist; if yes, marking the wrong pins, and carrying out error prompt to correct the mapping relation of the cross board pins. In some embodiments, the building a connector model with a unified interface includes: defining a unified interface class; Acquiring a first port parameter file in an ideal conduction state, and constructing the 0 European resistance model, wherein the 0 European resistance model is adapted to the low-frequency signal of the transboard signal; And acquiring a second port parameter file for configuring high-frequency signal transmission characteristics, and constructing the S parameter model, wherein the S parameter model is adapted to the transboard signal to be a high-frequency signal. In some embodiments, the 0 ohm resistance model is selected when the cross board signal between the circuit boards of the multi-board circuit is a low frequency signal; When the board crossing signals among the circuit boards of the multi-board circuit are high-frequency signals, selecting the S parameter model; When the cross board signal between the circuit boards of the multi-board circuit comprises both a low frequency signal and a high frequency signal, the 0 ohm resistance model and the S parameter model are mixed and used according to the corresponding cross board signal. In some embodiments, the establishing a board-crossing pin mapping relationship between the device pins on each circuit board and the device pins on other circuit boards through the connector model includes: presetting pin mapping rules, wherein the pin mapping rules comprise one-to-one sequential mapping, differential pair mapping and cross m