CN-121618964-B - High voltage change rate CMTItest circuit

CN121618964BCN 121618964 BCN121618964 BCN 121618964BCN-121618964-B

Abstract

The application discloses a high-voltage change rate CMTItest circuit, and relates to the field of CMTIdetection circuits. The device comprises a rising edge detection circuit and a falling edge detection circuit, wherein the rising edge detection circuit and the falling edge detection circuit respectively comprise a main switch circuit, a voltage acceleration change circuit and a load circuit, the voltage acceleration change circuit is connected in series between the main switch circuit and the load circuit and used for changing the voltage change rate of a common-mode voltage, the main switch circuit is externally connected with a direct-current power supply and a modulation signal, two detection ends are respectively connected with positive and negative detection ends of a product to be detected, common-mode voltage pulses are regulated and controlled through the modulation signal, the common-mode voltage pulses are loaded to two ends of the voltage acceleration change circuit, the switching rate of rising edges or falling edges of the common-mode voltage pulses is improved, and the voltage acceleration change circuit outputs a series load circuit. According to the scheme, the common-mode voltage pulse with high voltage change rate can be effectively generated, a high-stress transient interference scene is simulated, meanwhile, circuit loss is reduced, and test stability and equipment service life are improved.

Inventors

WU BIN
SUN PENGYUAN

Assignees

苏州锴威特半导体股份有限公司

Dates

Publication Date: 20260512
Application Date: 20260202

Claims (9)

1. The high-voltage change rate CMTI test circuit is characterized by comprising a rising edge detection circuit and a falling edge detection circuit, wherein two detection ends of the rising edge detection circuit are respectively connected with a positive detection end and a negative detection end when a product to be tested outputs a rising edge of a common mode signal, and two detection ends of the falling edge detection circuit are respectively connected with the positive detection end and the negative detection end when the product to be tested outputs a falling edge of the common mode signal; The rising edge detection circuit and the falling edge detection circuit respectively comprise a main switch circuit, a voltage acceleration change circuit and a load circuit, wherein the voltage acceleration change circuit is connected in series between the main switch circuit and the load circuit and is used for changing the voltage change rate of a common-mode voltage; The main switch circuit is externally connected with a direct current (VDC) and a modulation signal, and the two detection ends are respectively connected with the positive and negative detection ends of a product to be detected, and output common-mode voltage pulses are regulated and controlled through the modulation signal; the common-mode voltage pulse is loaded to two ends of the voltage acceleration change circuit, the switching rate of the rising edge or the falling edge of the common-mode voltage is improved, and the output of the voltage acceleration change circuit is connected with the load circuit in series; the first voltage acceleration change circuit of the rising edge detection circuit comprises a first transistor and a first current limiting circuit; when detecting a rising edge, a first main switch circuit of the rising edge detection circuit outputs a pulse signal exceeding the withstand voltage value of the first transistor, the first transistor is in a breakdown state, and the first current limiting circuit maintains the current of the first transistor not exceeding the rated avalanche withstand of a product; The second voltage acceleration change circuit of the falling edge detection circuit comprises a second transistor and a second current limiting circuit which are connected in series, wherein the second transistor inputs the common-mode voltage pulse and is connected with the second current limiting circuit in an output mode, during falling edge detection, a second main switch circuit of the falling edge detection circuit outputs a pulse signal exceeding the withstand voltage value of the second transistor, the second transistor is in a breakdown state, and the second current limiting circuit maintains the current of the second transistor not to exceed the rated avalanche withstand of a product.
2. The high voltage variation rate CMTI test circuit as recited in claim 1, wherein the first and second current limiting circuits are identical in structure and include a current limiting resistor R and a charging capacitor C connected in parallel, and an output is grounded, wherein the charging capacitor C charges at a transistor breakdown instant, and a transient voltage is obtained Rate of change, capacitive charge current Equivalent to breakdown current Charging current Over time The expression is as follows: Representing the internal resistance of the transistor, Representing the capacitor voltage.
3. The high voltage variation rate CMTI test circuit as claimed in claim 2, wherein the first transistor or the second transistor is connected in series with a current limiting resistor R in an equivalent manner, and the current limiting resistor R is connected in a voltage drop across the current limiting resistor R ; Is the clamp voltage for the breakdown state of the transistor, Is the common mode voltage of the main switch circuit output.
4. The high voltage change rate CMTI test circuit of claim 1, wherein the first main switch circuit comprises a FET Q1, an inductor L1 and a diode D2, wherein the PWM modulation signal is connected to the gate of the FET Q1, the drain and source of the FET Q1 are connected to the positive and negative sense terminals of the rising edge signal, respectively, and the source is grounded; The direct current power supply VDC is connected with the inductor L1, the output of the inductor L1 is connected with the drain electrode of the field effect tube Q1 and the anode of the diode D2, the cathode output of the diode D2 is connected with the load circuit and grounded, and the common mode voltage pulse is led out from the anode input or the cathode output of the diode D2.
5. The high voltage change rate CMTI test circuit of claim 1, wherein the second main switch circuit comprises a FET field effect transistor Q2, an inductor L2 and a diode D4, wherein the PWM modulation signal is connected to the gate of the FET Q2, the dc power source VDC is connected to the drain of the FET Q2, the source of the FET Q2 is connected to the negative electrode of the diode D4 and one end of the inductor L2, the other end of the inductor L2 is grounded, and the positive electrode of the diode D4 is connected to the load circuit and to ground; The positive electrode detection end of the falling edge signal is arranged at the negative electrode of the diode D4, the negative electrode detection end of the falling edge signal is arranged at the positive electrode of the diode D4, and the common mode voltage pulse is led out by the positive electrode input or the negative electrode output of the diode D4.
6. The high voltage change rate CMTI test circuit of claim 4, wherein the first transistor is one of a diode, FET field effect transistor or insulated gate bipolar transistor IGBT.
7. The high voltage rate of change CMTI test circuit of claim 6, wherein when the first transistor is a diode, the common mode voltage pulse is input to the cathode of the diode to increase VCM voltage rate through reverse breakdown transients ; When the first transistor is an FET, the drain electrode inputs the common-mode voltage pulse, the grid electrode and the source electrode are connected with the first current limiting circuit, and the voltage change rate of the common-mode power is improved through drain-source breakdown transient state ; When the first transistor is an IGBT, the common-mode voltage pulse is input to the collector, the emitter and the grid are connected with the first current limiting circuit together, and the voltage change rate of the common-mode voltage is improved through the transient state of the collector and the emitter 。
8. The high voltage change rate CMTI test circuit of claim 1, wherein the second transistor is one of a diode, FET field effect transistor or insulated gate bipolar transistor IGBT.
9. The high voltage change rate CMTI test circuit of claim 8, wherein when the second transistor is a diode, the negative pole of the diode inputs the common mode voltage pulse to increase the voltage change rate of the common mode voltage by reverse breakdown transients ; When the second transistor is an FET, the drain electrode inputs the common-mode voltage pulse, the grid electrode and the source electrode are connected with the second current limiting circuit, and the voltage change rate of the common-mode voltage is improved through drain-source breakdown transient state ; When the second transistor is an IGBT, the common-mode voltage pulse is input to the collector, the emitter and the grid are connected with the second current limiting circuit together, and the voltage change rate of the common-mode voltage is improved through the transient state of the breakdown of the collector and the emitter 。

Description

High voltage change rate CMTItest circuit Technical Field The application relates to the field of CMTIs (complementary metal oxide semiconductor) detection circuits, in particular to a CMTIs test circuit with a high voltage change rate. Background ‌ ‌ ‌ Common mode transient immunity CMTI (Common mode transient immunity) refers to the ability of a circuit or system to resist common mode interference signals, i.e., the ability of the system to remain in normal operation in the face of interference from common mode signals. CMTI can evaluate the rate of transient rise and fall in critical conditions, beyond which it may lead to system data loss, error, or failure. With the high integration and high-efficiency transition of motor/inverter systems, SIC and GAN third-generation semiconductor devices have the advantages of higher switching frequency, higher switching speed and lower heating value, are gradually popularized and applied, and meanwhile, the challenges of higher voltage variation dv/dt and system stability are brought. The main stream of CMTIs mainly depends on special instruments and equipment, and the equipment has complex structure, huge volume and high cost, usually has price ranging from hundreds of thousands of yuan to millions of yuan, and is difficult to meet the mass test requirements of the product development stage. The conventional test circuit generates a Common-Mode Voltage (VCM) pulse by adjusting the dc power Voltage, the duty cycle of the modulation signal and the frequency, but is limited by the parasitic parameters and the device characteristics of the circuit, and the Voltage change rate of the circuit has obvious bottleneck. Specifically, factors such as inductance value, switching tube conduction time and parasitic capacitance limit the lifting space of the voltage change rate together, so that a conventional test circuit cannot effectively simulate a transient interference scene under a high-stress working condition. In addition, the mainstream scheme often accompanies significant circuit loss and thermal management problems when implementing high voltage change rate testing, affecting test stability and equipment life. In view of the above problems, improvements are needed in the conventional art. Disclosure of Invention The application provides a CMTI test circuit with high voltage change rate, which can effectively generate common-mode voltage pulse with high voltage change rate, simulate high-stress transient interference scene, reduce circuit loss and improve test stability and equipment life. The test circuit comprises a rising edge detection circuit and a falling edge detection circuit, wherein two detection ends of the rising edge detection circuit are respectively connected with positive and negative output ends of a product to be tested when a common mode signal rising edge is output, and two detection ends of the falling edge detection circuit are respectively connected with positive and negative output ends of the product to be tested when a common mode signal falling edge is output; The rising edge detection circuit and the falling edge detection circuit respectively comprise a main switch circuit, a voltage acceleration change circuit and a load circuit, wherein the voltage acceleration change circuit is connected in series between the main switch circuit and the load circuit and is used for changing the voltage change rate of a common-mode voltage; The main switch circuit is externally connected with a direct current (VDC) and a modulation signal, and the two detection ends are respectively connected with the positive and negative detection ends of a product to be detected, and output common-mode voltage pulses are regulated and controlled through the modulation signal; and the common-mode voltage pulse is loaded to two ends of the voltage acceleration change circuit, the switching rate of the rising edge or the falling edge of the common-mode voltage is improved, and the output of the voltage acceleration change circuit is connected with the load circuit in series. Specifically, the first voltage acceleration change circuit of the rising edge detection circuit comprises a first transistor and a first current limiting circuit, wherein the first transistor inputs the common-mode voltage pulse and outputs the common-mode voltage pulse to be connected with the first current limiting circuit; during rising edge detection, a first main switch circuit of the rising edge detection circuit outputs a pulse signal exceeding the withstand voltage value of the first transistor, the first transistor is in a breakdown state, and the first current limiting circuit maintains the current of the first transistor not to exceed the rated avalanche withstand of a product; the second voltage acceleration change circuit of the falling edge detection circuit comprises a second transistor and a second current limiting circuit which are connected in series, wherein the second transistor i