CN-121681078-B - Interrupt reporting system under abnormal scene

CN121681078BCN 121681078 BCN121681078 BCN 121681078BCN-121681078-B

Abstract

The application relates to the technical field of integrated circuit design, in particular to an interrupt reporting system under an abnormal scene, which constructs a new data path for an interrupt control center, adopts a mode of reporting a target interrupt signal by the interrupt control center and the cooperation of a bus I and a system management processor to ensure that a host end can receive each functional unit, including interrupt information generated by the interrupt control center, so as to avoid error or loss of the interrupt information, improve the reliability of GPU interrupt reporting under the abnormal scene and further improve the safety of a GPU.

Inventors

FANG QING
KONG CHAO
LIU GANG

Assignees

沐曦集成电路(南京)有限公司

Dates

Publication Date: 20260508
Application Date: 20260212

Claims (7)

1. The interrupt reporting system under the abnormal scene is characterized by comprising a plurality of functional units, a system management processor, a first bus, an interrupt control center, a second bus and a host end; for any functional unit, the functional unit is used for generating an interrupt information packet when a fault occurs, and then sending the interrupt information packet to the interrupt control center through the first bus; The interrupt control center is used for generating an interrupt request according to the interrupt information packet after receiving the interrupt information packet, and then sending the interrupt request to the host end through the second bus; The second bus is configured to send response information to the interrupt control center according to a transmission condition that the interrupt request is sent to the host, where the response information includes normal response information and abnormal response information, the normal response information indicates that the interrupt request is successfully sent to the host, and the abnormal response information indicates that the interrupt request is not successfully sent to the host; the interrupt control center is further configured to generate a target interrupt signal when the response information meets a first preset condition, and send the target interrupt signal to the system management processor through the first bus, where the first preset condition is that the response information belongs to the abnormal response information; the system management processor is used for informing the host side of the target interrupt signal.
2. The interrupt reporting system in an abnormal scenario of claim 1, wherein the interrupt control center comprises a data storage unit; The data storage unit is used for storing interrupt information packets sent to the interrupt control center by each functional unit; The data storage unit is correspondingly provided with a write address pointer and a read address pointer, wherein the write address pointer is used for identifying first position information of the interrupt information packet currently received, and the read address pointer is used for identifying second position information of the interrupt information packet currently sent to the host side.
3. The interrupt reporting system in an exception scenario of claim 2, wherein the interrupt request comprises a real data request, an adaptive data request, a real address request, and an adaptive address request, wherein the real data request and the real address request are generated according to interrupt packets sent by a functional unit, and wherein the adaptive data request and the adaptive address request are generated according to corresponding interrupt packets when the interrupt control center tests.
4. The interrupt reporting system in the exception scenario of claim 3, wherein the exception response type corresponding to the exception response information comprises at least an address translation exception type, an access address exception type, a destination exception type, a data request timeout exception type, and an address request timeout exception type.
5. The interrupt reporting system in an exception scenario of claim 4, wherein the interrupt control center comprises a first register and a second register, wherein the first register is configured to store an interrupt packet corresponding to exception response information that satisfies a second preset condition, and the second register is configured to store an exception response type corresponding to the exception response information and a request type of an interrupt request corresponding to the exception response information, and the request types of the interrupt request include a real data request type, an adaptive data request type, a real address request type, and an adaptive address request type.
6. The interrupt report system in the abnormal scenario according to claim 5, wherein the interrupt control center is further configured to determine, after the interrupt request is sent to the second bus, whether a request type of the interrupt request is a real data request type, if the request type of the interrupt request is the real data request type, record an interrupt packet and a request type corresponding to the interrupt request, and if the request type of the interrupt request is not the real data request type, record a request type corresponding to the interrupt request; The interrupt control center is further configured to determine, when the response information corresponding to the interrupt request is abnormal response information, whether the abnormal response information meets a second preset condition, store an interrupt packet of the interrupt request corresponding to the abnormal response information in the first register if the abnormal response information meets the second preset condition, store an abnormal response type corresponding to the abnormal response information and a request type of the interrupt request corresponding to the abnormal response information in the second register, and store the abnormal response type corresponding to the abnormal response information and a request type of the interrupt request corresponding to the abnormal response information in the second register if the abnormal response information does not meet the second preset condition, where the second preset condition is that the request type of the interrupt request corresponding to the abnormal response information is a real data request type.
7. The interrupt reporting system under an abnormal scenario according to claim 6, wherein the host side is configured to read a first register and a second register of the interrupt control center when receiving the target interrupt signal, acquire interrupt related information, and process the interrupt related information; the host side is further configured to send a clear signal to the first bus and the interrupt control center after the processing of the interrupt related information is completed.

Description

Interrupt reporting system under abnormal scene Technical Field The invention relates to the technical field of integrated circuit design, in particular to an interrupt reporting system under an abnormal scene. Background In the GPU, which is a huge parallel computing system, the interrupt control center plays a key role of a traffic hub and an emergency dispatch center, efficiently and orderly manages interrupt requests from hundreds of different functional units inside, and timely and accurately reports to a CPU (host side), so as to cooperate with the CPU to complete control of task dispatch, error processing and system synchronization. It evolves from simple signaling to an intelligent subsystem directly related to GPU performance, reliability and programmability. The interrupt request is a self-reporting mechanism of the functional unit, and aims to inform the host of the task completion condition, error information, state change and the like. The interrupt control center first needs to play a role of storing interrupt information packets, and after the functional unit generates the interrupt information packets, the interrupt information packets are written into the memory of the interrupt control center through the first bus. The interrupt control center will transmit the internal interrupt data request to the host after dispatch and arbitration. However, in general, the interrupt control center is also regarded as a functional unit, and triggers an interrupt when it reports an error or other abnormality in the interrupt. The pen interrupt, like other functional units, needs to be sent to the interrupt control center, that is, the reporting process abnormality of the interrupt control center needs to be reported again by the user. In this case, even if the interrupt control center stores interrupt related information, the problem of failure to report to the host end still exists, which may cause a vicious circle or even data loss. Therefore, how to improve the reliability of GPU interrupt reporting in abnormal scenarios, and further improve the security of GPUs becomes a urgent issue to be resolved. Disclosure of Invention Aiming at the technical problems, the invention adopts the following technical scheme: The interrupt reporting system under the abnormal scene comprises a plurality of functional units, a system management processor, a first bus, an interrupt control center, a second bus and a host end; for any functional unit, the functional unit is used for generating an interrupt information packet when a fault occurs, and then sending the interrupt information packet to the interrupt control center through the first bus; The interrupt control center is used for generating an interrupt request according to the interrupt information packet after receiving the interrupt information packet, and then sending the interrupt request to the host end through the second bus; The second bus is used for sending response information to the interrupt control center according to the transmission condition of the interrupt request sent to the host side; the interrupt control center is further configured to send a target interrupt signal to the system management processor through the first bus when the response information meets a first preset condition; the system management processor is used for informing the host side of the target interrupt signal. Compared with the prior art, the invention has obvious beneficial effects, by virtue of the technical scheme, the interrupt reporting system under the abnormal scene can achieve quite technical progress and practicality, has wide industrial utilization value, and has at least the following beneficial effects: The invention constructs a new data path for the interrupt control center, and adopts the mode of reporting the target interrupt signal by the interrupt control center, the first bus and the system management processor cooperatively to ensure that the host end can receive the interrupt information generated by the interrupt control center, thereby avoiding the error or loss of the interrupt information, improving the reliability of GPU interrupt reporting under an abnormal scene and further improving the safety of the GPU. Drawings In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art. Fig. 1 is a schematic structural diagram of an interrupt reporting system under an abnormal scenario provided in an embodiment of the present invention; FIG. 2 is a schematic diagram of a ring buffer in an interrupt reporting system in an abnormal scenario according to an embodiment of the present inve