CN-121722712-B - Transaction processing method of multi-core processor, multi-core processor and electronic equipment

Abstract

The invention discloses a transaction processing method of a multi-core processor, the multi-core processor and electronic equipment, and relates to the technical field of cache consistency of the multi-core processor. In the method, the combined data packet is sent to a destination terminal. And secondly, aiming at read-write transaction of a plurality of continuous cache line addresses, configuring an operation code of a target protocol as a read-write transaction identifier, and configuring an address field of the target protocol as a read-write transaction address, thereby generating the combined data packet. And combining the destination node identifiers of the failure monitoring request transactions in a target protocol aiming at the failure monitoring request transactions, and generating a combined data packet. In addition, the operation code based on the target protocol realizes the read-write operation of the continuous cache line address, and the structure of the read-write transaction data packet of the existing protocol is kept unchanged.

Inventors

• Su kang
• LI TUO
• LI YAMIN

Assignees

• 山东云海国创云计算装备产业创新中心有限公司

Dates

Publication Date

20260508

Application Date

20260213

Claims (18)

1. 1. A transaction processing method of a multi-core processor, which is applied to a source end, comprising: Acquiring a target transaction on a multi-core processor; If the target transaction is a read-write transaction aiming at a plurality of continuous cache line addresses, acquiring a read-write transaction identifier and a read-write transaction address, configuring an operation code of a target protocol as the read-write transaction identifier, and configuring an address field of the target protocol as the read-write transaction address to generate a combined data packet, wherein the operation code comprises a reserved field; If the target transaction is a plurality of failure monitoring request transactions, merging destination node identifiers of the plurality of failure monitoring request transactions in a target protocol to generate a merged data packet, wherein the target protocol is a cache consistency protocol; The merged data packet is sent to a destination end, wherein the source end and the destination end are determined based on the transaction type; Configuring the address field of the target protocol as the read-write transaction address includes: Configuring an address field of the target protocol as a first address of the continuous cache line address; merging destination node identifiers of a plurality of failure monitoring request transactions in a target protocol to generate a merged data packet, wherein the merged data packet comprises: Merging the destination node identifiers of a plurality of invalid monitoring request transactions in a destination node identifier domain of a target protocol, configuring identifiers representing merged monitoring requests or non-merged monitoring requests in a flag domain of the target protocol, and configuring the number of merged invalid monitoring request transactions in a number domain of the target protocol to generate merged monitoring request data packets; The sending of the combined data packet to the destination end comprises the following steps: and sending the combined monitoring request data packet to a destination terminal.
2. 2. The transaction method of a multi-core processor of claim 1, wherein obtaining a read-write transaction identification comprises: acquiring a first mapping relation between a pre-established read-write transaction identifier and a read-write transaction, wherein the read-write transaction identifier consists of information of a reserved field in an operation code and information of the remaining field in the operation code; And determining a read-write transaction identifier corresponding to the target transaction based on the first mapping relation.
3. 3. The method for processing a transaction of a multi-core processor according to claim 1, wherein the target transaction is a read transaction among read-write transactions for a plurality of continuous cache line addresses, the source terminal is a target request node, and the destination terminal is a master node; After the combined data packet is sent to the destination end, the method further comprises: The method comprises the steps of merging a data packet to be read, dividing the merged data packet into a plurality of read request data packets according to an operation code field and an address field in the merged data packet, inquiring a directory based on the read request data packets, generating a monitoring data packet sent to a request node to be monitored or a read data packet sent to a slave node according to a cache line state recorded in the directory, acquiring a read request response data packet sent by the request node to be monitored or the slave node, and sequentially returning the read request response data packet to the target request node, wherein the destination address in the read request data packets is obtained after the address field in the merged data packet is shifted.
4. 4. A transaction method for a multi-core processor according to claim 3, wherein the master node further comprises, prior to sequentially returning the read request response data packet to the target requesting node: Acquiring a second mapping relation between a pre-established read transaction identifier and read transactions of cache line data fragments, wherein the read transaction identifier is characterized by information of reserved fields in an operation code; and adding a corresponding read transaction identifier to an operation code in a target read request response data packet based on the read transaction of the target cache line data fragment and the second mapping relation to generate a final read request response data packet corresponding to the target cache line data fragment, wherein the target read request response data packet is a request response data packet corresponding to the target cache line data fragment.
5. 5. The method according to claim 1, wherein the target transaction is a write transaction among read-write transactions for a plurality of consecutive cache line addresses, the source terminal is a target request node, and the destination terminal is a master node; After the combined data packet is sent to the destination end, the method further comprises: And splitting the combined data packet into a plurality of write request data packets according to an operation code field and an address field in the combined data packet in the master node, and sending information used for representing the received write data to the target request node, wherein the destination addresses in the plurality of write request data packets are obtained after the address fields in the combined data packet are offset.
6. 6. The transaction method of a multi-core processor according to claim 5, wherein the master node, after transmitting information characterizing receipt of write data to the target requesting node, further comprises: acquiring a third mapping relation between a pre-established write transaction identifier and write transactions of cache line data fragments, wherein the write transaction identifier is characterized by information of reserved fields in an operation code; Based on the write transaction of the target cache line data fragment and the third mapping relation, adding a corresponding write transaction identifier to an operation code in a target write request response data packet to generate a final write request response data packet corresponding to the target cache line data fragment, wherein the target write request response data packet is a request response data packet corresponding to the target cache line data fragment; And sequentially sending each final write request response data packet to the master node.
7. 7. The transaction method of a multi-core processor according to claim 1, further comprising, before sending the combined snoop request packet to a destination: acquiring a preset routing mode of the combined monitoring request data packet; And determining the destination end to which the combined monitoring request data packet is to be sent based on a routing mode.
8. 8. The method for transaction processing of a multi-core processor according to claim 7, wherein determining, based on a routing manner, a destination to which the merged snoop request packet is to be sent comprises: if the routing mode is detected to be that the master node sends the combined monitoring request data packet to a monitoring transfer module, the monitoring transfer module forwards the monitoring request data packet to a corresponding destination node respectively, and then the destination end to which the combined monitoring request data packet is to be sent is determined to be the monitoring transfer module.
9. 9. The transaction method of a multi-core processor according to claim 8, further comprising, after sending the merged snoop request packet to a destination: analyzing the combined monitoring request data packet, and obtaining an analysis result; If the label domain in the analysis result is configured with a monitoring request representing merging, generating a corresponding number of monitoring request data packets according to the number of merged invalid monitoring request transactions configured in the number domain, wherein a destination node identification domain in each monitoring request data packet corresponds to an identification domain of one destination node in the merged monitoring request data packet; and sending each monitoring request data packet to a corresponding destination node through the monitoring transfer module.
10. 10. The method according to claim 9, wherein after each snoop request packet is sent to a corresponding destination node by the snoop transfer module, further comprising: The method comprises the steps of receiving a monitoring response data packet sent by each destination node through a monitoring transfer module, merging node identifiers corresponding to the destination nodes of a plurality of monitoring responses in a destination node identifier domain of a target protocol, configuring identifiers representing merged monitoring responses or non-merged monitoring responses in the identifier domain of the target protocol, configuring the number of merged monitoring responses in the number domain of the target protocol to generate a merged monitoring response data packet, and sending the merged monitoring response data packet to a master node.
11. 11. The method for transaction processing of a multi-core processor according to claim 7, wherein determining, based on a routing manner, a destination to which the merged snoop request packet is to be sent comprises: if the routing mode is detected to be that the master node sends the combined monitoring request data packet to one preset destination node in all destination nodes, the next-stage transmission is carried out according to the destination nodes in the combined monitoring request data packet, and the destination end is determined to be the preset destination node.
12. 12. The method for transaction processing of a multi-core processor according to claim 11, wherein the sending the merged data packet to a destination comprises: Transmitting the combined monitoring request data packet to the preset destination node; After the combined monitoring request data packet is sent to the preset destination node, the method further comprises the following steps: Analyzing the combined monitoring request data packet in the preset destination node, acquiring an analysis result, and downloading monitoring information sent to a local node from the combined monitoring request data packet; if the flag field in the analysis result is configured with the characterization combined monitoring response, judging whether the quantity of the combined monitoring responses minus 1 is 0; if yes, determining that forwarding of the combined monitoring request data packet is completed; if not, assigning a value obtained by subtracting 1 from the number of the combined monitoring responses to a number domain, and sequentially subtracting 1 from the node identification corresponding to each node behind the preset destination node in the combined monitoring request data packet to obtain information of a new destination node identification domain so as to generate a new combined monitoring request data packet; And transmitting the new combined monitoring request data packet to a destination node corresponding to the first destination node identifier in the information of the new destination node identifier domain, returning to the step of analyzing the combined monitoring request data packet, acquiring an analysis result, and downloading monitoring information sent to a local node from the combined monitoring request data packet.
13. 13. The transaction method of a multi-core processor according to claim 11 or 12, wherein merging destination node identities of a plurality of invalidating snoop request transactions in a destination node identity field of a target protocol comprises: and in the destination node identification domain of the target protocol, sequentially sequencing the node identifications corresponding to the destination nodes of the plurality of monitoring responses according to the routing sequence.
14. 14. The transaction method of a multi-core processor of claim 13, further comprising: and after the destination node acquires the corresponding monitoring request data packet, sequentially receiving monitoring response data packets sent by all the destination nodes.
15. 15. A multi-core processor, comprising a source end and a destination end; The source end is used for acquiring a target transaction on a multi-core processor, acquiring a read-write transaction identifier and a read-write transaction address if the target transaction is a read-write transaction aiming at a plurality of continuous cache line addresses, configuring an operation code of a target protocol as the read-write transaction identifier and an address field of the target protocol as the read-write transaction address to generate a combined data packet, wherein the operation code comprises a reserved field, combining destination node identifiers of a plurality of failure monitoring request transactions in the target protocol to generate the combined data packet if the target transaction is a plurality of failure monitoring request transactions, wherein the target protocol is a cache consistency protocol, and transmitting the combined data packet to the destination end, wherein the source end and the destination end are determined based on transaction types; the destination end is used for receiving the combined data packet sent by the source end; Configuring the address field of the target protocol as the read-write transaction address includes: Configuring an address field of the target protocol as a first address of the continuous cache line address; merging destination node identifiers of a plurality of failure monitoring request transactions in a target protocol to generate a merged data packet, wherein the merged data packet comprises: Merging the destination node identifiers of a plurality of invalid monitoring request transactions in a destination node identifier domain of a target protocol, configuring identifiers representing merged monitoring requests or non-merged monitoring requests in a flag domain of the target protocol, and configuring the number of merged invalid monitoring request transactions in a number domain of the target protocol to generate merged monitoring request data packets; The sending of the combined data packet to the destination end comprises the following steps: and sending the combined monitoring request data packet to a destination terminal.
16. 16. A computer program product comprising computer programs/instructions which, when executed by a processor, implement the steps of the transaction method of a multicore processor according to any of claims 1 to 14.
17. 17. An electronic device, comprising: A memory for storing a computer program; A processor for implementing the steps of the transaction method of the multi-core processor according to any of claims 1 to 14 when executing said computer program.
18. 18. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, implements the steps of the transaction method of a multicore processor according to any of claims 1 to 14.

Description

Transaction processing method of multi-core processor, multi-core processor and electronic equipment Technical Field The present invention relates to the field of cache consistency of a multi-core processor, and in particular, to a transaction processing method of a multi-core processor, and an electronic device. Background An on-Chip interconnect Network (NoC) is a core component in the design of a multi-core processor that achieves the high efficiency and scalability of on-Chip communications by efficiently connecting processor cores, memory, and other hardware resources. As the number of processor cores increases, maintaining cache coherency among the processor core private caches becomes increasingly difficult, and data transfer pressures on nocs become increasingly high. Current on-chip cache coherency protocols, such as the coherency hub interface (Coherent Hub Interface, CHI) protocol, are applicable to a variety of interconnect architectures, such as Ring, xbar, noC. However, the cache coherence protocol is not specifically optimized for the Mesh NoC architecture widely used by the central processing unit (Central Processing Unit, CPU). That is, directional optimization is not performed according to the transmission characteristics of the Mesh type NoC, so that the transmission pressure of the NoC is increased in some scenes (such as a read-write transaction scene of a plurality of continuous cache line addresses and a scene of a plurality of invalid monitoring request processing), and the overhead of cache consistency maintenance is correspondingly increased. It can be seen that how to reduce the transmission pressure of NoC, thereby reducing the overhead of cache coherency maintenance is a technical problem that needs to be solved by those skilled in the art. Disclosure of Invention The invention aims to provide a transaction processing method of a multi-core processor, the multi-core processor and electronic equipment, and aims to solve the technical problem that overhead of cache consistency maintenance is increased due to high NoC transmission pressure. In order to solve the above technical problems, the present invention provides a transaction processing method of a multi-core processor, which is applied to a source end and includes: Acquiring a target transaction on a multi-core processor; If the target transaction is a read-write transaction aiming at a plurality of continuous cache line addresses, acquiring a read-write transaction identifier and a read-write transaction address, configuring an operation code of a target protocol as the read-write transaction identifier, and configuring an address field of the target protocol as the read-write transaction address to generate a combined data packet, wherein the operation code comprises a reserved field; If the target transaction is a plurality of failure monitoring request transactions, merging destination node identifiers of the plurality of failure monitoring request transactions in a target protocol to generate a merged data packet, wherein the target protocol is a cache consistency protocol; and sending the merged data packet to a destination terminal, wherein the source terminal and the destination terminal are determined based on the transaction type. In one aspect, obtaining the read-write transaction identifier includes: acquiring a first mapping relation between a pre-established read-write transaction identifier and a read-write transaction, wherein the read-write transaction identifier consists of information of a reserved field in an operation code and information of the remaining field in the operation code; And determining a read-write transaction identifier corresponding to the target transaction based on the first mapping relation. In another aspect, configuring the address field of the target protocol as a read-write transaction address includes: The address field of the target protocol is configured as the first address of the consecutive cache line address. On the other hand, the target transaction is a read transaction in read-write transactions aiming at a plurality of continuous cache line addresses, the source end is a target request node, and the destination end is a master node; After the combined data packet is sent to the destination end, the method further comprises: The method comprises the steps of merging a data packet to be read, dividing the merged data packet into a plurality of read request data packets according to an operation code field and an address field in the merged data packet, inquiring a directory based on the read request data packets, generating a monitoring data packet sent to a request node to be monitored or a read data packet sent to a slave node according to a cache line state recorded in the directory, acquiring a read request response data packet sent by the request node to be monitored or the slave node, and sequentially returning the read request response data packet to the target requ