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CN-121727687-B - LDPC iterative decoding method and device based on cross-layer perception and system time sequence

CN121727687BCN 121727687 BCN121727687 BCN 121727687BCN-121727687-B

Abstract

The application provides an LDPC iterative decoding method and device based on cross-layer sensing and system time sequence, which belong to the technical field of wireless communication, acquire the total time length of a current OFDM data packet, the total number of contained LDPC code blocks and preset LDPC decoding core parameters, calculate the real-time available time margin of the current LDPC code block based on a system time sequence sensing mechanism by combining synchronous information of the OFDM data packet, the real-time state of a memory and protocol time sequence constraint, judge the decoding state of an MAC layer data packet to which the current LDPC code block belongs based on the cross-layer sensing mechanism, dynamically calculate the adaptive iteration times for the current LDPC code block according to the obtained real-time available time margin, and execute LDPC iterative decoding. Therefore, by fusing a cross-layer sensing mechanism and a receiver system time sequence sensing mechanism, the fine and dynamic scheduling of iteration resources is realized, and the high-rate transmission requirement of the 802.11 protocol is adapted.

Inventors

  • Fu tianhuang

Assignees

  • 高拓讯达(北京)微电子股份有限公司

Dates

Publication Date
20260512
Application Date
20260226

Claims (9)

  1. 1. An LDPC iterative decoding method based on cross-layer perception and system time sequence is characterized by comprising the following steps: Acquiring the total time length of a current OFDM data packet, the total number of the contained LDPC code blocks and presetting core parameters of LDPC decoding; Based on a system time sequence sensing mechanism, combining synchronous information of an OFDM data packet, a real-time state of a memory and protocol time sequence constraint, calculating a real-time available time margin of a current LDPC code block; the method comprises the steps of determining the available buffer time of a memory based on the data backlog state of all buffer memories in a receiver system monitored in real time, calculating the real-time available time margin of a current LDPC code block based on the remaining time of the packet, the available buffer time of the memory, the fixed time delay and the protocol response time margin, and determining the latest completion time of decoding the code block; Based on a cross-layer perception mechanism, judging the decoding state of the MAC layer data packet to which the current LDPC code block belongs, combining the obtained real-time available time allowance, dynamically calculating the adaptive iteration times for the current LDPC code block according to scenes, and executing LDPC iterative decoding.
  2. 2. The method for LDPC iterative decoding based on cross-layer sensing and system timing according to claim 1, wherein the core parameters of the LDPC decoding comprise a maximum number of iterations, a minimum number of iterations, a system expected average number of iterations, a resource fine tuning parameter and a single LDPC iteration time.
  3. 3. The LDPC iterative decoding method based on cross-layer sensing and system timing according to claim 2, wherein the adapted iteration number is dynamically calculated by: Extracting a decoding state mark of an MAC layer data packet to which the current LDPC code block belongs, and judging whether the MAC layer data packet is marked as decoding failure or not; If the MAC layer data packet is marked as decoding failure, stopping the iterative decoding flow of the current LDPC code block, calculating the iteration time resource saved by stopping the current time and transferring to a system iteration resource pool for LDPC decoding corresponding to the subsequent MAC layer data packet without marked decoding failure; if the MAC layer data packet is not marked as decoding failure, combining the position characteristic of the code block, the real-time available time margin and the preset core parameters, and dynamically calculating the final iteration times of the current LDPC code block according to scenes; And performing LDPC iterative decoding on the current LDPC code block according to the final iteration times, monitoring the checksum state and the checksum improvement rate after each iteration in real time, judging a decoding result, updating the decoding state mark of the MAC layer data packet to which the current LDPC code block belongs according to the decoding result, wherein if the decoding fails, the MAC layer data packet is marked as decoding failure, and if the decoding is successful in advance, the residual iteration time resource is transferred to the subsequent LDPC code block of the MAC layer data packet.
  4. 4. The LDPC iterative decoding method based on cross-layer perception and system time sequence according to claim 3, wherein the sub-scene dynamically calculates the final iteration number of the current LDPC code block, comprising the steps of: If the current LDPC code block is the first code block of the data packet of the MAC layer and is the last LDPC code block of the OFDM data packet, the final iteration times are as follows: if the current LDPC code block is the first code block of the data packet of the MAC layer and is not the last LDPC code block of the OFDM data packet, the final iteration times are as follows: Wherein, the Indexing LDPC code blocks; The total number of LDPC code blocks contained in the current OFDM data packet is calculated; Is the maximum iteratable number; 、 、 、 the method comprises the steps of respectively presetting a maximum iteration number, a minimum iteration number, a system expected average iteration number and a resource fine adjustment parameter.
  5. 5. The LDPC iterative decoding method based on cross-layer sensing and system timing as claimed in claim 4, wherein the maximum number of iterations is calculated by the following formula: Wherein, the Is a real-time available time margin; time consuming for a preset single LDPC iteration.
  6. 6. The LDPC iterative decoding method based on cross-layer sensing and system timing according to claim 5, wherein the decoding result is determined by: if the checksum is zero after a certain iteration, judging that the decoding is successful, and terminating the iteration; and if the checksum improvement rate is lower than a preset convergence threshold in the iteration process, or the checksum is not zero when the iteration number reaches the maximum iteration number, judging that the decoding fails.
  7. 7. An LDPC iterative decoding device based on cross-layer perception and system timing, the device comprising: the parameter initialization module is used for acquiring the total time length of the current OFDM data packet, the total number of the contained LDPC code blocks and presetting the core parameters of LDPC decoding; The system comprises a time margin calculation module, a packet remaining time calculation module, a memory available cache time calculation module, a real-time available time margin calculation module and a decoding module, wherein the time margin calculation module is used for calculating the real-time available time margin of a current LDPC code block based on a system time sequence sensing mechanism by combining synchronous information of an OFDM data packet, a real-time state of a memory and a protocol time sequence constraint, positioning an arrival time point of a maximum energy path component in the OFDM data packet through a synchronous algorithm and taking the arrival time point as a time reference, calculating elapsed processing time from the time reference to the current time and combining the total time length of the OFDM data packet to obtain the packet remaining time when the current LDPC code block is processed; The iteration number calculation module is used for judging the decoding state of the MAC layer data packet to which the current LDPC code block belongs based on a cross-layer perception mechanism, combining the obtained real-time available time allowance, dynamically calculating the adaptive iteration number for the current LDPC code block according to scenes, and executing LDPC iterative decoding.
  8. 8. An electronic device comprising a processor, a memory and a bus, wherein the memory stores machine-readable instructions executable by the processor, the processor and the memory in communication via the bus when the electronic device is in operation, the machine-readable instructions when executed by the processor perform the steps of an LDPC iterative decoding method based on cross-layer awareness and system timing according to any one of claims 1 to 6.
  9. 9. A computer readable storage medium, wherein a computer program is stored on the computer readable storage medium, and when the computer program is executed by a processor, the computer program performs the steps of an LDPC iterative decoding method based on cross-layer sensing and system timing according to any one of claims 1 to 6.

Description

LDPC iterative decoding method and device based on cross-layer perception and system time sequence Technical Field The application belongs to the technical field of wireless communication, and particularly relates to an LDPC iterative decoding method and device based on cross-layer sensing and system time sequence. Background As the IEEE 802.11 protocol evolves towards Wi-Fi 6/Wi-Fi 7 or even future Wi-Fi 8 standards, its physical layer transmission rate exhibits a spanned growth. For example, wi-Fi 7 supports 4096-QAM high order modulation, 320MHz channel bandwidth, and up to 16 spatial streams, with theoretical peak rates up to 46.1Gbps. To ensure transmission reliability at such high rates, low density parity check codes (LDPC) have become a mandatory channel coding scheme since the Wi-Fi 5 standard has its excellent performance approaching shannon limit. However, the LDPC decoder, and in particular the iterative decoding process at its core, is one of the most computationally complex modules in Wi-Fi chips with the greatest power consumption and area overhead. Conventional LDPC decoding generally employs a sum-product algorithm or a minimum sum algorithm, and ensures error correction performance through a fixed number of iterations (typically set to 7 to 12). This fixed iteration strategy poses serious hardware implementation challenges in a high throughput Wi-Fi 7/8 scenario. (1) The high throughput requirement contradicts the fixed timing in that the decoding time window to which each LDPC code block is assigned is extremely limited in order to meet the throughput specified by the standard. Taking Wi-Fi 7 full-scale mode as an example, approximately 400 LDPC code blocks need to be processed in a single symbol period, resulting in an average decoding time of only about 35ns (nanoseconds) for each code block. If 7 iterations are forced, a single iteration is required to be completed within 5ns, which directly forces the designer to employ a higher clock frequency or a more massive parallel computing architecture. (2) The implementation mode of the high frequency and high parallelism causes the area occupation ratio of the LDPC decoding module in the physical layer chip to be 1/4 to 1/3, and the power consumption occupation ratio in the receiving mode is even close to 50 percent, thus becoming a core bottleneck for restricting the miniaturization and the low power consumption of the terminal equipment. The optimization of LDPC in the prior art has focused on the algorithm level micro-improvement (such as the approximate computation of the check node update algorithm). However, since the LDPC core algorithm is quite mature, performance gain caused by such optimization is increasingly limited, and the problem of low utilization of systematic resources caused by a fixed iteration strategy cannot be fundamentally solved. The existing fixed iteration strategy has the following two fundamental defects: At the packet level, the packet characteristics of the upper layer protocol (MAC) cannot be adapted. In practical communication systems, the length of a data packet generated by an upper layer protocol (such as TCP/IP/UDP) is generally relatively fixed, and the upper layer data packet of the 802.11 protocol corresponds to a MAC layer packet. Taking a typical 1680 byte MAC layer packet as an example, it will be divided into about 10-20 more LDPC code blocks for encoded transmission. From the system reliability perspective, as long as one of the LDPC code blocks fails to decode, the whole MAC layer data packet declares transmission failure, and the rest LDPC code blocks which have been successfully decoded are also disabled. The fixed iteration strategy does not consider the packet-level association characteristic of one error and all errors, and allocates fixed and sufficient iteration resources to all code blocks in a single data packet, so that after decoding failure of a first code block, iteration investment of a subsequent code block of the packet is purely resource waste. At the code block level, the idle time slots of the data processing pipeline are not utilized for global optimization. The fixed strategy robustly breaks the processing timing among the various LDPC code blocks and even between different data packets. Memory buffer structures (e.g., time domain memory or frequency domain memory) in Wi-Fi receivers create a variable time margin for the system. The traditional method can not treat the whole decoding process as a whole which can be dynamically scheduled in time, and can not realize iterative resource scheduling of cross LDPC code blocks and cross-layer packets. Disclosure of Invention In view of the above, the present application aims to provide an LDPC iterative decoding method and apparatus based on cross-layer sensing and system timing, which can implement fine and dynamic scheduling of iterative resources and adapt to the high-rate transmission requirements of the 802.11 protocol. In a fi