CN-121749973-B - Level conversion circuit with adjustable output swing

CN121749973BCN 121749973 BCN121749973 BCN 121749973BCN-121749973-B

Abstract

The invention discloses a level conversion circuit with adjustable output swing, which relates to the technical field of integrated circuits and comprises an input inverting buffer module, a level conversion control module and an output driving module. The input inversion buffer module is connected with the signal input end and is used for outputting two paths of internal driving signals with opposite logic, the level conversion control module utilizes capacitive coupling and a switching tube to reset the level of the grid control voltage, and the output driving module comprises a first transmission gate connected between a first level VDDH and the signal output end and a second transmission gate connected between a second level VDDL and the signal output end. The invention realizes that the output swing amplitude is flexibly adjustable along with VDDH and VDDL by controlling the opening and closing of the first transmission gate and the second transmission gate. The invention shortens the switching time of the post-stage circuit by reducing the output swing on the premise of not increasing the area of the chip, improves the switching rate of the circuit, reduces the power consumption and is suitable for high-speed low-power-consumption circuits.

Inventors

ZHANG RONGHAO
LIU HAO
REN JUN

Assignees

成都观岩科技有限公司

Dates

Publication Date: 20260508
Application Date: 20260228

Claims (7)

1. A level shifter circuit with an adjustable output swing, comprising: the input inverting buffer module is connected with the signal input end IN and is used for receiving an input signal and outputting two paths of internal driving signals with opposite logic levels; the level conversion control module is connected with the input inverting buffer module, the first level VDDH and the second level VDDL, and comprises a plurality of capacitors and a plurality of switching tubes, and is used for converting the internal driving signals into multi-path grid control voltages by utilizing the capacitive coupling effect and carrying out level reset on the grid control voltages through the switching tubes; The output driving module comprises a first transmission gate connected between the first level VDDH and the signal output end OUT and a second transmission gate connected between the second level VDDL and the signal output end OUT, wherein the control ends of the first transmission gate and the second transmission gate respectively receive the corresponding grid control voltage; When the input signal is at a high level, the level conversion control module controls the first transmission gate to be turned on and the second transmission gate to be turned off, and the signal output end OUT outputs the first level VDDH; When the input signal is at a low level, the level shift control module controls the first transmission gate to be turned off and the second transmission gate to be turned on, and the signal output end OUT outputs the second level VDDL.
2. The level shift circuit of claim 1, wherein the input inverting buffer module comprises a first inverter IN1, a second inverter IN2, a third inverter IN3, and a fourth inverter IN4; The input end of the first inverter IN1 is connected with the signal input end IN, and the output end of the first inverter IN1 is respectively connected with the input end of the second inverter IN2 and the input end of the third inverter IN 3; the output end of the second inverter IN2 outputs one path of the internal driving signals, and the output end of the fourth inverter IN4 outputs the other path of the internal driving signals.
3. The level shift circuit with an adjustable output swing according to claim 2, wherein the plurality of capacitors IN the level shift control module include a first capacitor C1, a second capacitor C2, a third capacitor C3 and a fourth capacitor C4, wherein the positive electrode of the first capacitor C1 and the positive electrode of the second capacitor C2 are both connected to the output end of the second inverter IN2, and the positive electrode of the third capacitor C3 and the positive electrode of the fourth capacitor C4 are both connected to the output end of the fourth inverter IN 4.
4. The level shift circuit with an adjustable output swing according to claim 3, wherein the plurality of switch tubes IN the level shift control module comprise a first PMOS tube PM1, a second PMOS tube PM2, a third PMOS tube PM3, a fourth PMOS tube PM4, a first NMOS tube NM1 and a second NMOS tube NM2, wherein a source of the third PMOS tube PM3 is connected to the first level VDDH, a drain is connected to a cathode of the first capacitor C1, a gate is connected to an output end of the fourth inverter IN4, a source of the fourth PMOS tube PM4 is connected to the first level VDDH, a drain is connected to a cathode of the third capacitor C3, a gate is connected to an output end of the second inverter IN2, a source of the first NMOS tube PM1 is connected to the second level VDDL, a drain is connected to a cathode of the second capacitor C2, a gate is connected to an output end of the fourth inverter IN4, a source of the second NMOS tube PM2 is connected to the second level VDDL, a drain is connected to a cathode of the second capacitor C4, and a drain of the second PMOS tube PM2 is connected to an output end of the second capacitor C2.
5. The level shift circuit with adjustable output swing according to claim 4, wherein the first transmission gate is composed of a fifth PMOS tube PM5 and a third NMOS tube NM3, the second transmission gate is composed of a sixth PMOS tube PM6 and a fourth NMOS tube NM4, the source electrode of the fifth PMOS tube PM5 and the source electrode of the third NMOS tube NM3 are both connected with the first level VDDH, the drain electrode of the fifth PMOS tube PM5 and the drain electrode of the third NMOS tube NM3 are both connected with the signal output terminal OUT, the source electrode of the sixth PMOS tube PM6 and the source electrode of the fourth NMOS tube NM4 are both connected with the second level VDDL, and the drain electrode of the sixth PMOS tube PM6 and the drain electrode of the fourth NMOS tube NM4 are both connected with the signal output terminal OUT.
6. The level shift circuit with adjustable output swing according to claim 5, wherein the connection relationship between the gate control voltage and the first and second transmission gates is that the gate of the fifth PMOS tube PM5 is connected to the negative electrode of the third capacitor C3, the gate of the third NMOS tube NM3 is connected to the negative electrode of the second capacitor C2, the gate of the sixth PMOS tube PM6 is connected to the negative electrode of the first capacitor C1, and the gate of the fourth NMOS tube NM4 is connected to the negative electrode of the fourth capacitor C4.
7. The level shift circuit with adjustable output swing according to claim 5, wherein the body ends of the first to sixth PMOS transistors PM1 to PM6 are all connected to the first level VDDH, and the body ends of the first to fourth NMOS transistors NM1 to NM4 are all connected to the second level VDDL.

Description

Level conversion circuit with adjustable output swing Technical Field The present invention relates to the field of integrated circuits, and in particular, to a level shifter circuit with an adjustable output swing. Background The level conversion circuit is a circuit for connecting a digital circuit or an analog circuit in different voltage domains, and the circuit conversion mechanism is a circuit capable of converting a signal in a low voltage domain to a high voltage domain or converting a signal in a high voltage domain to a low voltage domain. In the prior art, as shown in fig. 1, VDD0 is used as a high-voltage power supply voltage, VDD1 is used as a low-voltage domain power supply voltage, and the circuit can convert a digital signal in a VDD0 voltage domain into a digital signal in a VDD1 voltage domain, and the output swing of the circuit is fixed to VDD1, so that the circuit cannot be suitable for a multi-voltage domain circuit. Meanwhile, in the high-speed circuit application, the problem of slow switching speed and high power consumption of a later-stage circuit caused by overlarge output swing is solved. And the switching rate of the rear-stage circuit is improved, so that the jitter of the output signal of the rear-stage circuit can be reduced, and the quality of the output signal can be improved. In conventional designs, the driving capability of the control signal can be increased by a level shift circuit, but the method greatly increases the layout area of the chip. Under the condition of not sacrificing the chip area and the power consumption, the switching time of the working state of the later-stage circuit is shortened by reducing the output swing of the level conversion circuit, so that the switching speed of the circuit state is accelerated. Therefore, how to flexibly adjust the output swing to shorten the switching time and improve the circuit rate without sacrificing the chip area and the power consumption, and to be compatible with the application of multiple voltage domains is a problem to be solved in the current technical field. Disclosure of Invention The invention provides a level conversion circuit with adjustable output swing, which solves the problems of slow switching speed and high power consumption in high-speed application caused by fixed output swing of the level conversion circuit in the prior art, and increased chip area caused by simply increasing the size of a device to increase the speed. In order to solve the problems, the technical scheme adopted by the invention is as follows: a level shift circuit with an adjustable output swing, comprising: the input inverting buffer module is connected with the signal input end IN and is used for receiving an input signal and outputting two paths of internal driving signals with opposite logic levels; the level conversion control module is connected with the input inverting buffer module, the first level VDDH and the second level VDDL, and comprises a plurality of capacitors and a plurality of switching tubes, and is used for converting the internal driving signals into multi-path grid control voltages by utilizing the capacitive coupling effect and carrying out level reset on the grid control voltages through the switching tubes; The output driving module comprises a first transmission gate connected between the first level VDDH and the signal output end OUT and a second transmission gate connected between the second level VDDL and the signal output end OUT, wherein the control ends of the first transmission gate and the second transmission gate respectively receive the corresponding grid control voltage; When the input signal is at a high level, the level conversion control module controls the first transmission gate to be turned on and the second transmission gate to be turned off, and the signal output end OUT outputs the first level VDDH; When the input signal is at a low level, the level shift control module controls the first transmission gate to be turned off and the second transmission gate to be turned on, and the signal output end OUT outputs the second level VDDL. Further, the input inversion buffer module includes a first inverter IN1, a second inverter IN2, a third inverter IN3, and a fourth inverter IN4; The input end of the first inverter IN1 is connected with the signal input end IN, and the output end of the first inverter IN1 is respectively connected with the input end of the second inverter IN2 and the input end of the third inverter IN 3; the output end of the second inverter IN2 outputs one path of the internal driving signals, and the output end of the fourth inverter IN4 outputs the other path of the internal driving signals. Further, the plurality of capacitors IN the level conversion control module include a first capacitor C1, a second capacitor C2, a third capacitor C3 and a fourth capacitor C4, wherein the positive electrode of the first capacitor C1 and the positive electrode of the second capa