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CN-121772782-B - Ceramic substrate structure and integrated packaging structure thereof

CN121772782BCN 121772782 BCN121772782 BCN 121772782BCN-121772782-B

Abstract

The invention provides a ceramic substrate structure and an integrated packaging structure thereof, and belongs to the technical field of packaging. Including base plate body, big chip and little chip, the upper surface of base plate body is provided with first recess and a plurality of pad, and the lower surface is provided with the second recess, and the groove bottom surface of first recess intercommunication second recess is provided with a plurality of metal wire in the second recess, and metal wire passes through the through-hole technique and is connected with the pad electricity, and big chip fixed connection is in the top surface of base plate body, and little chip fixed connection is in the second recess, carries out electricity through wire bonding between big chip, little chip and the metal wire and connects. The invention realizes double-sided packaging of chips through the double-sided groove structure and the multi-layer electrical connection scheme, effectively shortens the signal transmission path, reduces the packaging size, remarkably improves the heat dissipation efficiency and the electrical performance, and is particularly suitable for high-performance chip packaging applications requiring double-sided electrical connection, such as back incidence detectors.

Inventors

  • XU WEIZONG
  • GUO YUE
  • LU HAI
  • ZHOU DONG
  • REN FANGFANG
  • ZHOU FENG

Assignees

  • 南京大学
  • 合肥国家实验室

Dates

Publication Date
20260508
Application Date
20260303

Claims (9)

  1. 1. A ceramic substrate structure is characterized by comprising a substrate plate body (1), a large chip (2) and a small chip (3), The upper surface of the substrate plate body (1) is provided with a first groove (11) and a plurality of bonding pads (12), the plurality of bonding pads (12) are arranged around the edge of the substrate plate body (1), the lower surface of the substrate plate body (1) is provided with a second groove (13), the first groove (11) is communicated with the bottom surface of the second groove (13), a plurality of metal wires (14) are arranged in the second groove (13) corresponding to the plurality of bonding pads (12), the metal wires (14) are electrically connected with the corresponding bonding pads (12) through a through hole technology, the large chip (2) is fixedly connected to the top surface of the substrate plate body (1), the small chip (3) is fixedly connected in the second groove (13), and the large chip (2), the small chip (3) and the metal wires (14) are electrically connected through wire bonding. Be provided with a plurality of metal pipe matrixes (15) on base plate body (1), metal pipe matrixes (15) including protruding arrange in matrix arch (151) of base plate body (1) upper surface and lower surface, be provided with a plurality of pipes (152) along the direction of perpendicular to base plate body (1) link up on matrix arch (151), big chip (2) through the laminating of heat-conducting glue in the top surface of matrix arch (151).
  2. 2. Ceramic substrate structure according to claim 1, characterized in that the metal conduit matrix (15) is provided with four and is arranged in a rectangular array around the first recess (11).
  3. 3. The ceramic substrate structure according to claim 1, wherein the diameter of the conduit (152) ranges from 0.1 to 1mm.
  4. 4. Ceramic substrate structure according to claim 1, characterized in that the first grooves (11) have a depth ranging from 0.2 to 100mm and the second grooves (13) have a depth ranging from 0.5 to 100mm.
  5. 5. The ceramic substrate structure according to claim 1, wherein the shape of the substrate plate body (1) is regular polygon or circular, and the material of the substrate plate body (1) is aluminum oxide or aluminum nitride.
  6. 6. An integrated package structure comprising the ceramic substrate structure according to any one of claims 1 to 5, and further comprising a lead base (4) and a semiconductor refrigerator (5), wherein the semiconductor refrigerator (5) is located below the substrate plate body (1), a cold end of the semiconductor refrigerator (5) is connected with a lower surface of the substrate plate body (1), a hot end of the semiconductor refrigerator (5) is connected with the lead base (4), a plurality of lead posts (41) matched with the bonding pads (12) are penetrated on the lead base (4), and a heat conducting post (42) is arranged at the bottom of the lead base (4).
  7. 7. The integrated package of claim 6, wherein a plurality of the lead posts (41) are circumferentially spaced around the semiconductor refrigerator (5).
  8. 8. The integrated package structure according to claim 6, wherein a ceramic tube (43) is provided on the lead frame (4), and the lead post (41) is inserted into the ceramic tube (43).
  9. 9. The integrated package structure according to claim 6, further comprising a tubular package (6), wherein a cover (61) is provided on top of the package (6), the large chip (2) is a back-incident APD device, a light-transmitting area (62) corresponding to the large chip (2) is provided on the cover (61), the package (6) is covered on the lead base (4) and the cover (61) covers the substrate board body (1) and the lead posts (41).

Description

Ceramic substrate structure and integrated packaging structure thereof Technical Field The invention relates to the technical field of packaging, in particular to a ceramic substrate structure and an integrated packaging structure thereof. Background Chip packaging technology is a key element in the semiconductor manufacturing process, and its core functions are to provide stable electrical connection, reliable physical protection, effective heat dissipation path, and standardized external interfaces for fragile bare chips. The packaging structure not only ensures the signal and power transmission between the chip and the external circuit system, but also determines the mechanical strength, environmental adaptability and overall size of the final electronic component, and is the basis for realizing miniaturization, high-density integration and high performance of modern electronic products. In the current mainstream packaging technology, a single-sided wire bonding process (also called wire bonding) is one of the most widely used interconnection schemes. The technology generally adopts gold wires or copper wires, and utilizes heat pressing, ultrasonic or thermosonic composite energy to connect the front bonding pads of the chip with corresponding welding points on a bearing substrate (such as a lead frame, a ceramic substrate or an organic substrate) point by point. Then, the leads on the substrate guide the electric signals to pins or solder balls of the package shell, so that system integration with the printed circuit board is realized. The technology is widely used for packaging various chips with middle and low pin numbers due to mature technology, low cost and strong adaptability. However, the conventional single-sided wire-bonding package structure has significant inherent defects, which have become a bottleneck restricting further miniaturization and high performance of the product. Firstly, in space layout, all interconnection lines are led out from a single surface of a chip and undergo an upward-outward arc wiring process, which inevitably occupies a three-dimensional space beside and above the chip, so that the overall size of a package is far larger than that of a bare chip, and the increasingly urgent requirements of fields such as consumer electronics, portable equipment and the like for extremely compact packages are difficult to meet. Second, in terms of thermal management, this structure has a problem of low heat dissipation efficiency. The heat generated during the operation of the chip is mainly transferred to the substrate by the back surface or limited wire bonding connection points, and the heat dissipation channel is relatively narrow and has higher heat resistance. If the heat cannot be timely conducted out, the junction temperature of the chip can be quickly increased, and a series of problems such as performance attenuation, service life shortening, reliability reduction and the like are caused. Thermal stresses from high temperatures can also compromise the chip internal structure and bond site integrity, especially in applications where heat generation is large, such as in power devices or photodetectors. Disclosure of Invention The embodiment of the invention provides a ceramic substrate structure and an integrated packaging structure thereof. The technical problems of low space utilization rate and poor heat dissipation effect caused by the existing chip packaging structure and process defects can be solved. The technical scheme is as follows: In a first aspect, embodiments of the present invention provide a ceramic substrate structure comprising a substrate body, a large chip and a small chip, The upper surface of base plate body is provided with first recess and a plurality of pad, a plurality of pad around arrange in the edge of base plate body, the lower surface of base plate body is provided with the second recess, first recess intercommunication the tank bottom face of second recess, correspond in the second recess a plurality of pad is provided with a plurality of metal wire, metal wire pass through the through-hole technique with the pad electricity that corresponds is connected, big chip fixed connection in the top surface of base plate body, little chip fixed connection in the second recess, big chip with carry out electricity through wire bonding between the metal wire. Optionally, be provided with a plurality of metal pipe matrixes on the base plate body, metal pipe matrixes including protruding arrange in base plate body upper surface and lower surface's matrix arch, on the matrix arch along the perpendicular to base plate body's direction link up and be provided with a plurality of pipes, big chip pass through the heat-conducting glue laminate in the bellied top surface of matrix. Optionally, the metal conduit matrix is provided with four and arranged in a rectangular array around the first groove. Optionally, the diameter of the conduit ranges from 0.1 to 1mm. O