CN-121973345-A - BC silicon wafer edge breakage cutting method for improving adhesive surface

CN121973345ACN 121973345 ACN121973345 ACN 121973345ACN-121973345-A

Abstract

The invention discloses a BC silicon wafer edge breakage cutting method for improving a glue surface, which relates to the technical field of wire cutting and comprises the following steps of firstly placing a BC silicon wafer on a stage of a wire cutting machine, secondly cutting the BC silicon wafer in a three-section and sectional manner according to the structural constitution of the BC silicon wafer, thirdly collecting data of BC silicon wafer wire cutting processing, fourthly establishing a BC silicon wafer cutting simulation model according to the data collected during BC silicon wafer wire cutting processing, and fifthly analyzing the BC silicon wafer cutting condition in real time according to the BC silicon wafer cutting simulation model established in the fourth step and optimizing BC silicon wafer wire cutting processing parameters. The invention utilizes a BC silicon wafer to improve the glue surface edge breakage cutting method, improves the technological parameters by confirming and researching the cutting depth of a cutting line contacting a glue layer, reduces the line speed in advance, prevents the edge breakage from being produced, adjusts the basic cutting parameters, and simulates by a BC silicon wafer cutting simulation model to obtain the optimized BC silicon wafer cutting parameters.

Inventors

DU MENGJUN
Wan Xiaole
TANG QI
GUO XIANG
FU MINGQUAN

Assignees

广州高景太阳能科技有限公司
广东金湾高景太阳能科技有限公司
高景太阳能股份有限公司

Dates

Publication Date: 20260505
Application Date: 20260224

Claims (10)

1. A BC silicon wafer edge breakage cutting method for improving glue surface is characterized by comprising the following specific steps: Placing a BC silicon wafer on an objective table of a linear cutting machine, and installing a detection instrument on the linear cutting machine for real-time data detection on BC silicon wafer cutting; Step two, performing three-section sectioning on the BC silicon wafer according to the structural constitution of the BC silicon wafer, wherein the speed of the BC silicon wafer cutting line is gradually reduced according to the sectioning sequence, and the stage speed of the wire cutting machine for conveying the BC silicon wafer is gradually reduced; Step three, data of BC silicon wafer linear cutting processing are collected, and BC silicon wafer sectional cutting parameters in the step two are set as basic cutting parameters; establishing a BC silicon wafer cutting simulation model according to data acquired during BC silicon wafer linear cutting processing, and simulating BC silicon wafer cutting processing by using the BC silicon wafer cutting simulation model; And fifthly, analyzing the BC silicon wafer cutting situation in real time according to the BC silicon wafer cutting simulation model established in the fourth step, and optimizing BC silicon wafer linear cutting processing parameters according to the BC silicon wafer cutting analysis situation.
2. The method for improving glue surface edge breakage cutting of the BC silicon wafer is characterized in that the three-section cutting of the BC silicon wafer in the second step comprises a first section cutting, a second section cutting and a third section cutting, wherein the first section cutting is used for cutting the BC silicon wafer by 0-200mm, the wire feeding speed of a wire cutting machine is 500-2100m/min during the first section cutting, a new wire which is stored by a wire winding wheel on the wire cutting machine is firstly stored in the first section cutting, the wire feeding is reversely carried out to the wire releasing wheel end on the wire cutting machine, and the table speed of the wire cutting machine for feeding the BC silicon wafer during the first section cutting is 1500-2700 um/min.
3. The method for improving the glue surface edge breakage cutting of the BC silicon wafer is characterized in that the second-stage cutting is cutting of 200-218.8mm of the BC silicon wafer, the wire feeding speed of a wire cutting machine is 2200-1450m/min during the second-stage cutting, the wire feeding speed of the wire cutting machine is forward wire feeding cutting of 9km old wire on a wire paying-off wheel on the wire cutting machine to a wire receiving wheel end on the wire cutting machine during the second-stage cutting, and the wire cutting machine feeds the BC silicon wafer during the second-stage cutting is 1800-150 um/min.
4. The method for improving the glue surface edge breakage cutting of the BC silicon wafer according to claim 3, wherein the third-stage cutting is cutting the BC silicon wafer 218.8-219.6mm, the wire feeding speed of the wire cutting machine is between 1400-1500m/min during the third-stage cutting, the 4km secondary old wire on a wire take-up pulley of the wire cutting machine is reversely fed to the wire paying-off pulley end during the third-stage cutting, and the feeding speed of the wire cutting machine to the BC silicon wafer is between 90-110um/min during the third-stage cutting.
5. The method for improving the edge breakage of the adhesive surface of the BC silicon wafer according to claim 4, wherein the data of the BC silicon wafer wire cutting processing comprises BC silicon wafer feeding position, wire speed, bench speed, wire feeding amount, wire returning amount, cooling liquid flow, BC silicon wafer and cutting line temperature, cutting line to BC silicon wafer cutting video and tension when the cutting line works, the cutting line to BC silicon wafer cutting video further comprises cross section picture information after the BC silicon wafer is cut, the basic cutting parameters comprise BC silicon wafer feeding position, wire speed, bench speed, wire feeding amount, wire returning amount and cooling liquid flow, and the basic cutting parameters are used for providing basic data for the follow-up optimization of BC silicon wafer wire cutting processing parameters.
6. The method for improving the edge chipping and cutting of the adhesive surface of the BC silicon wafer according to claim 5, wherein the establishment of the BC silicon wafer cutting simulation model in the fourth step comprises the following steps: S4.1, carrying out data processing and characteristic parameter extraction on the collected BC silicon wafer linear cutting processing data; S4.2, building a geometric model through three-dimensional modeling software, logically defining a module of the geometric model motion through a physical field and a mathematical model, and setting parameters of the defined geometric model according to extracted characteristic parameters to form a BC silicon wafer cutting simulation model; S4.3, inputting the existing BC silicon wafer linear cutting process parameters, verifying the BC silicon wafer cutting simulation model, and optimizing parameters set by the geometric model according to a verification result; and S4.4, simulating BC silicon wafer cutting by using a BC silicon wafer cutting simulation model, and obtaining a simulation result.
7. The method for improving the glue surface edge breakage cutting of the BC silicon wafer is characterized in that in the step S4.4, when the BC silicon wafer linear cutting is simulated by using a BC silicon wafer cutting simulation model, basic cutting parameters are firstly adjusted, the adjusted basic cutting parameters are input into the BC silicon wafer cutting simulation model, the BC silicon wafer cutting simulation model is enabled to conduct BC silicon wafer linear cutting simulation, simulation results are output, the adjusted basic cutting parameters are input into a linear cutting machine, the linear cutting machine is enabled to conduct linear machining cutting on the BC silicon wafer by using the adjusted basic cutting parameters, BC silicon wafer linear cutting machining results are obtained, the BC silicon wafer linear machining cutting results are used for verifying simulation results, the BC silicon wafer cutting simulation model is optimized again according to difference of comparison results until the BC silicon wafer cutting simulation model is within an allowable error range of BC silicon wafer cutting simulation results and BC linear machining cutting results.
8. The method for improving the glue surface edge breakage cutting of the BC silicon wafer according to claim 7, wherein after the BC silicon wafer cutting simulation model is subjected to double verification and optimization, basic cutting parameters are adjusted to obtain a plurality of groups of simulation cutting parameter comparison groups, the plurality of groups of simulation cutting parameters are input into the BC silicon wafer cutting simulation model, so that the BC silicon wafer cutting simulation model carries out a plurality of groups of BC silicon wafer linear cutting simulation, and a plurality of groups of BC silicon wafer linear cutting simulation results are obtained.
9. The method for improving glue surface edge breakage cutting of BC silicon chips according to claim 8, wherein a plurality of groups of BC silicon chip linear cutting simulation results are processed, firstly, simulation results with edge breakage during the linear cutting of the simulated BC silicon chips are removed, then the simulation results with the linear cutting efficiency of the simulated BC silicon chips lower than that of the BC silicon chips according to basic cutting parameters are removed, optimized simulation results are obtained, files are packed, labeling and coding are carried out on the files, the simulation cutting parameters corresponding to the optimized simulation results are contained in the files, then the simulation cutting parameters in the files are input to a linear cutting machine, actual linear cutting results are obtained, the optimized simulation results in the files are verified, and the verification results are packed into the files corresponding to labeling and coding.
10. The method for improving the glue surface edge breakage cutting of the BC silicon wafer is characterized in that in the fifth step, the BC silicon wafer cutting analysis condition is analyzed, an optimized simulation result is compared with an actual linear cutting result, whether the error of the optimized simulation result is within an error allowable range or not is judged first, when the error of the optimized simulation result and the actual linear cutting result is beyond the error allowable range, an invalid optimized simulation result is considered, when the error of the optimized simulation result and the actual linear cutting result is not beyond the error allowable range, an effective optimized simulation result is considered, the rest effective optimized simulation results are compared, the effective optimized simulation result with small mechanical kinetic energy consumption is selected, and the material consumption is small is used as a final optimized BC silicon wafer linear cutting processing parameter to be output.

Description

BC silicon wafer edge breakage cutting method for improving adhesive surface Technical Field The invention relates to the technical field of wire cutting, in particular to a method for improving glue surface edge breakage cutting of a BC silicon wafer. Background The BC silicon wafer is a core substrate of a back contact solar cell, particularly a low-oxygen high-resistance N-type silicon wafer for the BC cell, has the most remarkable characteristics of extremely low doping concentration, realizes high minority carrier lifetime and photoelectric conversion efficiency by optimizing the purity, oxygen content and crystal structure of the silicon wafer, and is a key material for supporting the BC cell to be close to the theoretical efficiency limit. The cost reduction and synergy are main melodies of the photovoltaic industry, the thinning propulsion is a main technical route for continuously reducing the cost of silicon wafer cutting, the thinning cutting is performed at the middle part or two side positions of an adhesive surface, however, in the cutting processing process, due to the physical characteristic difference of an adhesive layer and a silicon wafer body, the problem of edge breakage of the adhesive surface is easily caused by cutting stress concentration, the product qualification rate is seriously influenced, in addition, the traditional linear cutting technology adopts a single parameter cutting mode, dynamic parameter adjustment is not performed according to the structural characteristics of the BC silicon wafer, such as adhesive layer distribution and thickness change, and the traditional technology usually depends on the experience adjustment parameters of staff, lacks data-driven quantitative analysis, has high trial-and-error cost, is difficult to balance cutting efficiency and edge breakage risk, and further has certain defect. Disclosure of Invention The invention aims to provide a BC silicon wafer edge breakage cutting method for improving a glue surface, so as to solve the problems in the background technology. In order to achieve the purpose, the invention provides the following technical scheme that the BC silicon wafer edge breakage cutting method for improving the glue surface comprises the following specific steps: Placing a BC silicon wafer on an objective table of a linear cutting machine, and installing a detection instrument on the linear cutting machine for real-time data detection on BC silicon wafer cutting; Step two, performing three-section sectioning on the BC silicon wafer according to the structural constitution of the BC silicon wafer, wherein the speed of the BC silicon wafer cutting line is gradually reduced according to the sectioning sequence, and the stage speed of the wire cutting machine for conveying the BC silicon wafer is gradually reduced; Step three, data of BC silicon wafer linear cutting processing are collected, and BC silicon wafer sectional cutting parameters in the step two are set as basic cutting parameters; establishing a BC silicon wafer cutting simulation model according to data acquired during BC silicon wafer linear cutting processing, and simulating BC silicon wafer cutting processing by using the BC silicon wafer cutting simulation model; And fifthly, analyzing the BC silicon wafer cutting situation in real time according to the BC silicon wafer cutting simulation model established in the fourth step, and optimizing BC silicon wafer linear cutting processing parameters according to the BC silicon wafer cutting analysis situation. Preferably, the three-section cutting of the BC silicon chip in the second step comprises a first section cutting, a second section cutting and a third section cutting, wherein the first section cutting is to cut the BC silicon chip by 0-200mm, the wire feeding speed range of the wire cutting machine is 500-2100m/min in the first section cutting, the new 10km wire stored by the wire winding wheel on the wire cutting machine is reversely fed to the wire releasing wheel end on the wire cutting machine in the first section cutting, and the feeding speed range of the wire cutting machine to the BC silicon chip in the first section cutting is 1500-2700 um/min. Preferably, the second section cutting is cutting the BC silicon chip 200-218.8mm, the wire feeding speed of the wire cutting machine is in the range of 2200-1450m/min during the second section cutting, the first 9km old wire on the paying-off wheel on the wire cutting machine is fed and cut forward to the wire receiving wheel end on the wire cutting machine during the second section cutting, and the speed of the wire cutting machine feeding the BC silicon chip is in the range of 1800-150um/min during the second section cutting. Preferably, the third section cutting is cutting the BC silicon chip 218.8-219.6mm, the wire feeding speed of the wire cutting machine ranges from 1400 m/min to 1500m/min during the third section cutting, the second-time old wire of 4km on t