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CN-121976171-A - Method for synthesizing intercalation doped graphene at low temperature

CN121976171ACN 121976171 ACN121976171 ACN 121976171ACN-121976171-A

Abstract

The invention discloses a method for synthesizing intercalation doped graphene at low temperature, which comprises the following steps of S1, providing a semiconductor substrate, forming a copper interconnection structure on the semiconductor substrate, exposing the surface of the copper interconnection structure and the surface of an insulating medium surrounding the copper interconnection structure together, S2, carrying out annealing pretreatment on the semiconductor substrate, removing an oxide layer on the surface of the semiconductor substrate, exposing the catalytic surface, S3, taking benzene/acetylene as mixed carbon source gas, ar/H 2 as auxiliary gas, reacting at 300-400 ℃, and selectively growing multiple graphene layers on the surface of the copper interconnection structure, and S4, carrying out post intercalation doping treatment on the graphene layers to form an intercalation doped structure. The high-efficiency and stable body doping of the multilayer graphene is realized through gas phase intercalation, the conductivity of a graphene layer is improved, and the reliability of a device is improved.

Inventors

  • Ai pu

Assignees

  • 重庆芯联微电子有限公司

Dates

Publication Date
20260505
Application Date
20251224

Claims (10)

  1. 1. The method for synthesizing the intercalated doped graphene at low temperature is characterized by comprising the following steps of: s1, providing a semiconductor substrate, wherein a copper interconnection structure is formed on the semiconductor substrate, and the surface of the copper interconnection structure is commonly exposed with the surface of an insulating medium surrounding the copper interconnection structure; s2, carrying out annealing pretreatment on the semiconductor substrate, removing an oxide layer on the surface of the semiconductor substrate, and exposing the catalytic surface; S3, placing the pretreated semiconductor substrate in an anaerobic normal pressure chemical vapor deposition system, taking benzene/acetylene as a mixed carbon source gas, taking Ar/H 2 as an auxiliary gas, reacting at 300-400 ℃, and selectively growing a plurality of graphene layers on the surface of the copper interconnection structure; and S4, performing post-intercalation doping treatment on the graphene layer to form an intercalation doping structure.
  2. 2. The method for synthesizing intercalated doped graphene at a low temperature according to claim 1, wherein in step S3, the volume flow rate of the mixed carbon source gas is 0.3% -1.5% of the total gas flow rate.
  3. 3. The method for synthesizing intercalated doped graphene at a low temperature according to claim 2, wherein in step S3, the volume flow ratio of benzene to acetylene is 2:1, and the volume flow ratio of ar to H 2 is 4:1.
  4. 4. The method of claim 1, wherein in step S3, the reaction time is 30 min-60: 60 min, and the thickness of the graphene layer is 2-nm-10: 10 nm.
  5. 5. The method for synthesizing intercalated doped graphene at low temperature according to claim 1, wherein in step S1, the copper interconnection structure is prepared by a dual damascene process, and the preparation process is as follows: Etching the semiconductor substrate to form a groove, and sequentially depositing a barrier layer in the groove and filling electroplated copper; Surface planarization is performed by chemical mechanical polishing to co-expose the copper interconnect structure surface with the insulating dielectric surface surrounding the copper interconnect structure.
  6. 6. The method of claim 5, wherein the semiconductor substrate comprises a substrate, a first silicon carbonitride layer, a low-k dielectric layer, a second silicon carbonitride layer, a silicon oxide layer and a titanium nitride layer from bottom to top in sequence; And the chemical mechanical polishing is carried out until the low-dielectric constant dielectric layer and the copper interconnection structure are jointly exposed.
  7. 7. The method for synthesizing intercalated doped graphene at a low temperature according to claim 1, wherein in step S2, the annealing pretreatment process is to place the semiconductor substrate in a mixed atmosphere of H 2 /Ar, and anneal 30 min-60 min at 280-320 ℃.
  8. 8. The method of synthesizing intercalated doped graphene at low temperature of claim 7, wherein in step S2, the volume ratio of Ar to H 2 of the annealing pretreatment is 1:1.
  9. 9. The method for synthesizing intercalated doped graphene at low temperature according to claim 1, wherein in step S4, the post-intercalation doping treatment process is as follows: and placing the semiconductor substrate growing with the multilayer graphene in a vacuum cavity, introducing intercalating agent vapor, and preserving heat at 200-250 ℃ for 15 min-30 min to form the intercalation doping structure.
  10. 10. The method of low temperature synthesis of intercalated doped graphene according to claim 9, wherein the intercalating agent vapor is FeCl 3 vapor or Br 2 vapor.

Description

Method for synthesizing intercalation doped graphene at low temperature Technical Field The invention belongs to the field of semiconductors, and particularly relates to a method for synthesizing intercalation doped graphene at a low temperature. Background As integrated circuit feature sizes enter advanced process nodes, copper interconnect technology faces serious challenges, metal linewidths are continually narrowed to increase resistivity of copper and Electromigration (EM) failure is accelerated, and in addition, conventional tantalum/tantalum nitride barrier layers can inhibit copper diffusion, but need to maintain a certain thickness, so that the volume of effective conductive copper is smaller, further exacerbating resistance-capacitance delay (RC delay). Graphene is regarded as an ideal copper capping layer material due to the characteristics of high electrical conductivity, high thermal conductivity and the like, however, the existing CVD graphene growing method is usually carried out under a high temperature condition and exceeds the limit of back end of line (BEOL) temperature, in addition, the uniformity of large-area preparation is poor, an efficient and stable doping means is lack for a multilayer graphene structure, and the advantage that the resistivity of the multilayer graphene is reduced along with the thickness cannot be fully exerted. Therefore, a method for synthesizing intercalation doped graphene at low temperature is needed to prepare high-efficiency conductive multilayer graphene, reduce interconnection resistance and improve device reliability. Disclosure of Invention The invention aims to solve all or part of the problems, and provides a method for synthesizing intercalation doped graphene at low temperature, which is characterized in that graphene is selectively grown on the surface of copper interconnection at low temperature through a benzene/acetylene mixed carbon source, so that thermal damage to low dielectric constant media and the existing device structure is avoided; the high-efficiency and stable body doping of the multilayer graphene is realized through a gas phase intercalation technology, the conductivity of the graphene layer is improved, the resistance is reduced, the electromigration is inhibited, and the reliability of the device is improved. The invention provides a method for synthesizing intercalation doped graphene at low temperature, which comprises the following steps of S1, providing a semiconductor substrate, forming a copper interconnection structure on the semiconductor substrate, enabling the surface of the copper interconnection structure and the surface of an insulating medium surrounding the copper interconnection structure to be jointly exposed, S2, carrying out annealing pretreatment on the semiconductor substrate, removing an oxide layer on the surface of the semiconductor substrate, exposing a catalytic surface, S3, placing the pretreated semiconductor substrate in an anaerobic normal pressure chemical vapor deposition system, taking benzene/acetylene as a mixed carbon source gas, carrying out reaction at 300-400 ℃ by taking Ar/H 2 as an auxiliary gas, and selectively growing a plurality of graphene layers on the surface of the copper interconnection structure, and S4, carrying out post-intercalation doping treatment on the graphene layers to form the intercalation doped structure. Graphene is selectively grown on the surface of the copper interconnection at a low temperature through a benzene/acetylene mixed carbon source, so that thermal damage to a low dielectric constant medium and an existing device structure is avoided, photoetching or transferring is not required, and plasma damage is avoided. In the step S3, the volume flow of the mixed carbon source gas is 0.3% -1.5% of the total flow of the gas. And improving the growth selectivity of the graphene layer to obtain the high-quality graphene layer. In the step S3, the volume flow ratio of benzene to acetylene is 2:1, and the volume flow ratio of Ar to H 2 is 4:1. The cracking characteristics of the copper interconnection structure and the low-k dielectric interface are cooperatively exerted, so that excellent selectivity of the copper interconnection structure and the low-k dielectric interface is ensured, and the low-temperature growth process has good process repeatability and uniformity, so that high-quality multilayer graphene layer growth is realized. In the step S3, the reaction time is 30 min-60 min, and the thickness of the obtained graphene layer is 2 nm-10 nm. The higher conductivity of the graphene is maintained, and meanwhile, the resistance of the copper interconnection structure is reduced. The copper interconnection structure is prepared through a dual damascene process, and the preparation process comprises the steps of etching the semiconductor substrate to form a groove, sequentially depositing a blocking layer in the groove and electroplating copper for filling, and ca