CN-121976294-A - Monocrystalline silicon epitaxial wafer with low haze pattern and preparation method thereof

CN121976294ACN 121976294 ACN121976294 ACN 121976294ACN-121976294-A

Abstract

The invention discloses a monocrystalline silicon epitaxial wafer with a low haze pattern and a preparation method thereof, and belongs to the technical field of semiconductor silicon wafer manufacturing. The method comprises the steps of selecting a (100) crystal face monocrystalline polished silicon wafer with a crystal direction deviation angle smaller than 0.3 degrees as a substrate, wherein the substrate has high COP defect density, the number of COP sizes under a specific detection scale is obviously higher than that of conventional monocrystalline polished silicon wafers, for example, for a 300mm substrate, the COP defect density is 2000-12000 under a 26nm detection scale, and epitaxially growing a monocrystalline silicon layer on the substrate by adopting a chemical vapor deposition process to obtain the monocrystalline silicon epitaxial wafer with a low-haze pattern on the surface. According to the invention, the regular distribution of atomic steps of the substrate is broken by high COP defects, so that the spatial frequency distribution is changed from discrete peaks to continuous spectrums, the surface light scattering property is changed, the defogging pattern is fundamentally eliminated, the surface haze value of the epitaxial wafer is lower than 1, the process compatibility is strong, and the method is easy for industrial application.

Inventors

ZHANG XIN
LIANG XINGBO
GAO PENGFEI
ZHANG JUNYUAN
ZHOU HANG
ZHU CHAO

Assignees

金瑞泓微电子(衢州)有限公司

Dates

Publication Date: 20260505
Application Date: 20260408

Claims (9)

1. A low haze patterned single crystal silicon epitaxial wafer, the single crystal silicon epitaxial wafer comprising: A substrate which is a (100) crystal face monocrystalline polished silicon wafer with a crystal orientation deviation angle smaller than 0.3 degrees; and a monocrystalline silicon epitaxial layer formed on the substrate by epitaxial growth; And under the detection of a laser scattering surface defect detector, the surface haze value of the epitaxial layer is less than or equal to 1, and no identifiable haze pattern exists; the surface of the substrate presents high COP defect density before epitaxial growth, and the high COP defect breaks the regular distribution of atomic steps on the surface of the substrate.
2. A low haze patterned single crystal silicon epitaxial wafer according to claim 1 wherein the COP has a size in the range of 30nm to 150nm.
3. The low haze patterned single crystal silicon epitaxial wafer of claim 2, wherein the high COP defect density is determined by a laser scattering surface defect detector at a specific detection scale: for a substrate with the diameter of 300mm, the COP defect density is 2000-12000 under the detection scale of 26 nm; for a substrate with the diameter of 200mm, the COP defect density is 200-1000 under the detection scale of 65 nm; for a substrate with a diameter of 150mm, the COP defect density is 100-800 under a detection scale of 100 nm.
4. A method of preparing a low haze patterned single crystal silicon epitaxial wafer according to any of claims 1-3 comprising at least the steps of: selecting a (100) crystal face monocrystalline polished silicon wafer as a substrate, wherein the crystal direction off angle of the substrate is controlled below 0.3 DEG, and the substrate has the high COP defect density; and (2) epitaxial growth, namely, carrying out epitaxial growth of monocrystalline silicon on the substrate selected in the step (1) to obtain the monocrystalline silicon epitaxial wafer with the low haze pattern.
5. The method for preparing a low haze patterned single crystal silicon epitaxial wafer according to claim 4, wherein the epitaxial growth is performed by chemical vapor deposition, the silicon source for epitaxial growth is trichlorosilane or silane, the growth temperature is controlled at 1050-1150 ℃, the growth rate is 1-5 μm/min, and the epitaxial layer thickness is 2-300 μm.
6. The method for preparing a low haze patterned single crystal silicon epitaxial wafer according to claim 5, wherein the cooling rate is controlled to be 5-15 ℃/min when cooling after the epitaxial growth is completed.
7. The method for producing a low haze patterned single crystal silicon epitaxial wafer according to claim 4, wherein the epitaxial wafer is subjected to RCA cleaning and spin-drying after epitaxial growth.
8. The method for preparing a low haze patterned single crystal silicon epitaxial wafer according to claim 4, wherein the polishing and cleaning process of the substrate before epitaxial growth is performed by single-sided polishing treatment and weakly alkaline cleaning solution combined with megasonic cleaning.
9. A semiconductor device comprising a low haze patterned single crystal silicon epitaxial wafer according to any one of claims 1-3.

Description

Monocrystalline silicon epitaxial wafer with low haze pattern and preparation method thereof Technical Field The invention belongs to the technical field of semiconductor silicon wafer manufacturing, in particular relates to a monocrystalline silicon epitaxial wafer with a low haze pattern and a preparation method thereof, and particularly relates to a method for eliminating or remarkably reducing the haze pattern (Haze patten) on the surface of an epitaxial wafer caused by the regular distribution of atomic steps on the surface of a (100) crystal face substrate and the epitaxial wafer prepared by the method. Background In the semiconductor industry, a (100) crystal face monocrystalline silicon wafer is one of the most commonly used substrate materials in integrated circuit manufacturing due to excellent electrical properties and process suitability. It is generally required to epitaxially grow a high-quality single crystal silicon thin film on a single crystal silicon substrate by Chemical Vapor Deposition (CVD) or the like. For substrates with a (100) crystal plane as the main face, in order to promote a step flow pattern during epitaxial growth and to obtain a flat surface, the main face is typically biased towards a specific crystal orientation (e.g. <110 >) by a small angle, typically 0.1 ° to 1 °. When a (100) crystal plane substrate with a smaller off-angle (for example, less than 0.3 °) is used, although a surface closer to a perfect crystal plane can be theoretically obtained, a special "haze pattern (Haze patten)" often appears in the surface defect detection of the actually prepared epitaxial wafer. The pattern is characterized by haze signals which are regularly distributed in a specific direction and are higher than the background, and the macroscopic uniformity of the surface of the epitaxial wafer is affected. This haze pattern is not directly caused by particles or conventional crystal defects (e.g., dislocations, faults) and therefore conventional cleaning or growth process optimizations are difficult to eliminate. The existence of excessive haze or haze patterns can lead to the enhancement of scattered light on the surface of an epitaxial wafer, thereby not only affecting the precision of the subsequent precision processing processes such as photoetching and the like, but also reducing the yield and reliability of devices. In order to solve the surface quality problem of small off-angle (100) crystal plane single crystal silicon substrate epitaxy, it is generally focused on optimizing the epitaxial growth process parameters such as temperature, pressure, gas flow, etc., or by improving polishing, performing special pretreatment such as high temperature annealing on the substrate surface. However, these methods can only be reduced to some extent, cannot cope with the defogging pattern, are difficult to meet the use requirements of high-precision devices, and often have narrow process window and poor repeatability. Therefore, a technical solution capable of solving the problem in a targeted manner is needed to realize the preparation of the low-haze epitaxial wafer without the haze pattern. Disclosure of Invention In order to overcome the problems in the prior art, the inventor finds that the formation of the haze pattern of the (100) crystal face substrate with the deflection angle smaller than 0.3 degrees is directly derived from the regular distribution of initial atomic steps on the surface of the substrate in long-term research and process practice, and on the basis of the finding, the invention aims to provide a monocrystalline silicon epitaxial wafer with a low haze pattern and a preparation method thereof. For the monocrystalline silicon wafer with the (100) crystal face with the crystal direction deviation angle smaller than 0.3 degrees, the silicon epitaxial wafer with the low-haze pattern is formed after epitaxy by breaking the regular distribution of the initial atomic steps on the surface of the monocrystalline silicon wafer from the source of haze formation. When the crystal direction deviation angle of the (100) crystal face monocrystalline silicon wafer is controlled below 0.3 degrees, the surface of the substrate can form single-atom steps which are regularly distributed in the [110] direction, and form double-atom steps which are regularly distributed in other directions deviating from the [110] direction, namely the distribution frequency of the single-atom steps and the double-atom steps in space is different in different crystal direction. For example, researchers find that under the condition that the off angle of a (100) crystal face monocrystalline silicon wafer is smaller than 0.3 degrees, only a region with the off angle direction of [110] and the off angle of 0.1-0.2 degrees can show a double-layer atomic step structure, and the surface of the region slightly deviates from the [110] by more than 0.2 degrees. On the basis of the knowledge of the atomic step regulari