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CN-121978491-A - Trap characterization method and device of SiC MOSFET device based on body diode

CN121978491ACN 121978491 ACN121978491 ACN 121978491ACN-121978491-A

Abstract

The embodiment of the specification provides a trap characterization method and device of a SiC MOSFET device based on a body diode, wherein the method comprises the steps of 1, connecting the SiC MOSFET device placed in a constant-temperature environment through test equipment, 2, applying gate filling voltage and drain voltage to the SiC MOSFET device through the test equipment to fill the trap to the SiC MOSFET device, 3, applying gate test voltage and body diode test current to the trap release stage through the test equipment to measure transient response curves of the body diode voltage, 4, repeating the steps 1-3 to obtain a plurality of transient voltage curves at different temperatures, 5, fitting the plurality of transient voltage curves to extract a time constant spectrum of the trap, and calculating trap energy levels by adopting Arrheni Wu Sigong to characterize the trap based on the time constant spectrum of the trap.

Inventors

  • LI XUAN
  • LIU XINYU
  • WANG XINHUA
  • FENG YUXIN
  • BAI YUN
  • TANG YIDAN

Assignees

  • 中国科学院微电子研究所

Dates

Publication Date
20260505
Application Date
20251224

Claims (9)

  1. 1. A method for trap characterization of a body diode based SiC MOSFET device, comprising: step 1, connecting a SiC MOSFET device placed in a constant temperature environment through test equipment; Step 2, applying a gate filling voltage and a drain voltage to the SiC MOSFET device through test equipment, and performing trap filling on the SiC MOSFET device; Step 3, applying a grid test voltage and a body diode test current in a trap release stage through test equipment, and measuring a transient response curve of the body diode voltage; step 4, repeating the steps 1-3 to obtain a plurality of transient voltage curves at different temperatures; and 5, fitting the transient voltage curves, extracting a time constant spectrum of the trap, and calculating the trap energy level by adopting an Arrheniv Wu Sigong formula based on the time constant spectrum of the trap to perform trap characterization.
  2. 2. The method according to claim 1, wherein the temperature of the isothermal environment is in the range of 30 ℃ to 80 ℃.
  3. 3. The method of claim 1, wherein applying a gate fill voltage and a drain voltage to the SiC MOSFET device by a test apparatus, trap filling the SiC MOSFET device specifically comprises: And applying a gate filling voltage and a drain voltage to the SiC MOSFET device through test equipment, and performing trap filling on the SiC MOSFET device, wherein the gate filling voltage V GSF ranges from-30V to 30V, and the filling time t f ranges from 1 s to 500 s.
  4. 4. The method according to claim 1, wherein measuring the transient response curve of the body diode voltage by the test device applying the gate test voltage and the body diode test current during the trap release phase comprises: The transient response curve of the body diode voltage is measured by the test apparatus applying the gate test voltage V GSM in the range of-30V to 0V and the body diode test current I SD in the range of 1 mA to 100 mA and the body diode test current during the trap release phase, the test time t m in the range of 10 s to 1000 s, and the minimum sampling accuracy of the transient response curve is 10 ms.
  5. 5. The method according to claim 1, wherein obtaining a plurality of transient voltage curves at different temperatures comprises: obtaining a plurality of transient voltage curves at different temperatures, wherein the number N of temperature points is more than or equal to 5.
  6. 6. The method of claim 1, wherein fitting the plurality of transient voltage curves to extract a time constant spectrum of the trap comprises: And carrying out noise reduction treatment on the transient voltage curves by adopting an exponential fitting or polynomial fitting method, and extracting a time constant spectrum of the trap through differential operation in a semi-logarithmic coordinate system.
  7. 7. The method of claim 1, wherein the Arrhenius formula has an abscissa of ln (T 2 tau) and an ordinate of 1/kT, where T is temperature, tau is a time constant, and k is a Boltzmann constant.
  8. 8. The method of claim 7, wherein calculating trap energy levels using Arrhenius Wu Sigong for trap characterization specifically comprises: the trap level Ea is obtained by linear fitting of slopes using the arrhenius formula, with Ea ranging from 0.01 eV to 1 eV.
  9. 9. A trap characterization apparatus for a body diode based SiC MOSFET device, comprising: the constant temperature equipment is used for providing a constant temperature environment for the SiC MOSFET device; the test equipment is used for connecting the SiC MOSFET device in a constant temperature environment, applying a gate filling voltage and a drain voltage to the SiC MOSFET device, and performing trap filling on the SiC MOSFET device; the calculating module is used for carrying out fitting processing on the transient voltage curves, extracting a time constant spectrum of the trap, and calculating the trap energy level by adopting an Arrhenii Wu Sigong type based on the time constant spectrum of the trap to carry out trap characterization.

Description

Trap characterization method and device of SiC MOSFET device based on body diode Technical Field The present document relates to the technical field of semiconductor devices, and in particular, to a trap characterization method and apparatus for a body diode-based SiC MOSFET device. Background Silicon carbide (SiC) materials have the advantages of large forbidden bandwidth, high electron mobility and high thermal conductivity, and have become the focus of attention in the fields of new energy sources, power electronic devices and the like. However, due to the presence of the C element, the surface dangling bonds exist at the gate oxide layer and the SiC/SiO 2 interface in the device structure, defects related to carbon clusters, near-interface oxide layer defects (NITs) and other defect trapping problems, and compared with the conventional Si/SiO 2 interface state, the interface state density of the SiC MOSFET can be about one to two orders of magnitude higher. The interface state charge traps trap charge which reduces the channel carrier density of the device and forms charged centers which result in lower channel carrier mobility, which is only 5% of the bulk mobility. In addition, the defect trap in the gate dielectric can also cause the phenomena of increased gate leakage current, unstable threshold voltage and the like, and greatly limits the application and development of the SiC MOSFET device. At present, the characterization mode of the trap effect of the SiC MOSFET mainly comprises a high-low frequency CV test, a conductivity method, a pulse transfer characteristic test, a noise characteristic test, a time curve test and the like. The high-low frequency CV test is a common interface state density (Dit) test method. It only provides information on the interface trapping charge density, and not on the trapping cross section. And additional SiC MOS capacitance needs to be fabricated. The energy level of the trap inside the SiC MOSFET can be obtained by using test methods such as low-frequency noise test (LFN), random telegraph noise, 1/f noise and the like, however, the error caused by intrinsic noise is difficult to eliminate by the corresponding noise characteristic test, and meanwhile, the trap position and physical source cannot be comprehensively analyzed. The extra gate voltage applied by the conventional transient time domain curve during the trap release phase test affects oxide trap release, thereby reducing the accuracy of trap level extraction. Disclosure of Invention The invention aims to provide a trap characterization method and device of a SiC MOSFET device based on a body diode, and aims to solve the problems in the prior art. The invention provides a trap characterization method of a SiC MOSFET device based on a body diode, which comprises the following steps: step 1, connecting a SiC MOSFET device placed in a constant temperature environment through test equipment; Step 2, applying a gate filling voltage and a drain voltage to the SiC MOSFET device through test equipment, and performing trap filling on the SiC MOSFET device; Step 3, applying a grid test voltage and a body diode test current in a trap release stage through test equipment, and measuring a transient response curve of the body diode voltage; step 4, repeating the steps 1-3 to obtain a plurality of transient voltage curves at different temperatures; and 5, fitting the transient voltage curves, extracting a time constant spectrum of the trap, and calculating the trap energy level by adopting an Arrheniv Wu Sigong formula based on the time constant spectrum of the trap to perform trap characterization. The invention provides a trap characterization device of a SiC MOSFET device based on a body diode, which comprises the following components: the constant temperature equipment is used for providing a constant temperature environment for the SiC MOSFET device; the test equipment is used for connecting the SiC MOSFET device in a constant temperature environment, applying a gate filling voltage and a drain voltage to the SiC MOSFET device, and performing trap filling on the SiC MOSFET device; the calculating module is used for carrying out fitting processing on the transient voltage curves, extracting a time constant spectrum of the trap, and calculating the trap energy level by adopting an Arrhenii Wu Sigong type based on the time constant spectrum of the trap to carry out trap characterization. By adopting the embodiment of the invention, the trap parameter testing method based on the voltage drop response of the body diode is provided for trap characterization of the SiC MOSFET, the trap time constant and the energy level information are obtained by evaluating the trap release condition of the SiC MOSFET device after the gate filling voltage is removed based on the body effect of the SiC MOSFET, the accurate, nondestructive and in-situ characterization of the trap parameter in the SiC MOSFET is realized, and a foundation is