CN-121978494-A - Method for testing antistatic impact capability of grid electrode of metal oxide semiconductor field effect transistor

CN121978494ACN 121978494 ACN121978494 ACN 121978494ACN-121978494-A

Abstract

The invention discloses a method for testing the antistatic impact capability of a grid electrode of a metal oxide semiconductor field effect transistor, which comprises the steps of firstly testing the maximum voltage value which can be born by a grid electrode of a device and other electrodes under transient pulse by using a transmission line pulse tester, and then substituting the maximum voltage value which can be born by the grid electrode of the device and the capacitance of the grid electrode of the device into corresponding formulas to respectively calculate the antistatic impact capability of the device under a human body mode and a machine mode. The method of the invention only needs one test device of the transmission line pulse generator, and can obtain the grid antistatic impact capability of the device under two modes through one sample test, thus the method has the advantages of less required samples, quick test time and high test precision, and overcomes the defects of the traditional test method.

Inventors

ZHANG CHUNWEI
WANG JITONG
WANG XINYU
LI YANG
NIU HONGSEN

Assignees

济南大学

Dates

Publication Date: 20260505
Application Date: 20260125

Claims (4)

1. A method for testing the antistatic impact capability of the grid electrode of MOS FET is characterized in that, Step 1, connecting the output port of the transmission line pulse generator to the position between the grid electrode and the source electrode of the metal oxide semiconductor field effect transistor device to be tested, testing the current-voltage characteristic of the device by increasing the output current of the port step by step, monitoring the leakage current between the grid electrode and the source electrode of the device after each pulse is completed, stopping the test when the leakage current between the grid electrode and the source electrode exceeds the maximum allowable leakage current, recording the grid voltage of the device under the condition of one pulse before the leakage current exceeds the maximum allowable leakage current, defining the maximum transient impulse voltage which can be born between the grid electrode and the source electrode of the device, Step 2, replacing the source electrode in the step 1 with a drain electrode, testing the maximum transient impulse voltage which can be born between the grid electrode and the drain electrode of the device by using the same method, Step 3, if the device also comprises other electrodes except the grid electrode, the source electrode and the drain electrode, replacing the source electrode with other electrodes by using the method described in step 1, testing the maximum transient impulse voltage between the grid electrode and the other electrodes, Step 4, defining the minimum value of the maximum transient impulse voltage which can be born by the grid electrode and the external electrode measured in the previous step 3 as the maximum transient impulse voltage which can be born by the grid electrode, Step 5, according to a human body model antistatic impact calculation formula, the magnitude of the human body model electrostatic impact voltage which can be followed by the device is calculated, wherein the formula is as follows: Wherein V HBM is the electrostatic shock resistance of the grid electrode of the device to human body mode, C HBM is the simulated human body capacitance value, C gg is the grid electrode input capacitance of the device to be tested, V TLP is the maximum transient impulse voltage which can be born by the grid electrode in the step 4, Step 6, according to a machine mode antistatic impact calculation formula, the electrostatic impact voltage of the human body mode which can be followed by the device is calculated, wherein the formula is as follows: Wherein V MM is the anti-machine mode electrostatic shock capability of the grid of the device, C MM is the simulated machine capacitance value, C gg is the grid input capacitance of the device to be tested, and V TLP is the maximum transient impulse voltage which can be borne by the grid in the step 4.
2. The method of claim 1, wherein the rising and falling edges of the current pulse from the transmission line pulse generator are set to 10ns and the pulse width is set to 100ns during the test.
3. A method for testing the gate anti-static impact capability of a mosfet according to claim 1, wherein the maximum allowable leakage current is 10 times the gate leakage current before device stress.
4. A metal oxide semiconductor as claimed in claim 1A method for testing the anti-static impact capability of the grid electrode of a field effect transistor, wherein the size of the C HBM is 100pF, and the size of the C MM is 200pF.

Description

Method for testing antistatic impact capability of grid electrode of metal oxide semiconductor field effect transistor Technical Field The invention relates to the technical field of semiconductor transistors, in particular to a method for testing the antistatic impact capability of a field effect transistor. Background The Metal Oxide Semiconductor Field Effect Transistor (MOSFET) has the characteristics of easy driving, high switching speed and the like, and is widely applied to the fields of power management, industrial control and the like. The transistors are in contact with the human body, machine, etc. during transportation and welding, and may face electrostatic discharge (ESD) from the human body, machine, or device itself, resulting in device damage. There is no discharge path between the gate electrode and other electrodes of the mosfet, so the antistatic impact capability is low, and it is necessary to accurately test the antistatic impact capability of the gate electrode of the device, so that appropriate reliability protection measures are applied. The existing antistatic impact capability test method needs to adopt a stepping type electrostatic gun test method, wherein the stepping type electrostatic gun test method comprises a human body discharging mode (HBM), a machine discharging mode (MM), a Charged Device Mode (CDM) and the like, only one mode can be selected in each test, only one voltage value can be set in a single test, after the test is finished, the damage condition of the device needs to be detected by using new equipment, the grid antistatic impact capability of the device is found by continuously increasing the voltage value, the test steps are complicated, the test quantity is large, and an accurate value is difficult to obtain. Disclosure of Invention In order to solve the above problems, the present invention provides a method for testing the anti-static impact capability of a gate electrode of a metal oxide semiconductor field effect transistor, wherein the gate electrode of a device can bear the maximum voltage stress through a transmission line pulse generator (TLP), and then the ESD capability of the device under different static impact modes can be obtained through one test according to conversion of different static mode modes. In some embodiments, the following technical scheme is adopted: The method for testing the antistatic impact capability of the grid electrode of the metal oxide semiconductor field effect transistor comprises the following steps: Step 1, connecting the output port of the transmission line pulse generator to the position between the grid electrode and the source electrode of the metal oxide semiconductor field effect transistor device to be tested, testing the current-voltage characteristic of the device by increasing the output current of the port step by step, monitoring the leakage current between the grid electrode and the source electrode of the device after each pulse is completed, stopping the test when the leakage current between the grid electrode and the source electrode exceeds the maximum allowable leakage current, recording the grid voltage of the device under the condition of one pulse before the leakage current exceeds the maximum allowable leakage current, defining the maximum transient impulse voltage which can be born between the grid electrode and the source electrode of the device, Step 2, replacing the source electrode in the step 1 with a drain electrode, testing the maximum transient impulse voltage which can be born between the grid electrode and the drain electrode of the device by using the same method, Step 3, if the device also comprises other electrodes except the grid electrode, the source electrode and the drain electrode, replacing the source electrode with other electrodes by using the method described in step 1, testing the maximum transient impulse voltage between the grid electrode and the other electrodes, Step 4, defining the minimum value of the maximum transient impulse voltage which can be born by the grid electrode and the external electrode measured in the previous step 3 as the maximum transient impulse voltage which can be born by the grid electrode, Step 5, according to a human body model antistatic impact calculation formula, the magnitude of the human body model electrostatic impact voltage which can be followed by the device is calculated, wherein the formula is as follows: in order to solve the above problems, the present invention provides a method for testing the anti-static impact capability of a gate electrode of a metal oxide semiconductor field effect transistor, wherein the gate electrode of a device can bear the maximum voltage stress through a transmission line pulse generator (TLP), and then the ESD capability of the device under different static impact modes can be obtained through one test according to conversion of different static mode modes. In some embodiments, the following techni