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CN-121978739-A - Detector based on multi-chip splicing and signal processing method

CN121978739ACN 121978739 ACN121978739 ACN 121978739ACN-121978739-A

Abstract

The invention discloses a detector based on multi-chip splicing and a signal processing method, which relate to the technical field of synchronous radiation and X-ray spectroscopy, wherein the detector comprises a detector array module, a detector module and a detector module, wherein the detector array module comprises a plurality of semiconductor detection chips arranged on a substrate, and the semiconductor detection chips are arranged in a seamless splicing mode to form a continuous detection surface for converting received incident radiation signals into charge signals; the detector array module is used for detecting the electric charge signals, the packaging module is used for providing a working environment for temperature control and environmental isolation for the detector array module, the readout circuit module is electrically connected to the detector array module and used for pre-amplifying the electric charge signals output by the detector array module and converting the electric charge signals into voltage signals, the digital signal processing module is used for carrying out digital processing on the voltage signals, and parallel processing logic is configured for carrying out pulse accumulation judgment and energy extraction processing respectively. By adopting the area array detector and the signal processing method, stable acquisition and high-precision energy information acquisition of incident radiation signals can be realized under the condition of high counting rate.

Inventors

  • WANG XI
  • WANG JINGNAN
  • XIA JING
  • Yu can
  • LIU SHOUJIE
  • XIAO HAILONG

Assignees

  • 安徽吸收谱仪器设备有限公司

Dates

Publication Date
20260505
Application Date
20260403

Claims (10)

  1. 1. An area array detector based on multi-chip splicing, which is characterized by comprising: The detector array module comprises a plurality of semiconductor detection chips arranged on a substrate, wherein the semiconductor detection chips are arranged in a seamless splicing mode to form a continuous detection surface and are used for converting received incident radiation signals into charge signals; The packaging module is used for providing a working environment for temperature control and environmental isolation for the detector array module; the readout circuit module is electrically connected to the detector array module and is used for pre-amplifying the charge signals output by the detector array module and converting the charge signals into voltage signals; The digital signal processing module is used for carrying out digital processing on the voltage signals and is provided with parallel processing logic, and the parallel processing logic is respectively used for executing pulse accumulation judgment and energy extraction processing.
  2. 2. The multi-chip-splice-based area array detector as claimed in claim 1, wherein the semiconductor detection chip is a silicon drift detector chip with a concentric annular cathode structure, an anode is arranged in the center of the semiconductor detection chip, and the diameter of the anode is ~ 。
  3. 3. The multi-chip splice-based area array detector of claim 1, wherein adjacent semiconductor detection chips are spliced edge to edge and have a physical spacing less than The thickness of the semiconductor detection chip is set as 。
  4. 4. The multi-chip splice based area array detector of claim 1, wherein the package module comprises a vacuum chamber with an entrance window, and a semiconductor refrigerator disposed in the vacuum chamber for maintaining the operating temperature of the detector array module at 。
  5. 5. The multi-chip splice based area array detector of claim 1, wherein the parallel processing logic comprises: A fast channel processing unit configured to time-identify the input signal based on the first shaping time and generate a time stamp; a slow-path processing unit configured to perform a trapezoidal shaping process on an input signal based on a second shaping time to obtain a trapezoidal pulse signal, and extract pulse amplitude information from the trapezoidal pulse signal; The logic control unit is respectively connected with the fast channel processing unit and the slow channel processing unit and is used for carrying out pulse accumulation judgment on the trapezoid pulse signals based on the time stamp and processing the pulse amplitude information according to a pulse accumulation judgment result, wherein the first forming time is smaller than the second forming time.
  6. 6. The multi-chip splice based area array detector of claim 5, wherein the digital signal processing module comprises an analog-to-digital converter and a field programmable gate array FPGA; the analog-to-digital converter is used for converting the voltage signal into a digital sampling signal and inputting the digital sampling signal to the FPGA; the fast channel processing unit, the slow channel processing unit and the logic control unit are all configured in the FPGA.
  7. 7. The multi-chip-splice-based area array detector according to claim 2, wherein the substrate is a low-temperature co-fired ceramic LTCC substrate, and the thermal expansion coefficient of the substrate is matched with the thermal expansion coefficient of a silicon material of the semiconductor detection chip.
  8. 8. The multi-chip splice based area array detector of claim 1, wherein the readout circuitry module comprises a multi-channel low noise application specific integrated circuit ASIC electrically connected to the detector array module by wire bonding.
  9. 9. The multi-chip splice based area array detector of claim 4, wherein the entrance window is a beryllium window or an ultra-thin silicon nitride window.
  10. 10. A signal processing method of an area array detector based on multi-chip splicing, which is applied to the area array detector of any one of claims 1 to 9, and comprises the following steps: Acquiring charge signals which are converted and output by a detector array module based on received incident radiation signals, and performing pre-amplification processing on the charge signals through a read-out circuit module to obtain voltage signals; performing digital sampling processing on the voltage signal to obtain a digital sampling signal; synchronously inputting the digital sampling signals into a fast channel processing unit and a slow channel processing unit which are arranged in parallel; Performing time recognition and time stamp generation on the input digital sampling signal based on the first forming time through the fast channel processing unit, and performing trapezoidal forming processing and pulse amplitude information extraction on the input digital sampling signal based on the second forming time through the slow channel processing unit; and executing pulse accumulation discrimination based on the time stamp by using a logic control unit, and processing the pulse amplitude information according to a pulse accumulation discrimination result, wherein the first forming time is smaller than the second forming time.

Description

Detector based on multi-chip splicing and signal processing method Technical Field The invention relates to the technical field of synchronous radiation and X-ray spectroscopy, in particular to a detector based on multi-chip splicing and a signal processing method. Background In the field of synchrotron radiation research, techniques such as X-ray absorption fine structure spectroscopy (XAFS) and X-ray fluorescence spectroscopy (XRF) have become important means for exploring microstructure and element composition of substances. Along with the development of related researches to the directions of high time resolution, in-situ dynamic observation and micro-area fine analysis, higher requirements are put forward on the aspects of energy resolution, counting rate, long-term stability and the like of the detector, and the performance of the detector becomes one of key factors for limiting the quality and analysis precision of experimental data. In the related art, a Silicon Drift Detector (SDD) has a certain advantage in terms of energy resolution, but its structure is usually implemented in a single module form, and under the condition of high-flux radiation, the detection area and the signal processing capability are limited, and the sustainable effective counting rate is difficult to further increase. When the incident photon flux is higher, the pulse overlapping phenomenon is easy to occur, so that the energy spectrum distortion and the quantitative analysis error are increased. On the other hand, in order to improve the counting capacity, part of the technical schemes adopt scintillators combined with photoelectric converters to construct a large-area detection structure, and although photon receiving efficiency is improved to a certain extent, the energy resolving power is relatively low, and characteristic spectral lines with energy approaching are difficult to effectively distinguish, so that the application of the energy-approaching characteristic spectral lines in fine energy spectrum analysis is limited. In addition, in the background of continuously increasing multi-channel detection requirements, the detectors in the related art still have defects in the aspects of channel-to-channel consistency, noise floor control and long-term operation stability, and the accuracy of measurement results is further affected by response differences between different channels. In the development process of the related technology in China, a certain gap still exists between the high-performance detector in the aspects of core structural design and system integration, and particularly in the aspect of considering both high counting rate and high energy resolution capability, an effective hardware implementation path is not yet available, so that deep application of the synchrotron radiation technology in the research of complex physicochemical processes is restricted to a certain extent. Disclosure of Invention The present invention aims to solve at least one of the technical problems in the related art to some extent. Therefore, the invention aims to provide a detector based on multi-chip splicing and a signal processing method, so as to realize the combination of high counting rate acquisition and high-precision energy information acquisition of incident radiation signals. In order to achieve the above object, an embodiment of a first aspect of the present invention provides a multi-chip-splice-based detector, including: The detector array module comprises a plurality of semiconductor detection chips arranged on a substrate, wherein the semiconductor detection chips are arranged in a seamless splicing mode to form a continuous detection surface and are used for converting received incident radiation signals into charge signals; The packaging module is used for providing a working environment for temperature control and environmental isolation for the detector array module; the readout circuit module is electrically connected to the detector array module and is used for pre-amplifying the charge signals output by the detector array module and converting the charge signals into voltage signals; The digital signal processing module is used for carrying out digital processing on the voltage signals and is provided with parallel processing logic, and the parallel processing logic is respectively used for executing pulse accumulation judgment and energy extraction processing. In addition, the method of the above embodiment of the present invention may further have the following additional technical features: according to one embodiment of the invention, the semiconductor detection chip is a silicon drift detector (Silicon Drift Detector, SDD) chip with a concentric annular cathode structure, an anode is arranged at the center of the semiconductor detection chip, and the diameter of the anode is ~。 According to one embodiment of the invention, the adjacent semiconductor detection chips are spliced edge to edge, and the ph