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CN-121979324-A - Temperature control method and system for integrated circuit

CN121979324ACN 121979324 ACN121979324 ACN 121979324ACN-121979324-A

Abstract

The invention relates to the technical field of data acquisition control, and discloses a temperature control method and a temperature control system of an integrated circuit, wherein the method comprises the steps of acquiring real-time temperature of the surface of a chip, heterogeneous core identification, physical coordinates and heat dissipation path parameters; the method comprises the steps of generating a temperature distribution map and a feature matrix by associating correction data, identifying hot spot areas and ordering cores needing intervention, judging high-load cores and migrating the cores to low-temperature high-heat dissipation areas, adjusting core working frequency to ensure clock synchronization, tracking temperature change to calculate global variance, and optimizing load distribution when the temperature change exceeds a threshold value to obtain a final temperature control scheme. The method can realize accurate dynamic temperature control of the integrated circuit and meet the requirement of data acquisition on the stability of the high-performance chip.

Inventors

  • XU YUFU

Assignees

  • 深圳市威洋权科技有限公司

Dates

Publication Date
20260505
Application Date
20260325

Claims (10)

  1. 1. A method of controlling temperature of an integrated circuit, comprising: acquiring real-time temperature data, heterogeneous core identification, physical coordinates of a heterogeneous core and heat dissipation path parameters of each region on the surface of a chip; Associating the real-time temperature data with the physical coordinates, correcting the associated temperature data by combining the heat dissipation path parameters, generating a map of dynamic temperature distribution, and extracting a feature matrix of the temperature distribution according to the map; Calculating a full-field temperature gradient vector according to the feature matrix, and extracting a connected domain with a gradient modulus exceeding a preset thermal anomaly threshold as a hot spot region; Monitoring the core real-time temperature of the hot spot area, calculating the deviation value of the core real-time temperature and a preset thermal saturation threshold, and sequencing cores corresponding to the hot spot area according to the deviation value to obtain a core identification list needing intervention; Combining the core identification list with the load rate of the heterogeneous cores monitored in real time, and judging the heterogeneous cores as high-load cores if the load rate exceeds a preset load judgment threshold; Screening a region with the temperature lower than a preset low-temperature judging threshold value and the heat radiation capacity higher than a preset heat radiation capacity threshold value as a target region, and transferring the task of the high-load core to the target region to obtain an adjusted core layout; Monitoring clock synchronization deviation values of cores under the adjustment core layout, and adjusting the working frequency of the corresponding core to obtain stable operation parameters if the clock synchronization deviation values exceed a preset time sequence deviation threshold; And tracking the chip surface temperature change under the stable operation parameters, calculating the variance of the global temperature, and if the variance exceeds a preset temperature variance threshold, optimizing the load distribution of the heterogeneous cores to obtain a final temperature control scheme.
  2. 2. The method for controlling temperature of an integrated circuit according to claim 1, wherein the acquiring real-time temperature data of each area on the surface of the chip, the heterogeneous core identifier, physical coordinates of the heterogeneous core, and heat dissipation path parameters includes: Acquiring real-time temperature data of each area on the surface of the chip through a distributed sensor network; Calling a preset heterogeneous core identifier and a corresponding physical coordinate; and acquiring heat dissipation path parameters solidified in the chip design stage, wherein the heat dissipation path parameters comprise thermal resistance values and heat conduction path distribution.
  3. 3. The method according to claim 1, wherein the associating the real-time temperature data with the physical coordinates and correcting the associated temperature data in combination with the heat dissipation path parameters generates a map of dynamic temperature distribution, and extracting a feature matrix of the temperature distribution according to the map, includes: associating the real-time temperature data with the physical coordinates to generate original temperature data with space position information; correcting the original temperature data according to the thermal resistance value in the heat dissipation path parameter to obtain corrected temperature data reflecting heat dissipation difference; performing spatial interpolation on the corrected temperature data to generate a continuous dynamic temperature field, and converting the continuous dynamic temperature field into a dynamic temperature distribution map; and extracting the temperature peak value, gradient change and hot spot distribution information of the temperature distribution map, and constructing a characteristic matrix of temperature distribution.
  4. 4. The method according to claim 1, wherein the calculating a full-field temperature gradient vector according to the feature matrix, extracting a connected domain with a gradient modulus exceeding a preset thermal anomaly threshold as a hot spot region, comprises: Calculating a full-field temperature gradient vector according to the feature matrix; calculating a gradient module value based on the full-field temperature gradient vector, extracting discrete points of which the gradient module value exceeds a preset thermal anomaly threshold value, and carrying out connected domain analysis on the discrete points to form independent connected regions; and performing space matching on the independent communication areas and a preset chip physical layout to determine hot spot areas.
  5. 5. The method for controlling temperature of an integrated circuit according to claim 1, wherein the monitoring the core real-time temperature of the hot spot area, calculating a deviation value between the core real-time temperature and a preset thermal saturation threshold, and sorting cores corresponding to the hot spot area according to the deviation value to obtain a core identification list to be interfered, includes: Monitoring the core real-time temperature corresponding to the hot spot area, and calculating the difference value between the core real-time temperature and a preset thermal saturation threshold value to obtain the temperature deviation value of each core; Giving sequencing weight according to the temperature deviation value from large to small to generate a sequence to be processed; and identifying cores of which the temperature deviation values exceed a preset critical deviation threshold value in the sequence to be processed, and combining to form a core identification list needing intervention.
  6. 6. The method according to claim 1, wherein the combining the core identifier list and the real-time monitored load rate of heterogeneous cores, if the load rate exceeds a preset load determination threshold, determining that the heterogeneous cores are high-load cores, includes: Monitoring the load state of each core in the core identification list in real time, and calculating the load rate of the core; and if the load rate exceeds a preset load judging threshold value, confirming that the core is a high-load core.
  7. 7. The method according to claim 1, wherein the step of selecting, as the target area, an area having a temperature lower than a preset low temperature determination threshold and a heat dissipation capacity higher than a preset heat dissipation capacity threshold, and migrating the task of the high-load core to the target area to obtain an adjusted core layout includes: Collecting real-time temperature and heat dissipation capacity parameters of each core in a non-hot spot area of a chip; Screening cores with the real-time temperature lower than a preset low-temperature judging threshold and the heat radiation capacity parameter higher than a preset heat radiation capacity threshold to form a target core set; And constructing the remapping relation between the high-load core and the cores in the target core set, and executing a scheduling instruction to form an adjustment core layout.
  8. 8. The method according to claim 1, wherein the monitoring the clock synchronization deviation value of each core in the adjusted core layout, and if the clock synchronization deviation value exceeds a preset time sequence deviation threshold, adjusting the operating frequency of the corresponding core to obtain a stable operating parameter, includes: Reading rising edge time stamps of all core clock signals under the adjustment core layout; Calculating the deviation between the rising edge time stamp and a global clock reference to obtain clock synchronization deviation values of cores; If the clock synchronization deviation value exceeds a preset time sequence deviation threshold value, executing frequency decrementing operation on the corresponding core; and continuously monitoring the clock synchronization deviation value until the synchronization deviation value is lower than the time sequence deviation threshold value, and determining the current working frequency as a stable operation parameter.
  9. 9. The method according to claim 1, wherein the tracking the chip surface temperature variation under the stable operation parameter and calculating the variance of the global temperature, if the variance exceeds a preset temperature variance threshold, optimizing the load distribution of the heterogeneous core to obtain a final temperature control scheme, comprises: tracking the real-time temperature of each core on the surface of the chip under the stable operation parameters, and constructing a time sequence of temperature evolution; Calculating a global temperature variance from the time series; If the global temperature variance exceeds a preset temperature variance threshold, extracting a core with the temperature higher than a preset high heat judgment threshold from the time sequence as a high heat core; collecting static power consumption data and leakage current parameters of the high-heat core, and constructing asymmetric power consumption characteristics; Adjusting the frequency configuration and load distribution of each core according to the asymmetric power consumption characteristics to generate a load distribution sequence among cores; Inputting the load distribution sequence into a preset thermal simulation model to calculate a junction temperature predicted value, and if the junction temperature predicted value is lower than a preset safe junction temperature threshold value, determining a final temperature control scheme; And if the junction temperature predicted value is higher than or equal to a preset safe junction temperature threshold value, iteratively adjusting the core frequency configuration and the load distribution proportion according to a preset step length until the junction temperature predicted value is lower than the preset safe junction temperature threshold value, and determining that the corresponding scheme is a final temperature control scheme.
  10. 10. A temperature control system for an integrated circuit, comprising: The data acquisition module is used for acquiring real-time temperature data of each area on the surface of the chip, heterogeneous core identification, physical coordinates of the heterogeneous cores and heat dissipation path parameters; the matrix generation module is used for associating the real-time temperature data with the physical coordinates, correcting the associated temperature data by combining the heat dissipation path parameters, generating a map of dynamic temperature distribution, and extracting a characteristic matrix of the temperature distribution according to the map; The hot spot identification module is used for calculating a full-field temperature gradient vector according to the feature matrix and extracting a connected domain with a gradient modulus exceeding a preset thermal anomaly threshold as a hot spot region; The list generation module is used for monitoring the core real-time temperature of the hot spot area, calculating the deviation value of the core real-time temperature and a preset thermal saturation threshold, and sequencing cores corresponding to the hot spot area according to the deviation value to obtain a core identification list needing intervention; the load judging module is used for combining the core identification list with the load rate of the heterogeneous cores monitored in real time, and judging the heterogeneous cores as high-load cores if the load rate exceeds a preset load judging threshold; The core adjusting module is used for screening a region with the temperature lower than a preset low-temperature judging threshold value and the heat radiation capacity higher than a preset heat radiation capacity threshold value as a target region, and transferring the task of the high-load core to the target region to obtain an adjusted core layout; the frequency adjustment module is used for monitoring clock synchronization deviation values of cores under the adjustment core layout, and if the clock synchronization deviation values exceed a preset time sequence deviation threshold value, the working frequency of the corresponding core is adjusted to obtain stable operation parameters; And the load optimization module is used for tracking the chip surface temperature change under the stable operation parameters, calculating the variance of the global temperature, and optimizing the load distribution of the heterogeneous cores if the variance exceeds a preset temperature variance threshold value to obtain a final temperature control scheme.

Description

Temperature control method and system for integrated circuit Technical Field The present invention relates to the field of data acquisition control technologies, and in particular, to a method and a system for controlling temperature of an integrated circuit. Background At present, in the field of data acquisition control, with the continuous improvement of integrated circuit integration level and the wide application of heterogeneous core architecture, chip temperature control is used as a core link for guaranteeing high-performance calculation stable operation, and is directly related to the service life and calculation throughput of an integrated circuit. The existing integrated circuit temperature control method in industry mainly depends on global unified frequency reduction or coarse granularity task migration, for example, a fixed threshold is adopted to trigger large-range frequency reduction, tasks are randomly migrated to idle cores according to preset rules, or core heat dissipation path differences are ignored to perform uniform load distribution. However, this approach presents significant drawbacks in complex operating environments. Because global frequency reduction wastes a large amount of computing resources of idle cores, coarse granularity migration does not consider the difference of core heat dissipation capability, new hot spots are easy to form, and accurate identification and cooperative control on local hot spots are lacking, so that temperature uniformity and computing performance are difficult to balance, and especially in a high-load heterogeneous core scene, local cores are easy to trigger thermal saturation protection, and overall performance jitter is also possibly caused by clock tree transfer interference. In summary, the prior art is difficult to realize accurate dynamic temperature control of an integrated circuit, and cannot meet the requirement of data acquisition on high-performance chip stability. Disclosure of Invention The invention provides a temperature control method and a temperature control system for an integrated circuit, which are used for realizing accurate dynamic temperature control of the integrated circuit and meeting the requirement of data acquisition on high-performance chip stability. In order to solve the above technical problems, the present invention provides a temperature control method of an integrated circuit, including: acquiring real-time temperature data, heterogeneous core identification, physical coordinates of a heterogeneous core and heat dissipation path parameters of each region on the surface of a chip; Associating the real-time temperature data with the physical coordinates, correcting the associated temperature data by combining the heat dissipation path parameters, generating a map of dynamic temperature distribution, and extracting a feature matrix of the temperature distribution according to the map; Calculating a full-field temperature gradient vector according to the feature matrix, and extracting a connected domain with a gradient modulus exceeding a preset thermal anomaly threshold as a hot spot region; Monitoring the core real-time temperature of the hot spot area, calculating the deviation value of the core real-time temperature and a preset thermal saturation threshold, and sequencing cores corresponding to the hot spot area according to the deviation value to obtain a core identification list needing intervention; Combining the core identification list with the load rate of the heterogeneous cores monitored in real time, and judging the heterogeneous cores as high-load cores if the load rate exceeds a preset load judgment threshold; Screening a region with the temperature lower than a preset low-temperature judging threshold value and the heat radiation capacity higher than a preset heat radiation capacity threshold value as a target region, and transferring the task of the high-load core to the target region to obtain an adjusted core layout; Monitoring clock synchronization deviation values of cores under the adjustment core layout, and adjusting the working frequency of the corresponding core to obtain stable operation parameters if the clock synchronization deviation values exceed a preset time sequence deviation threshold; And tracking the chip surface temperature change under the stable operation parameters, calculating the variance of the global temperature, and if the variance exceeds a preset temperature variance threshold, optimizing the load distribution of the heterogeneous cores to obtain a final temperature control scheme. In a second aspect, the present invention provides a temperature control system for an integrated circuit, comprising: The data acquisition module is used for acquiring real-time temperature data of each area on the surface of the chip, heterogeneous core identification, physical coordinates of the heterogeneous cores and heat dissipation path parameters; the matrix generation module is us