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CN-121979356-A - High-precision BJT current mirror circuit based on CMOS process

CN121979356ACN 121979356 ACN121979356 ACN 121979356ACN-121979356-A

Abstract

The invention discloses a high-precision BJT current mirror circuit based on a CMOS process, which belongs to the field of integrated circuits and comprises a current source biasing module, a current mirror core module and a current discharging module. The current source bias module consists of a PMOS current source, an NMOS current mirror and a cascode current mirror, the current mirror core module consists of a BJT triode, and the current discharge module consists of a PMOS tube, a resistance passage, an NMOS tube connected by a capacitor and a capacitor. The base bias current is provided for the BJT triode through the current source bias module, the inherent defect that the traditional BJT current mirror structure cannot accurately copy the reference current is eliminated, and meanwhile, the current leakage module is added to improve the current self-adaptability of the current source bias module. The invention can realize accurate copying of reference current by adopting the BJT current mirror under the CMOS process, has high precision and good matching property, has lower flicker noise and can obviously improve the performance of the current mirror.

Inventors

  • LV WEN
  • JI YUKUN
  • LIU JIAJUN

Assignees

  • 中国电子科技集团公司第五十八研究所

Dates

Publication Date
20260505
Application Date
20260209

Claims (5)

  1. 1. The high-precision BJT current mirror circuit based on the CMOS process is characterized by comprising a current source biasing module, a current mirror core module and a current discharging module; The current source bias module consists of a PMOS current source, an NMOS current mirror and a cascode current mirror, and provides base bias current for the current mirror core module; the current mirror core module is composed of BJT triodes; The current leakage module consists of a PMOS tube, a resistor path, an NMOS tube connected with a capacitor and the capacitor, and the current leakage path is increased to improve the current self-adaptability of the current source bias module.
  2. 2. The CMOS process-based high precision BJT current mirror circuit as claimed in claim 1, wherein said current source bias module comprises PMOS transistor P 1 , PMOS transistor P 2 , PMOS transistor P 3 , PMOS transistor P 4 , PMOS transistor P 5 , PMOS transistor P 6 , NMOS transistor N 2 , NMOS transistor N 3 , NMOS transistor N 4 ; The source of the PMOS tube P 1 is connected with the power supply VDD, the grid is externally connected with the bias voltage V bias , the drain is connected with the drain of the NMOS tube N 2 , the source of the PMOS tube P 2 is connected with the power supply VDD, the grid is connected with the grid of the PMOS tube P 3 , A grid electrode of the PMOS tube P 4 , The grid electrode of the PMOS tube P 5 is connected with the source electrode of the PMOS tube P 3 , the drain electrode of the PMOS tube P 3 is connected with the grid electrode of the PMOS tube P 3 and the drain electrode of the NMOS tube N 3 at the same time, the source electrode of the PMOS tube P 4 is connected with the power supply VDD, the drain electrode is connected with the PMOS tube P 5 , the drain electrode of the PMOS tube P 5 is connected with the source electrode of the PMOS tube P 6 , the grid electrode of the PMOS tube P 6 is connected with the drain electrode of the PMOS tube P 6 , the drain electrode is connected with the drain electrode of the NMOS tube N 4 , the grid electrode of the NMOS tube N 2 is connected with the drain electrode of the NMOS tube N 3 , the drain electrode of the NMOS tube N 3 is connected with the drain electrode of the NMOS tube N 3 , The grid electrode of the NMOS tube N 4 is connected, and the source electrode of the NMOS tube N 2 , the source electrode of the NMOS tube N 3 and the source electrode of the NMOS tube N 4 are connected with GND.
  3. 3. The high-precision BJT current mirror circuit based on the CMOS process as claimed in claim 2, wherein the current mirror core module comprises an NPN tube Q 1 and an NPN tube Q 2 , wherein a collector electrode of the NPN tube Q 1 is externally connected with a reference current I REF , a base electrode is connected with a base electrode of the NPN tube Q 2 , an emitter electrode is connected with GND, a collector electrode of the NPN tube Q 1 is externally connected with an output current I OUT , and an emitter electrode is connected with GND.
  4. 4. The high-precision BJT current mirror circuit based on CMOS process as claimed in claim 3, wherein said current bleed module is composed of NMOS transistor N 1 , PMOS transistor P 7 , capacitor C 1 , resistor R 1 , the gate of NMOS transistor N 1 is connected to the gate of PMOS transistor P 7 and the collector of NPN transistor Q 1 at the same time, the source and drain are connected to GND, the source of PMOS transistor P 7 is connected to the drain of PMOS transistor P 5 and the source of PMOS transistor P 6 at the same time, the drain is connected to the first end of resistor R 1 , the second end of resistor R 1 is connected to GND, the first end of capacitor C 1 is connected to the gate of NMOS transistor N 1 , the gate of PMOS transistor P 7 , and the collector of NPN transistor Q 1 at the same time, and the second end is connected to GND.
  5. 5. The high-precision BJT current mirror circuit based on CMOS process as claimed in claim 4, wherein said PMOS transistor P 6 and said PMOS transistor P 7 are the same PMOS transistor.

Description

High-precision BJT current mirror circuit based on CMOS process Technical Field The invention relates to the technical field of integrated circuits, in particular to a high-precision BJT current mirror circuit based on a CMOS process. Background In analog and mixed signal integrated circuit designs, the performance of a current mirror as a core unit for current copying, bias generation and signal processing directly determines the accuracy, stability and reliability of the overall system. The conventional MOSFET current mirror has low matching precision and high flicker noise, and the BJT current mirror has high precision and good matching property, and has low flicker noise, so that the performance of the current mirror can be obviously improved. The conventional BJT current mirror circuit structure is shown in FIG. 2, and is composed of two triodes, wherein Q 1 is a diode connection method, Q 2 replicates the current of Q 1 by connecting with the base of Q 1, and the base currents I B of the two BJTs are provided by a reference branch, I B=IC/beta. The conventional BJT current mirror generates a systematic error caused by the base current, and is essentially that the BJT device is used as a current control device, and the base port of the BJT device needs a non-zero input driving current, and the current does not participate in the mirror image transmission of the output current, so that the current transmission precision of an ideal current source is damaged. Because the characteristics of the selected Q 1 and Q 2 are completely the same, lambda and beta (process parameters) are consistent, and V BE、IB、IC is the same through a circuit connection mode. And the base and collector of Q 1 are shorted, so that V CE=VBE, NPN operates in the amplifying region (V CE≥VBE), so I C=βIB. As can be seen from fig. 2: therefore, it can be seen that the current mirror shown in fig. 2 cannot be accurately duplicated, and there is an error relationship: Even if β matches, I OUT is slightly smaller than I REF. For the improved emitter follower buffer structure (beta multiplier), a first-stage emitter follower Q 3 is inserted between the reference branch and the base of the mirror transistor, the schematic structure is shown in FIG. 3. It can be seen that I C2 and I C1 remain equal, the base current Ib3 of Q 3 is taken from I REF, and its emitter current is used to drive the bases of mirror transistors Q 1 and Q 2, and the error-causing current (base current) can be controlled to be smaller by introducing transistor Q 3. Computational analysis shows that the transmission error is calculated fromMagnitude is reduced toMagnitude of: it can be seen that the configuration shown in fig. 3 reduces the mirror error to some extent. However, in CMOS processes, the transistors available are usually parasitic or vertical, the beta is usually very low, typically on the order of 1-10, and when beta is reduced below 10, the current source error of the structure is comparable to the current source error using diode-coupling. In summary, the conventional BJT current mirror cannot meet the requirement of high precision of the circuit due to the principle defect of large current mirror deviation caused by the current split of the base electrode. Disclosure of Invention The invention aims to provide a high-precision BJT current mirror circuit based on a CMOS process, which solves the problems in the background technology. In order to solve the above technical problems, the present invention provides a high-precision BJT current mirror circuit based on CMOS process, comprising: The current source bias module consists of a PMOS current source, an NMOS current mirror and a cascode current mirror, and provides base bias current for the current mirror core module; the current mirror core module is composed of BJT triodes; The current leakage module consists of a PMOS tube, a resistor path, an NMOS tube connected with a capacitor and the capacitor, and the current leakage path is increased to improve the current self-adaptability of the current source bias module. In one embodiment, the current source bias module includes a PMOS transistor P 1, a PMOS transistor P 2, a PMOS transistor P 3, a PMOS transistor P 4, a PMOS transistor P 5, a PMOS transistor P 6, an NMOS transistor N 2, an NMOS transistor N 3, and an NMOS transistor N 4; The source of the PMOS tube P 1 is connected with the power supply VDD, the grid is externally connected with the bias voltage V bias, the drain is connected with the drain of the NMOS tube N 2, the source of the PMOS tube P 2 is connected with the power supply VDD, the grid is connected with the grid of the PMOS tube P 3, A grid electrode of the PMOS tube P 4, The grid electrode of the PMOS tube P 5 is connected with the source electrode of the PMOS tube P 3, the drain electrode of the PMOS tube P 3 is connected with the grid electrode of the PMOS tube P 3 and the drain electrode of the NMOS tube N 3 at the same tim