CN-121979450-A - Data writing method and system

CN121979450ACN 121979450 ACN121979450 ACN 121979450ACN-121979450-A

Abstract

The application relates to the technical field of storage and discloses a data writing method and a system, wherein the method is applied to flash memory equipment, the flash memory equipment comprises a cache module, a flash memory unit and a memory, the method is used for obtaining data to be written in, caching the data to be written in the cache module, obtaining writing operation information, reading the data to be written in from the cache module based on the writing operation information, encoding the data to be written in to obtain encoded data, releasing the read data to be written in from the cache module, and writing the encoded data into the flash memory unit, so that cache resources can be released in advance before the data is written in the flash memory unit, and the allocation efficiency of the cache resources is improved.

Inventors

FANG HAOJUN
HUANG YUNXIN
YANG ZHOU
YIN ZHONGJU

Assignees

深圳大普微电子股份有限公司

Dates

Publication Date: 20260505
Application Date: 20251231

Claims (10)

1. A data writing method, which is applied to a flash memory device, wherein the flash memory device comprises a cache module and a flash memory unit, and the method comprises: Obtaining data to be written, and caching the data to be written in the cache module; acquiring write operation information, reading the data to be written from the cache module based on the write operation information, and encoding the data to be written to obtain encoded data; Releasing the read data to be written from the cache module, and writing the encoded data into the flash memory unit.
2. The method of claim 1, wherein the cache module comprises a plurality of cache units for storing the data to be written, the write operation information comprising a length of the cache units; The reading the data to be written from the cache module based on the write operation information includes: If the length of the cache unit is greater than the length of the release granularity, reading the data to be written from the cache module for multiple times according to the length of the release granularity; and if the length of the cache unit is smaller than the length of the release granularity, reading the data to be written in the N cache units from the cache module, wherein N is more than or equal to 2, N is equal to the length of the release granularity/the length of the cache unit, and the length of the release granularity is in direct proportion to the length of the cache unit.
3. The method of claim 2, wherein encoding the data to be written to obtain encoded data comprises: If the length of the cache unit is greater than the length of the release granularity, splitting the data to be written into M data, and encoding the M data in sequence to obtain encoded data, wherein M is equal to the length of the cache unit/the length of the release granularity; If the length of the buffer unit is smaller than the length of the release granularity, the data to be written is directly encoded to obtain the encoded data.
4. The method of claim 2, wherein releasing the read-to-be-written data from the cache module comprises: if the length of the buffer memory unit is greater than the length of the release granularity, splitting the buffer memory unit into M release units to determine M release marks, and releasing data to be written in the M release units based on the M release marks; And if the length of the buffer memory unit is smaller than the length of the release granularity, acquiring release identifiers of 1 release units corresponding to the data to be written, and releasing the data to be written in 1 release units based on the release identifiers of the 1 release units, wherein the release units consist of N buffer memory units.
5. The method according to claim 2, wherein the release granularity is a minimum unit at the time of cache release, i.e., each time the cache is released, the release granularity is performed; the length of the release granularity is selected as the length of the error correction unit; And when the length of the buffer unit is greater than the length of the release granularity, splitting the buffer unit so as to release the buffer unit according to the small particles.
6. A data writing system, which is characterized by comprising a host and a flash memory device, wherein the flash memory device comprises a cache module and a flash memory unit; The host is connected with the flash memory device and is used for sending a write instruction to the flash memory device; The flash memory device is connected with the host, and is used for writing the data corresponding to the write instruction into the cache module, encoding the data corresponding to the write instruction to obtain encoded data, releasing the data corresponding to the write instruction in the cache module, and writing the encoded data into the flash memory unit.
7. The system of claim 6, wherein the cache module comprises a plurality of cache units, the flash memory device comprises a flash memory device controller, the flash memory device controller comprises a front-end module, a data processing module, an algorithm module, a back-end module, a soft-hard interaction module, a functional hardware module; The front-end module is connected with the data processing module and the host computer and used for sending the writing instruction to the data processing module; The data processing module is connected with the front end module, the cache module, the soft and hard interaction module and the algorithm module and is used for distributing a cache unit for data corresponding to the write instruction based on the write instruction and generating cache information; The algorithm module is connected with the data processing module, the back-end module and the soft-hard interaction module and is used for converting a logical address in the write instruction into a physical address; the back-end module is connected with the algorithm module, the soft and hard interaction module and the flash memory unit and is used for generating a control instruction and sending the control instruction to the soft and hard interaction module; The soft and hard interaction module is connected with the data processing module, the functional hardware module, the algorithm module and the back-end module and is used for transmitting operation information and decomposing operation completion information, sending the operation information to the functional hardware module, receiving the operation completion information of the functional hardware module, obtaining cache release information based on the operation completion information and sending the cache release information to the data processing module or the algorithm module; The functional hardware module is connected with the soft and hard interaction module, the cache module and the flash memory unit and is used for triggering a data writing flow based on the control instruction, generating completion information after acquiring data corresponding to a writing instruction from the cache module based on the operation information, sending the completion information to the soft and hard interaction module, encoding the data corresponding to the writing instruction, releasing the data corresponding to the writing instruction from the cache module, writing the encoded data into the flash memory unit, generating operation completion information, and sending the operation completion information to the soft and hard interaction module, wherein the completion information comprises cache release information; The soft-hard interaction module is further configured to send the cache release information to the data processing module, so as to instruct the data processing module or the algorithm module to release the corresponding cache unit.
8. The system of claim 7, wherein the soft-hard interaction module comprises an uplink control module and a downlink control module; The uplink control module is connected with the data processing module, the algorithm module and the back-end module and is used for decomposing the operation completion information to obtain cache release information and other operation completion information, sending the cache release information to the data processing module or the algorithm module and sending the other operation completion information to the back-end module; the downlink control module is connected with the functional hardware module and used for sending the operation information to the functional hardware module.
9. The system of claim 7, wherein the flash memory device comprises a memory, and the functional hardware module comprises a flash error correction module, a scrambling module, and a flash control unit; The flash memory error correction module is connected with the cache module, the scrambling module, the memory and the downlink control module and is used for acquiring data corresponding to the writing instruction from the cache module based on the operation information, generating the completion information, encoding the data corresponding to the writing instruction to obtain encoded data, backing up the encoded data to the memory, generating backup completion information, and transmitting the encoded data to the scrambling module; The scrambling module is connected with the flash memory error correction module and the flash memory control unit and is used for scrambling the coded data to obtain scrambled data and sending the scrambled data to the flash memory control unit; The flash memory control unit is connected with the scrambling module, the flash memory error correction module and the flash memory unit and is used for writing the scrambled data into the flash memory unit, generating the operation completion information and sending the operation completion information to the flash memory error correction module.
10. The system of claim 9, wherein the flash error correction module comprises a transmission control module, a backup control module, a return status control module; The transmission control module is connected with the return state control module, the backup control module, the scrambling module and the flash memory control unit and is used for generating the buffer release information after acquiring the data corresponding to the writing instruction, transmitting the buffer release information to the return state control module, encoding the data corresponding to the writing instruction and respectively transmitting the encoded data to the backup control module and the scrambling module; the backup control module is connected with the transmission control module, the return state control module and the memory, and is used for backing up the encoded data to the memory and generating the backup completion information; and the return state control module is connected with the transmission control module and the soft-hard interaction module and is used for sending the buffer release information and the backup completion information to the uplink control module.

Description

Data writing method and system Technical Field The embodiment of the application relates to the technical field of storage, in particular to a data writing method and system. Background Solid state disk (Solid STATE DISK, SSD) is the mainstream storage equipment at present, and the Solid state disk includes Solid state disk main control unit, flash memory array, dynamic random access memory, and the data stream of Solid state disk includes host computer data stream, and host computer data stream can flow through each module in the Solid state disk main control unit, is write into the flash memory array after processing by a plurality of modules stage by stage to realize the data interaction between host computer and the storage medium. At present, before data is written into a flash memory array, host data is cached into a cache unit (namely a dynamic random access memory), after the data is written into a flash memory and successful writing is confirmed, the host data in the cache unit is released, however, as the host interface speed of a solid state disk is continuously improved, the iteration of the transmission speed of a rear-end flash memory is relatively lagged, the cache release mechanism causes long cache occupation period and low rotation efficiency, and the efficiency of cache reassignment is reduced. Disclosure of Invention In order to solve the above technical problems, embodiments of the present application provide a data writing method and system, which can backup encoded data before writing the data into a flash memory unit, release cache resources in advance, and improve allocation efficiency of the cache resources. In order to solve the technical problems, the embodiment of the application provides the following technical scheme: in a first aspect, an embodiment of the present application provides a data writing method, applied to a flash memory device, where the flash memory device includes a cache module and a flash memory unit, the method includes: Acquiring data to be written, and caching the data to be written in a cache module; Acquiring write operation information, reading data to be written from a cache module based on the write operation information, and encoding the data to be written to obtain encoded data; releasing the data to be written from the buffer memory module, and writing the encoded data into the flash memory unit. In some embodiments, the buffer module includes a plurality of buffer units, the buffer units are used for storing data to be written, and the write operation information includes a length of the buffer units; Based on the write operation information, reading data to be written from the cache module, including: If the length of the cache unit is greater than the length of the release granularity, reading the data to be written from the cache module for multiple times according to the length of the release granularity; If the length of the cache unit is smaller than the length of the release granularity, reading data to be written in N cache units from the cache module, wherein N is more than or equal to 2, N is equal to the length of the release granularity/the length of the cache unit, and the length of the release granularity is in direct proportion to the length of the cache unit. In some embodiments, encoding data to be written to obtain encoded data includes: If the length of the buffer unit is greater than the length of the release granularity, splitting the data to be written into M data, and coding the M data in sequence to obtain coded data, wherein M is equal to the length of the buffer unit/the length of the release granularity; if the length of the buffer unit is smaller than the length of the release granularity, directly encoding the data to be written to obtain encoded data. In some embodiments, releasing read data to be written from the cache module includes: if the length of the buffer memory unit is greater than the length of the release granularity, splitting the buffer memory unit into M release units to determine M release identifiers, and releasing data to be written in the M release units based on the M release identifiers; If the length of the buffer memory unit is smaller than the length of the release granularity, the release identification of 1 release unit corresponding to the data to be written is obtained, and the data to be written in the 1 release unit is released based on the release identification of the 1 release unit, wherein the release unit consists of N buffer memory units. In some embodiments, the release granularity is the minimum unit of cache release, i.e., each time the cache is released, the release granularity is performed; the length of the release granularity is selected as the length of the error correction unit; when the length of the buffer unit is larger than the length of the release granularity, the buffer unit is split, so that the buffer unit is released according to the small granularity. In a second