CN-121979583-A - Programmable logic device configuration method and hardware board card

CN121979583ACN 121979583 ACN121979583 ACN 121979583ACN-121979583-A

Abstract

The application provides a programmable logic device configuration method and a hardware board card, and relates to the technical field of electronic hardware design and logic control. The method is applied to a hardware board card comprising a CPLD, and comprises the steps of reading configuration information from a user flash memory in the CPLD when the CPLD is powered on, wherein the configuration information at least comprises a hardware version identifier and a function configuration identifier, analyzing the read configuration information, dynamically selecting and starting a specific logic function module matched with the hardware board card from the same set of logic codes solidified in the CPLD based on the analyzed hardware version identifier and the function configuration identifier, thereby realizing the normal form conversion of replacing the traditional multiple sets of codes and multiple BOMs by one set of codes and multiple configurations on a hardware logic control layer, and further effectively reducing the development and test of repeated logic codes aiming at similar hardware boards.

Inventors

YUAN MENG
YU YANLING
Huang Wanglin

Assignees

上海远图未来信息技术有限公司

Dates

Publication Date: 20260505
Application Date: 20251218

Claims (10)

1. A programmable logic device configuration method applied to a hardware board card containing a complex programmable logic device CPLD, the method comprising: When the CPLD is powered on and started, configuration information is read from a user flash memory in the CPLD, wherein the configuration information at least comprises a hardware version identifier and a function configuration identifier; Analyzing the read configuration information to obtain the hardware version identifier and the function configuration identifier; And dynamically selecting and starting a specific logic function module matched with the hardware board card from the same set of logic codes solidified in the CPLD according to the analyzed hardware version identifier and the function configuration identifier.
2. The method for configuring a programmable logic device according to claim 1, wherein the dynamically selecting and enabling a specific logic function module matched with the hardware board card from the same set of logic codes cured inside the CPLD according to the parsed hardware version identifier and the function configuration identifier comprises: determining a logic code framework compatible with the hardware version identifier based on the hardware version identifier; And dynamically selecting and enabling a specific logic function module matched with the hardware board card in the compatible logic code framework according to the function configuration identification.
3.A programmable logic device configuration method according to claim 1 or 2, characterized in that the configuration information is a multi-bit command word comprising: a validity identification bit segment for identifying the validity of the multi-bit command word itself; a hardware version identification bit section for representing the hardware version identification; And the function configuration identification bit section is used for representing the function configuration identification.
4. A programmable logic device configuration method according to claim 3, characterized in that the method further comprises: Judging whether the configuration information is valid or not according to the validity identification bit section; and if the configuration information is judged to be invalid, controlling the CPLD to execute preset default configuration logic and generating an alarm signal.
5. A programmable logic device configuration method according to claim 1 or 2, wherein said dynamically selecting and enabling a particular logic function module comprises: and according to the function configuration identifier, configuring the function definition, the electrical characteristics or the signal mapping relation of at least one input/output pin of the CPLD.
6. The programmable logic device configuration method of claim 2, wherein the determining a logical code framework compatible with the hardware version identification based on the hardware version identification comprises: And comparing the hardware version identifier with a compatible version list pre-stored in the CPLD to determine whether a compatible framework exists.
7. The programmable logic device configuration method of claim 6, further comprising: and if the comparison result shows that the compatible frame does not exist, controlling the CPLD to execute preset default configuration logic.
8. The programmable logic device configuration method according to claim 1 or 2, characterized in that the method further comprises: and in response to a configuration update instruction received through a communication interface of the CPLD, updating the configuration information stored in the user flash memory based on the configuration update instruction.
9. The programmable logic device configuration method of claim 8, further comprising, prior to said updating said configuration information stored in said user flash memory: backing up the current configuration information in the user flash memory to a preset storage area; and if the operation of updating the user flash memory according to the configuration updating instruction fails, restoring the configuration information backed up in the preset storage area to the user flash memory.
10. A hardware board comprising a complex programmable logic device CPLD configured to perform the method of any one of claims 1 to 9.

Description

Programmable logic device configuration method and hardware board card Technical Field The present application relates to the field of electronic hardware design and logic control technology, and in particular, to a programmable logic device configuration method and a hardware board card. Background With the rapid development of data centers, cloud computing, and communication networks, core hardware devices such as switches and servers are evolving toward higher integration, more complex functions, and faster iteration speed. In such devices, complex programmable logic devices (Complex Programmable Logic Device, abbreviated as CPLDs) are widely used for key logic functions such as system power-on timing management, signal monitoring, interface expansion, status indicator light control, and the like, by virtue of their high reliability, flexible reconfigurability, and strong interface control capability. A typical hardware system is typically composed of a plurality of functionally similar but slightly different printed circuit boards (Printed Circuit Board, abbreviated PCBs), with the CPLDs on each board being required to perform slightly different logic tasks according to their specific hardware layout and pin definitions. In the related art, a one-to-one customized development and configuration mode is generally adopted. Specifically, for each PCB board card with different hardware configuration or pin definition, an engineer needs to independently write and compile a set of corresponding CPLD logic codes, generate a unique binary image file and burn the unique binary image file into the CPLD of the corresponding board card, each set of unique CPLD codes is identified as an independent material corresponding to an independent bill of materials item in the production and management links, and when a plurality of hardware versions or derivative models exist in a product line, a plurality of sets of highly similar codes and bill of materials (Bill of Materials, BOM) are required to be maintained, so that a discrete configuration management system taking hardware differences as driving forces is formed. But has a problem of high development and maintenance costs. Disclosure of Invention The application provides a programmable logic device configuration method and a hardware board card, which are used for solving the problem of high development and maintenance cost in the related technology. In a first aspect, the present application provides a method for configuring a programmable logic device, applied to a hardware board card including a CPLD, the method for configuring a programmable logic device comprising: When the CPLD is powered on and started, configuration information is read from a user flash memory (User Flash Memory, abbreviated as UFM) in the CPLD, wherein the configuration information at least comprises a hardware version identifier and a function configuration identifier; analyzing the read configuration information to obtain a hardware version identifier and a function configuration identifier; and dynamically selecting and starting a specific logic function module matched with the hardware board card from the same set of logic codes solidified in the CPLD according to the analyzed hardware version identification and the function configuration identification. In one possible implementation, the method dynamically selects and enables the specific logic function module matched with the hardware board card from the same set of logic codes solidified inside the CPLD according to the analyzed hardware version identification and function configuration identification, and comprises the steps of determining a logic code frame compatible with the hardware version identification based on the hardware version identification, and dynamically selecting and enabling the specific logic function module matched with the hardware board card in the compatible logic code frame according to the function configuration identification. In a possible implementation, the configuration information is a multi-bit command word, which includes a validity identification bit section for identifying the validity of the multi-bit command word itself, a hardware version identification bit section for representing a hardware version identification, and a function configuration identification bit section for representing a function configuration identification. In one possible implementation, the configuration method of the programmable logic device further includes judging whether the configuration information is valid according to the validity identification bit segment, and if the configuration information is judged to be invalid, controlling the CPLD to execute preset default configuration logic and generating an alarm signal. In one possible implementation, dynamically selecting and enabling a particular logic function module includes configuring a function definition, electrical characteristics, or signal mapping relationsh