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CN-121979718-A - Programmable on-line kernel self-diagnosis realization method and storage medium

CN121979718ACN 121979718 ACN121979718 ACN 121979718ACN-121979718-A

Abstract

A programmable on-line kernel self-diagnosis realization method and a storage medium comprise the steps of S1, constructing a hardware architecture, S2, pre-generating test excitation and signature, S3, setting a software programmable configuration by a CPU through a configuration register, preparing before testing, S4, reading the SEED from a ROM, generating excitation by a Pattern generator, loading the excitation to a kernel scan chain, capturing output, generating MISR, comparing with GOLDEN MISR, S6, performing fault processing and safety mechanism, S7, recovering after testing. The storage medium is realized based on the above method. The invention has the advantages of simple principle, wide application range, good flexibility, high coverage rate and the like.

Inventors

  • FU ZHIGANG
  • SUN SHUWEI
  • ZHOU XINGYU
  • LI YULIANG
  • JIANG HAOLONG

Assignees

  • 湖南芯弘道信息科技有限责任公司

Dates

Publication Date
20260505
Application Date
20260408

Claims (10)

  1. 1. A programmable on-line kernel self-diagnostic implementation method, comprising: Step S1, constructing a hardware architecture; step S2, test excitation and signature pre-generation, adopting Flextest tools to iteratively screen a plurality of groups of SEED with optimal coverage rate, wherein each group corresponds to one group of GOLDEN MISR, and solidifying the SEED in ROM; step S3, software programmable configuration, wherein the CPU sets a test mode, the number of execution SEED, test granularity, clock distribution and start/stop through a configuration register; Step S4, preparing before testing; s5, online test execution, namely reading SEED from ROM, generating excitation by a Pattern generator, loading the excitation into a kernel scan chain, capturing output, generating MISR, and comparing with GOLDEN MISR; S6, fault handling and safety mechanism; And S7, recovering after the test, wherein the step comprises resetting the kernel, recovering the site, releasing and processing the cache interrupt, and returning the control right of the CPU.
  2. 2. The method for implementing the programmable on-line kernel self-diagnosis according to claim 1, wherein the hardware architecture of step S1 comprises: The controller is used for generating and outputting control signals through the CPU configuration register, and managing Pattern generation, test granularity, test state setting and clock distribution control; The Pattern generator takes SEED in ROM as a source to generate scanning test excitation, loads the scanning test excitation into a kernel scanning chain and tests kernel logic; the ROM storage module is used for completing read-write control of the ROM and storing the optimal SEED and the corresponding GOLDEN MISR; The output capturing and MISR module is used for capturing the output of the scanning chain, generating MISR signature through the compression of the XOR tree, comparing with the GOLDEN MISR and outputting a judging result; An I/O isolation logic unit, the input of which is set to a fixed standard level, and the output of which is set to a high-resistance/invalid state; And the interrupt recording module is used for buffering interrupt signals during the test period and uniformly responding after the test is finished.
  3. 3. The method for realizing the programmable on-line kernel self-diagnosis according to claim 1, wherein a coverage rate optimization strategy is adopted, and the method comprises the steps of performing fault coverage rate analysis by Flextest after netlist generation, iteratively selecting SEED, recording uncovered faults, successively completing, selecting a plurality of first SEED with highest coverage rate and storing the SEED into a ROM, and calculating the current coverage rate in real time according to the number of completed SEED during on-line test.
  4. 4. The method for realizing the programmable on-line kernel self-diagnosis according to claim 3, wherein the full-node excitability and observability based on a scanning chain are adopted, wherein all triggers in the kernel are connected in series to form a complete scanning chain, so that internal logic can be subjected to full shiftable input and shiftable output, and each logic gate and each signal line can be ensured to be covered and observed by test excitation.
  5. 5. A programmable on-line kernel self-diagnosis implementation method according to claim 3, characterized in that, the automation tool is adopted to iterate and select SEED, wherein Flextest fault simulation tools are used to execute the following procedures, namely, generating a kernel netlist, building a complete fault model, inputting a SEED, generating test vectors, executing simulation, counting covered faults, recording an uncovered fault list as an optimization target of the next round of SEED, and circulating iteration to continuously supplement SEED capable of covering new faults.
  6. 6. The method of claim 5, wherein the first several optimal combinations are selected, all candidate SEEDs are sorted according to coverage contribution, the first several groups of SEEDs with highest coverage, shortest vector and highest complementarity are selected, each group of SEEDs corresponds to a unique GOLDEN MISR and are stored in ROM, the test vector is used for directional coverage of undetected faults, each round of simulation takes the uncovered faults as the generation targets of the next SEEDs, the subsequent vector is used for special coverage of logic which is not detected before, MISR signature compression does not lose fault information, scanned output is compressed through an XOR tree and MISR multi-input feature register, and any logic error can lead to complete difference of final signatures.
  7. 7. The method for implementing self-diagnosis of programmable on-line kernel as claimed in any one of claims 1-6, wherein said step S4 adopts a fault self-checking method for detecting HWBIST the correctness of automatic test and timeout functions, comprising: By manually injecting a known fault, if HWBIST can stably detect this fault, it is stated that: the Pattern generator is normal; The scan chain is normal; MISR compression and comparison are normal; The fault reporting channel is normal; the self-checking can fail as long as one step fails, so that the condition that a diagnosis module is bad but not known is avoided; If HWBIST is damaged, the kernel is truly damaged, HWBIST cannot be detected, the system is operated with faults, and safety accidents occur.
  8. 8. The method of any one of claims 1-6, including a timeout exit mechanism, i.e. HWBIST the time of the test is fixed, if the test is not completed within the expected time, the test is stopped immediately, the kernel resets and issues an NMI interrupt, the indeterminate state is restored, once hwbist module enters self-test mode, software cannot disable this function, after reset is completed, the HWBIST status register is read, the cause of reset is known, and action is taken.
  9. 9. The method for implementing programmable on-line kernel self-diagnosis according to any one of claims 1 to 6, wherein the step S6 comprises: Comparing the inconsistency, setting a fault sign, triggering NMI interruption, and stopping the test; The test is overtime, the kernel is forcedly reset, and the abnormal state is exited; Error injection, checking HWBIST for validity itself.
  10. 10. A storage medium readable by a computer or a processor, characterized in that the storage medium has stored therein a computer program for executing the method of any of the preceding claims 1 to 9.

Description

Programmable on-line kernel self-diagnosis realization method and storage medium Technical Field The invention mainly relates to the technical field of functional safety test of semiconductor chips, in particular to a programmable on-line kernel self-diagnosis realization method and a storage medium, which are suitable for chip designs meeting functional safety standards in the fields of automobiles, industry and household appliances. Background The CPU kernel is used as the key executing component in the chip, and is the core executing component of the chip of the automobile, industrial and household appliances, and the operation accuracy of the CPU kernel directly determines the system safety. After the chip is qualified in the factory test, hardware defects still occur in the actual operation due to factors such as mechanical vibration, voltage fluctuation, temperature drift, particle bombardment and the like, and the system is out of control, shut down and safety accidents are caused. With the widespread use of semiconductors in the automotive and industrial markets, functional safety has become a critical dimension in semiconductor design in addition to traditional power consumption, performance, area, and the like. In order to meet the functional safety requirements, the automobile field execution ISO 26262, the industrial field execution IEC 61508 and the household appliance field execution IEC 60730 Class B all force the kernel to have the online real-time fault detection capability. In the prior art, the kernel test technology still has some technical defects: 1. Depending on external ATE equipment, the system can only perform off-line delivery test and cannot perform on-line operation detection; 2. the test mode is fixed, the full test can be performed once, and the slicing and time-sharing execution can not be performed; 3. The test granularity is large, the period is long, the occupied CPU resource is high, and the main service is interfered; 4. Fault coverage is low, typically less than 90%, with limited excitation; 5. No I/O isolation mechanism exists, and test signals interfere with other subsystems of the chip; 6. without on-site save/restore mechanism, the original program cannot be continuously executed after testing; 7. No HWBIST self-checking mechanism exists, and misjudgment is easy to occur; 8. The CPU is easy to lock up when the overtime protection is not available and the abnormality occurs. Therefore, there is a need in the art for a core self-diagnostic method that is online, programmable, low-interference, high-coverage, and safe. Disclosure of Invention Aiming at the technical problems existing in the prior art, the invention provides the programmable on-line kernel self-diagnosis realization method and the storage medium with simple principle, wide application range, good flexibility and high coverage rate. In order to solve the technical problems, the invention adopts the following technical scheme: A programmable on-line kernel self-diagnostic implementation method, comprising: Step S1, constructing a hardware architecture; step S2, test excitation and signature pre-generation, adopting Flextest tools to iteratively screen a plurality of groups of SEED with optimal coverage rate, wherein each group corresponds to one group of GOLDEN MISR, and solidifying the SEED in ROM; step S3, software programmable configuration, wherein the CPU sets a test mode, the number of execution SEED, test granularity, clock distribution and start/stop through a configuration register; Step S4, preparing before testing; s5, online test execution, namely reading SEED from ROM, generating excitation by a Pattern generator, loading the excitation into a kernel scan chain, capturing output, generating MISR, and comparing with GOLDEN MISR; S6, fault handling and safety mechanism; And S7, recovering after the test, wherein the step comprises resetting the kernel, recovering the site, releasing and processing the cache interrupt, and returning the control right of the CPU. As a further improvement of the present invention, the hardware architecture of the step S1 includes: The controller is used for generating and outputting control signals through the CPU configuration register, and managing Pattern generation, test granularity, test state setting and clock distribution control; The Pattern generator takes SEED in ROM as a source to generate scanning test excitation, loads the scanning test excitation into a kernel scanning chain and tests kernel logic; the ROM storage module is used for completing read-write control of the ROM and storing the optimal SEED and the corresponding GOLDEN MISR; The output capturing and MISR module is used for capturing the output of the scanning chain, generating MISR signature through the compression of the XOR tree, comparing with the GOLDEN MISR and outputting a judging result; An I/O isolation logic unit, the input of which is set to a fixed standard level, and the output